DE69904618D1 - Detektionstechnik von speicherabschnittfehlern und einzel-, doppel und triplebitfehlern - Google Patents

Detektionstechnik von speicherabschnittfehlern und einzel-, doppel und triplebitfehlern

Info

Publication number
DE69904618D1
DE69904618D1 DE69904618T DE69904618T DE69904618D1 DE 69904618 D1 DE69904618 D1 DE 69904618D1 DE 69904618 T DE69904618 T DE 69904618T DE 69904618 T DE69904618 T DE 69904618T DE 69904618 D1 DE69904618 D1 DE 69904618D1
Authority
DE
Germany
Prior art keywords
errors
triplebit
double
storage section
detection technology
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69904618T
Other languages
English (en)
Other versions
DE69904618T2 (de
Inventor
Robert Cypher
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of DE69904618D1 publication Critical patent/DE69904618D1/de
Publication of DE69904618T2 publication Critical patent/DE69904618T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1028—Adjacent errors, e.g. error in n-bit (n>1) wide storage units, i.e. package error
DE69904618T 1998-09-24 1999-09-22 Detektionstechnik von speicherabschnittfehlern und einzel-, doppel und triplebitfehlern Expired - Fee Related DE69904618T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/160,213 US6141789A (en) 1998-09-24 1998-09-24 Technique for detecting memory part failures and single, double, and triple bit errors
PCT/US1999/022024 WO2000017753A1 (en) 1998-09-24 1999-09-22 Technique for detecting memory part failures and single, double, and triple bit errors

Publications (2)

Publication Number Publication Date
DE69904618D1 true DE69904618D1 (de) 2003-01-30
DE69904618T2 DE69904618T2 (de) 2003-09-18

Family

ID=22575974

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69904618T Expired - Fee Related DE69904618T2 (de) 1998-09-24 1999-09-22 Detektionstechnik von speicherabschnittfehlern und einzel-, doppel und triplebitfehlern

Country Status (6)

Country Link
US (1) US6141789A (de)
EP (1) EP1116114B1 (de)
JP (1) JP2002525747A (de)
AU (1) AU6398499A (de)
DE (1) DE69904618T2 (de)
WO (1) WO2000017753A1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6304992B1 (en) 1998-09-24 2001-10-16 Sun Microsystems, Inc. Technique for correcting single-bit errors in caches with sub-block parity bits
US6233716B1 (en) 1998-09-24 2001-05-15 Sun Microsystems, Inc. Technique for partitioning data to correct memory part failures
US6519736B1 (en) * 1999-11-30 2003-02-11 International Business Machines Corporation Generating special uncorrectable error codes for failure isolation
US6941493B2 (en) * 2002-02-27 2005-09-06 Sun Microsystems, Inc. Memory subsystem including an error detection mechanism for address and control signals
US20030163769A1 (en) * 2002-02-27 2003-08-28 Sun Microsystems, Inc. Memory module including an error detection mechanism for address and control signals
US6996766B2 (en) * 2002-06-28 2006-02-07 Sun Microsystems, Inc. Error detection/correction code which detects and corrects a first failing component and optionally a second failing component
US6973613B2 (en) * 2002-06-28 2005-12-06 Sun Microsystems, Inc. Error detection/correction code which detects and corrects component failure and which provides single bit error correction subsequent to component failure
US6976194B2 (en) * 2002-06-28 2005-12-13 Sun Microsystems, Inc. Memory/Transmission medium failure handling controller and method
US6996686B2 (en) * 2002-12-23 2006-02-07 Sun Microsystems, Inc. Memory subsystem including memory modules having multiple banks
US7779285B2 (en) * 2003-02-18 2010-08-17 Oracle America, Inc. Memory system including independent isolated power for each memory module
US7051265B2 (en) * 2003-07-29 2006-05-23 Hewlett-Packard Development Company, L.P. Systems and methods of routing data to facilitate error correction
US7065697B2 (en) * 2003-07-29 2006-06-20 Hewlett-Packard Development Company, L.P. Systems and methods of partitioning data to facilitate error correction
US7530008B2 (en) * 2003-08-08 2009-05-05 Sun Microsystems, Inc. Scalable-chip-correct ECC scheme
US7188296B1 (en) 2003-10-30 2007-03-06 Sun Microsystems, Inc. ECC for component failures using Galois fields
US7116600B2 (en) * 2004-02-19 2006-10-03 Micron Technology, Inc. Memory device having terminals for transferring multiple types of data
DE102006016499B4 (de) * 2006-04-07 2014-11-13 Qimonda Ag Speichermodulsteuerung, Speichersteuerung und entsprechende Speicheranordnung sowie Verfahren zur Fehlerkorrektur

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4589112A (en) * 1984-01-26 1986-05-13 International Business Machines Corporation System for multiple error detection with single and double bit error correction
US4958350A (en) * 1988-03-02 1990-09-18 Stardent Computer, Inc. Error detecting/correction code and apparatus
US4995041A (en) * 1989-02-03 1991-02-19 Digital Equipment Corporation Write back buffer with error correcting capabilities
US5164944A (en) * 1990-06-08 1992-11-17 Unisys Corporation Method and apparatus for effecting multiple error correction in a computer memory
US5909541A (en) * 1993-07-14 1999-06-01 Honeywell Inc. Error detection and correction for data stored across multiple byte-wide memory devices
US5612965A (en) * 1994-04-26 1997-03-18 Unisys Corporation Multiple memory bit/chip failure detection
US5666371A (en) * 1995-02-24 1997-09-09 Unisys Corporation Method and apparatus for detecting errors in a system that employs multi-bit wide memory elements
US6035432A (en) * 1997-07-31 2000-03-07 Micron Electronics, Inc. System for remapping defective memory bit sets

Also Published As

Publication number Publication date
JP2002525747A (ja) 2002-08-13
DE69904618T2 (de) 2003-09-18
EP1116114B1 (de) 2002-12-18
US6141789A (en) 2000-10-31
WO2000017753A1 (en) 2000-03-30
EP1116114A1 (de) 2001-07-18
AU6398499A (en) 2000-04-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee