DE69714488D1 - Multiplexer mit einem Schieberegister - Google Patents

Multiplexer mit einem Schieberegister

Info

Publication number
DE69714488D1
DE69714488D1 DE69714488T DE69714488T DE69714488D1 DE 69714488 D1 DE69714488 D1 DE 69714488D1 DE 69714488 T DE69714488 T DE 69714488T DE 69714488 T DE69714488 T DE 69714488T DE 69714488 D1 DE69714488 D1 DE 69714488D1
Authority
DE
Germany
Prior art keywords
multiplexer
shift register
register
shift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69714488T
Other languages
English (en)
Other versions
DE69714488T2 (de
Inventor
Masakazu Kurisu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69714488D1 publication Critical patent/DE69714488D1/de
Application granted granted Critical
Publication of DE69714488T2 publication Critical patent/DE69714488T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/04Distributors combined with modulators or demodulators
    • H04J3/047Distributors with transistors or integrated circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00Parallel/series conversion or vice versa
DE69714488T 1996-01-31 1997-01-28 Multiplexer mit einem Schieberegister Expired - Fee Related DE69714488T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8014853A JP3016354B2 (ja) 1996-01-31 1996-01-31 マルチプレクサ回路

Publications (2)

Publication Number Publication Date
DE69714488D1 true DE69714488D1 (de) 2002-09-12
DE69714488T2 DE69714488T2 (de) 2003-04-10

Family

ID=11872600

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69714488T Expired - Fee Related DE69714488T2 (de) 1996-01-31 1997-01-28 Multiplexer mit einem Schieberegister

Country Status (4)

Country Link
US (1) US5828256A (de)
EP (1) EP0788240B1 (de)
JP (1) JP3016354B2 (de)
DE (1) DE69714488T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6359948B1 (en) 1999-02-17 2002-03-19 Triquint Semiconductor Corporation Phase-locked loop circuit with reduced jitter
US6628679B1 (en) * 1999-12-29 2003-09-30 Intel Corporation SERDES (serializer/deserializer) time domain multiplexing/demultiplexing technique
US20070013425A1 (en) * 2005-06-30 2007-01-18 Burr James B Lower minimum retention voltage storage elements
US7592836B1 (en) * 2006-03-31 2009-09-22 Masleid Robert P Multi-write memory circuit with multiple data inputs
US8067970B2 (en) * 2006-03-31 2011-11-29 Masleid Robert P Multi-write memory circuit with a data input and a clock input
CN103208251B (zh) * 2013-04-15 2015-07-29 京东方科技集团股份有限公司 一种移位寄存器单元、栅极驱动电路及显示装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55141823A (en) * 1979-04-24 1980-11-06 Fujitsu Ltd Data read-out circuit
JP2865676B2 (ja) * 1988-10-05 1999-03-08 株式会社日立製作所 画像表示装置
JP2766133B2 (ja) * 1992-08-06 1998-06-18 日本電気アイシーマイコンシステム株式会社 パラレル・シリアル・データ変換回路
US5357153A (en) * 1993-01-28 1994-10-18 Xilinx, Inc. Macrocell with product-term cascade and improved flip flop utilization

Also Published As

Publication number Publication date
EP0788240A2 (de) 1997-08-06
JP3016354B2 (ja) 2000-03-06
EP0788240A3 (de) 1998-09-02
EP0788240B1 (de) 2002-08-07
JPH09214454A (ja) 1997-08-15
DE69714488T2 (de) 2003-04-10
US5828256A (en) 1998-10-27

Similar Documents

Publication Publication Date Title
FR2787913B1 (fr) Registre a decalage
DE60043634D1 (de) Anzeigegerät mit einem Zweirichtungsschieberegister
DE69735030D1 (de) Kalorieverbrauchmessvorrichtung
DE69637892D1 (de) Anordnung mit Alpha-Hexathienyl
DE69706729T2 (de) Wechselgetriebe
DE69706075T2 (de) Gangschaltung
DE69719264T2 (de) Schieberegister mit negativen Widerstandselementen
DE69702096T2 (de) Fliesskommaregisterspillcache
DE69506918T2 (de) Schieberegisterzelle
DE69714488D1 (de) Multiplexer mit einem Schieberegister
FI95940C (fi) Gradienttikalanteri
DE69523537T2 (de) Analog-Digital-Wandler mit schreibbarem Ergebnisregister
DE59402955D1 (de) Betriebsartenschalter
DE59405307D1 (de) Schalthebelverbindung
KR970004422U (ko) 버 마셔 백업로올 쉬프팅장치
KR950024043U (ko) 양방향성 쉬프트 레지스터
DE29512294U1 (de) Schaltungsanordnung mit einem Multiplexer
KR950000926U (ko) 변속레버유닛
KR950023162U (ko) 간이부표
KR960014727A (ko) 변속레버유닛
KR940021287U (ko) 양방향 시프트레지스터
DE9302047U1 (de) Betriebsartenschalter
GB9507370D0 (en) Improved shift register with comparator
KR970060585U (ko) 변속 장치가 부착된 볶음솥
KR950022897U (ko) 선별기

Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee