DE69711457T2 - Feldprogrammierbarer prozessor - Google Patents
Feldprogrammierbarer prozessorInfo
- Publication number
- DE69711457T2 DE69711457T2 DE69711457T DE69711457T DE69711457T2 DE 69711457 T2 DE69711457 T2 DE 69711457T2 DE 69711457 T DE69711457 T DE 69711457T DE 69711457 T DE69711457 T DE 69711457T DE 69711457 T2 DE69711457 T2 DE 69711457T2
- Authority
- DE
- Germany
- Prior art keywords
- field programmable
- programmable processor
- processor
- field
- programmable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
- G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB9611994.6A GB9611994D0 (en) | 1996-06-07 | 1996-06-07 | A field programmable processor |
PCT/GB1997/001520 WO1997046948A1 (en) | 1996-06-07 | 1997-06-06 | A field programmable processor |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69711457D1 DE69711457D1 (de) | 2002-05-02 |
DE69711457T2 true DE69711457T2 (de) | 2002-11-14 |
Family
ID=10794960
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69711457T Expired - Fee Related DE69711457T2 (de) | 1996-06-07 | 1997-06-06 | Feldprogrammierbarer prozessor |
Country Status (8)
Country | Link |
---|---|
US (1) | US6449708B2 (de) |
EP (2) | EP1229453A2 (de) |
JP (1) | JP2000512097A (de) |
KR (1) | KR20000016431A (de) |
AU (1) | AU3038897A (de) |
DE (1) | DE69711457T2 (de) |
GB (1) | GB9611994D0 (de) |
WO (1) | WO1997046948A1 (de) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8487653B2 (en) * | 2006-08-05 | 2013-07-16 | Tang System | SDOC with FPHA and FPXC: system design on chip with field programmable hybrid array of FPAA, FPGA, FPLA, FPMA, FPRA, FPTA and frequency programmable xtaless clockchip with trimless/trimfree self-adaptive bandgap reference xtaless clockchip |
EP0858168A1 (de) | 1997-01-29 | 1998-08-12 | Hewlett-Packard Company | Feldprogrammierbarer Gatterprozessor |
EP0858167A1 (de) | 1997-01-29 | 1998-08-12 | Hewlett-Packard Company | Feldprogrammierbarer Prozessor |
DE69827589T2 (de) | 1997-12-17 | 2005-11-03 | Elixent Ltd. | Konfigurierbare Verarbeitungsanordnung und Verfahren zur Benutzung dieser Anordnung, um eine Zentraleinheit aufzubauen |
DE69841256D1 (de) | 1997-12-17 | 2009-12-10 | Panasonic Corp | Befehlsmaskierung um Befehlsströme einem Prozessor zuzuleiten |
WO1999031574A1 (en) | 1997-12-17 | 1999-06-24 | Hewlett-Packard Company | Implementation of multipliers in programmable arrays |
EP0924602B1 (de) * | 1997-12-17 | 2009-10-28 | Panasonic Corporation | Befehlsmaskierung um Befehlsströme einem Prozessor zuzuleiten |
US7577247B1 (en) | 2000-06-14 | 2009-08-18 | Marvell International Ltd. | Apparatus and method for telephone, intercom, and clock |
US7778736B2 (en) * | 2000-06-14 | 2010-08-17 | Marvell International Ltd. | Apparatus, method, and computer program for sprinkler control |
US7315764B1 (en) * | 2000-06-14 | 2008-01-01 | Marvell International Ltd | Integrated circuit, method, and computer program product for recording and reproducing digital data |
US7298252B1 (en) * | 2000-06-14 | 2007-11-20 | Marvell International Ltd. | Apparatus, method, and computer program for an alarm system |
US7546172B1 (en) * | 2000-06-14 | 2009-06-09 | Marvell International Ltd. | Apparatus, method, and computer program product for recording and reproducing digital data |
US7457676B1 (en) * | 2000-06-14 | 2008-11-25 | Marvell International Ltd. | Vehicle for recording and reproducing digital data |
EP1377919A2 (de) * | 2000-07-24 | 2004-01-07 | PACT XPP Technologies AG | Integrierter schaltkreis |
US20020089348A1 (en) * | 2000-10-02 | 2002-07-11 | Martin Langhammer | Programmable logic integrated circuit devices including dedicated processor components |
JP4750313B2 (ja) * | 2001-05-31 | 2011-08-17 | キヤノン株式会社 | 信号処理回路 |
TWI234737B (en) * | 2001-05-24 | 2005-06-21 | Ip Flex Inc | Integrated circuit device |
US7212528B2 (en) * | 2001-12-21 | 2007-05-01 | Alcatel Canada Inc. | System and method for reassembling packets in a network element |
US20040225483A1 (en) * | 2003-02-24 | 2004-11-11 | Michal Okoniewski | Fdtd hardware acceleration system |
US8495122B2 (en) * | 2003-12-29 | 2013-07-23 | Xilinx, Inc. | Programmable device with dynamic DSP architecture |
US7870182B2 (en) | 2003-12-29 | 2011-01-11 | Xilinx Inc. | Digital signal processing circuit having an adder circuit with carry-outs |
US7849119B2 (en) | 2003-12-29 | 2010-12-07 | Xilinx, Inc. | Digital signal processing circuit having a pattern detector circuit |
US7567997B2 (en) * | 2003-12-29 | 2009-07-28 | Xilinx, Inc. | Applications of cascading DSP slices |
US7865542B2 (en) * | 2003-12-29 | 2011-01-04 | Xilinx, Inc. | Digital signal processing block having a wide multiplexer |
US7467177B2 (en) * | 2003-12-29 | 2008-12-16 | Xilinx, Inc. | Mathematical circuit with dynamic rounding |
US7853636B2 (en) * | 2003-12-29 | 2010-12-14 | Xilinx, Inc. | Digital signal processing circuit having a pattern detector circuit for convergent rounding |
US7844653B2 (en) | 2003-12-29 | 2010-11-30 | Xilinx, Inc. | Digital signal processing circuit having a pre-adder circuit |
JP4664311B2 (ja) * | 2003-12-29 | 2011-04-06 | ザイリンクス インコーポレイテッド | カスケード接続するdspスライスを備えた集積回路 |
US7467175B2 (en) * | 2003-12-29 | 2008-12-16 | Xilinx, Inc. | Programmable logic device with pipelined DSP slices |
US7853632B2 (en) | 2003-12-29 | 2010-12-14 | Xilinx, Inc. | Architectural floorplan for a digital signal processing circuit |
US7882165B2 (en) * | 2003-12-29 | 2011-02-01 | Xilinx, Inc. | Digital signal processing element having an arithmetic logic unit |
US7840630B2 (en) | 2003-12-29 | 2010-11-23 | Xilinx, Inc. | Arithmetic logic unit circuit |
US7853634B2 (en) | 2003-12-29 | 2010-12-14 | Xilinx, Inc. | Digital signal processing circuit having a SIMD circuit |
US7860915B2 (en) | 2003-12-29 | 2010-12-28 | Xilinx, Inc. | Digital signal processing circuit having a pattern circuit for determining termination conditions |
US7840627B2 (en) * | 2003-12-29 | 2010-11-23 | Xilinx, Inc. | Digital signal processing circuit having input register blocks |
US7480690B2 (en) | 2003-12-29 | 2009-01-20 | Xilinx, Inc. | Arithmetic circuit with multiplexed addend inputs |
US7472155B2 (en) * | 2003-12-29 | 2008-12-30 | Xilinx, Inc. | Programmable logic device with cascading DSP slices |
JP2006172219A (ja) * | 2004-12-16 | 2006-06-29 | Toshiba Corp | 半導体集積回路の自動設計装置、半導体集積回路の自動設計方法、及び半導体集積回路の自動設計プログラム |
FR2935059B1 (fr) * | 2008-08-12 | 2012-05-11 | Groupe Des Ecoles De Telecommunications Get Ecole Nationale Superieure Des Telecommunications Enst | Procede de detection d'anomalies dans un circuit de cryptographie protege par logique differentielle et circuit mettant en oeuvre un tel procede |
US8479133B2 (en) | 2009-01-27 | 2013-07-02 | Xilinx, Inc. | Method of and circuit for implementing a filter in an integrated circuit |
US8543635B2 (en) | 2009-01-27 | 2013-09-24 | Xilinx, Inc. | Digital signal processing block with preadder stage |
US9519486B1 (en) * | 2012-11-21 | 2016-12-13 | Xilinx, Inc. | Method of and device for processing data using a pipeline of processing blocks |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5857109A (en) * | 1992-11-05 | 1999-01-05 | Giga Operations Corporation | Programmable logic device for real time video processing |
JP3308770B2 (ja) * | 1994-07-22 | 2002-07-29 | 三菱電機株式会社 | 情報処理装置および情報処理装置における計算方法 |
US5600845A (en) * | 1994-07-27 | 1997-02-04 | Metalithic Systems Incorporated | Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor |
-
1996
- 1996-06-07 GB GBGB9611994.6A patent/GB9611994D0/en active Pending
-
1997
- 1997-06-06 AU AU30388/97A patent/AU3038897A/en not_active Abandoned
- 1997-06-06 WO PCT/GB1997/001520 patent/WO1997046948A1/en not_active Application Discontinuation
- 1997-06-06 DE DE69711457T patent/DE69711457T2/de not_active Expired - Fee Related
- 1997-06-06 EP EP02076259A patent/EP1229453A2/de not_active Withdrawn
- 1997-06-06 EP EP97925148A patent/EP0976059B1/de not_active Expired - Lifetime
- 1997-06-06 US US09/194,906 patent/US6449708B2/en not_active Expired - Fee Related
- 1997-06-06 KR KR1019980710015A patent/KR20000016431A/ko not_active Application Discontinuation
- 1997-06-06 JP JP10500333A patent/JP2000512097A/ja not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
WO1997046948A1 (en) | 1997-12-11 |
DE69711457D1 (de) | 2002-05-02 |
KR20000016431A (ko) | 2000-03-25 |
AU3038897A (en) | 1998-01-05 |
US6449708B2 (en) | 2002-09-10 |
JP2000512097A (ja) | 2000-09-12 |
EP1229453A2 (de) | 2002-08-07 |
US20020019925A1 (en) | 2002-02-14 |
EP0976059B1 (de) | 2002-03-27 |
EP0976059A1 (de) | 2000-02-02 |
GB9611994D0 (en) | 1996-08-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |