DE69631351D1 - ASIC-Busstruktur auf Basis von Multiplexern - Google Patents

ASIC-Busstruktur auf Basis von Multiplexern

Info

Publication number
DE69631351D1
DE69631351D1 DE69631351T DE69631351T DE69631351D1 DE 69631351 D1 DE69631351 D1 DE 69631351D1 DE 69631351 T DE69631351 T DE 69631351T DE 69631351 T DE69631351 T DE 69631351T DE 69631351 D1 DE69631351 D1 DE 69631351D1
Authority
DE
Germany
Prior art keywords
multiplexers
structure based
bus structure
asic bus
asic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69631351T
Other languages
English (en)
Other versions
DE69631351T2 (de
Inventor
William H Radke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69631351D1 publication Critical patent/DE69631351D1/de
Application granted granted Critical
Publication of DE69631351T2 publication Critical patent/DE69631351T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
DE69631351T 1995-02-17 1996-02-13 ASIC-Busstruktur auf Basis von Multiplexern Expired - Fee Related DE69631351T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US390052 1995-02-17
US08/390,052 US5555540A (en) 1995-02-17 1995-02-17 ASIC bus structure

Publications (2)

Publication Number Publication Date
DE69631351D1 true DE69631351D1 (de) 2004-02-26
DE69631351T2 DE69631351T2 (de) 2004-11-04

Family

ID=23540837

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69631351T Expired - Fee Related DE69631351T2 (de) 1995-02-17 1996-02-13 ASIC-Busstruktur auf Basis von Multiplexern

Country Status (4)

Country Link
US (2) US5555540A (de)
EP (1) EP0727747B1 (de)
JP (1) JP3022763B2 (de)
DE (1) DE69631351T2 (de)

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Also Published As

Publication number Publication date
EP0727747A3 (de) 2001-04-04
US5555540A (en) 1996-09-10
EP0727747B1 (de) 2004-01-21
EP0727747A2 (de) 1996-08-21
US5751699A (en) 1998-05-12
DE69631351T2 (de) 2004-11-04
JP3022763B2 (ja) 2000-03-21
JPH08335128A (ja) 1996-12-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee