DE69530922D1 - Vorrichtung mit elektronischem bauteil - Google Patents

Vorrichtung mit elektronischem bauteil

Info

Publication number
DE69530922D1
DE69530922D1 DE69530922T DE69530922T DE69530922D1 DE 69530922 D1 DE69530922 D1 DE 69530922D1 DE 69530922 T DE69530922 T DE 69530922T DE 69530922 T DE69530922 T DE 69530922T DE 69530922 D1 DE69530922 D1 DE 69530922D1
Authority
DE
Germany
Prior art keywords
electronic component
electronic
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69530922T
Other languages
English (en)
Other versions
DE69530922T2 (de
Inventor
Yasuhiro Horiba
Toshimi Kohmura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Application granted granted Critical
Publication of DE69530922D1 publication Critical patent/DE69530922D1/de
Publication of DE69530922T2 publication Critical patent/DE69530922T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
DE69530922T 1994-03-31 1995-03-29 Vorrichtung mit elektronischem bauteil Expired - Lifetime DE69530922T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8802294 1994-03-31
PCT/JP1995/000595 WO1995026885A1 (fr) 1994-03-31 1995-03-29 Dispositif de montage d'un composant electronique

Publications (2)

Publication Number Publication Date
DE69530922D1 true DE69530922D1 (de) 2003-07-03
DE69530922T2 DE69530922T2 (de) 2003-12-24

Family

ID=13931213

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69530922T Expired - Lifetime DE69530922T2 (de) 1994-03-31 1995-03-29 Vorrichtung mit elektronischem bauteil

Country Status (6)

Country Link
US (1) US5822194A (de)
EP (1) EP0754567B1 (de)
JP (1) JP3673521B2 (de)
CN (1) CN1046462C (de)
DE (1) DE69530922T2 (de)
WO (1) WO1995026885A1 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000208905A (ja) * 1999-01-14 2000-07-28 Nec Corp プリント基板
US6201709B1 (en) * 1999-03-05 2001-03-13 Leviton Manufacturing Co., Inc. Mounting system to support electrical components in a stacked relationship to one another
JP2001024312A (ja) * 1999-07-13 2001-01-26 Taiyo Yuden Co Ltd 電子装置の製造方法及び電子装置並びに樹脂充填方法
DE19947130C1 (de) * 1999-09-30 2000-11-02 Siemens Ag Elektrisches Gerät mit in einem Gehäuse angeordneten und nach außen elektromagnetisch abgeschirmten Komponenten
JP2001111225A (ja) * 1999-10-05 2001-04-20 Nippon Mektron Ltd 混成回路基板の製造法
FI112288B (fi) * 2000-01-17 2003-11-14 Rafsec Oy Menetelmä älytarrasyöttörainan valmistamiseksi
FI112287B (fi) * 2000-03-31 2003-11-14 Rafsec Oy Menetelmä tuoteanturin muodostamiseksi ja tuoteanturi
FI111881B (fi) * 2000-06-06 2003-09-30 Rafsec Oy Älykorttiraina ja menetelmä sen valmistamiseksi
FI112121B (fi) * 2000-12-11 2003-10-31 Rafsec Oy Älytarraraina, menetelmä sen valmistamiseksi, menetelmä kantorainan valmistamiseksi ja älytarrarainan älytarran rakenneosa
FI111039B (fi) * 2001-04-06 2003-05-15 Rafsec Oy Älykorttiraina ja menetelmä sen valmistamiseksi
FI112550B (fi) * 2001-05-31 2003-12-15 Rafsec Oy Älytarra ja älytarraraina
FI117331B (fi) * 2001-07-04 2006-09-15 Rafsec Oy Menetelmä ruiskuvaletun tuotteen valmistamiseksi
FI119401B (fi) * 2001-12-21 2008-10-31 Upm Raflatac Oy Älytarraraina ja menetelmä sen valmistamiseksi
US20040070945A1 (en) * 2002-06-05 2004-04-15 Wayne Rowland Heat dissipation structures and method of making
JP4103653B2 (ja) * 2003-03-27 2008-06-18 株式会社デンソー Icカード
JP4066929B2 (ja) * 2003-10-08 2008-03-26 株式会社日立製作所 電子装置及びその製造方法
TWM324375U (en) * 2007-05-21 2007-12-21 Universal Scient Ind Co Ltd Stacked packaging structure for communication module
KR101354372B1 (ko) * 2007-07-31 2014-01-23 삼성전자주식회사 인쇄회로기판 보강구조물 및 이를 이용한 집적회로 패키지
JP2012069541A (ja) * 2010-09-21 2012-04-05 Hitachi High-Tech Instruments Co Ltd 部品搭載装置
US8879276B2 (en) * 2011-06-15 2014-11-04 Power Gold LLC Flexible circuit assembly and method thereof
US9122968B2 (en) 2012-04-03 2015-09-01 X-Card Holdings, Llc Information carrying card comprising a cross-linked polymer composition, and method of making the same
US9594999B2 (en) 2012-04-03 2017-03-14 X-Card Holdings, Llc Information carrying card comprising crosslinked polymer composition, and method of making the same
GB2508402B (en) * 2012-11-30 2015-05-27 Control Tech Ltd A mount for electrical equipment
WO2014149926A1 (en) 2013-03-15 2014-09-25 X-Card Holdings, Llc Methods of making a core layer for an information carrying card, and resulting products
CN111819577A (zh) 2018-03-07 2020-10-23 X卡控股有限公司 金属卡

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60252992A (ja) * 1984-05-30 1985-12-13 Toshiba Corp Icカ−ド
JPS61208188A (ja) * 1985-03-12 1986-09-16 Toshiba Corp Icカ−ド
JPH0655555B2 (ja) * 1985-07-27 1994-07-27 大日本印刷株式会社 Icカ−ドおよびicモジュール
DE3689094T2 (de) * 1985-07-27 1994-03-10 Dainippon Printing Co Ltd IC-Karte.
JPH0679878B2 (ja) * 1985-09-24 1994-10-12 カシオ計算機株式会社 Icカ−ド
JPS62290594A (ja) * 1986-06-11 1987-12-17 大日本印刷株式会社 Icカード
JPH0696357B2 (ja) * 1986-12-11 1994-11-30 三菱電機株式会社 Icカードの製造方法
JPH03166740A (ja) * 1989-11-27 1991-07-18 Toppan Printing Co Ltd 電子部品の製造方法
CA2051836C (en) * 1990-11-30 1996-07-23 Richard Michael Flynn Personal data card construction
US5583378A (en) * 1994-05-16 1996-12-10 Amkor Electronics, Inc. Ball grid array integrated circuit package with thermal conductor
US5468999A (en) * 1994-05-26 1995-11-21 Motorola, Inc. Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding
US5613033A (en) * 1995-01-18 1997-03-18 Dell Usa, Lp Laminated module for stacking integrated circuits
US5609889A (en) * 1995-05-26 1997-03-11 Hestia Technologies, Inc. Apparatus for encapsulating electronic packages

Also Published As

Publication number Publication date
US5822194A (en) 1998-10-13
EP0754567A4 (de) 1999-12-29
CN1046462C (zh) 1999-11-17
WO1995026885A1 (fr) 1995-10-12
EP0754567A1 (de) 1997-01-22
DE69530922T2 (de) 2003-12-24
EP0754567B1 (de) 2003-05-28
CN1144509A (zh) 1997-03-05
JP3673521B2 (ja) 2005-07-20

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