DE69507425T2 - Programmierbare pull-up Pufferschaltung - Google Patents
Programmierbare pull-up PufferschaltungInfo
- Publication number
- DE69507425T2 DE69507425T2 DE69507425T DE69507425T DE69507425T2 DE 69507425 T2 DE69507425 T2 DE 69507425T2 DE 69507425 T DE69507425 T DE 69507425T DE 69507425 T DE69507425 T DE 69507425T DE 69507425 T2 DE69507425 T2 DE 69507425T2
- Authority
- DE
- Germany
- Prior art keywords
- buffer circuit
- programmable pull
- programmable
- pull
- buffer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
- H03K19/09429—Multistate logic one of the states being the high impedance or floating state
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/329,028 US5450356A (en) | 1994-10-25 | 1994-10-25 | Programmable pull-up buffer |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69507425D1 DE69507425D1 (de) | 1999-03-04 |
DE69507425T2 true DE69507425T2 (de) | 1999-07-15 |
Family
ID=23283554
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69507425T Expired - Lifetime DE69507425T2 (de) | 1994-10-25 | 1995-10-24 | Programmierbare pull-up Pufferschaltung |
Country Status (7)
Country | Link |
---|---|
US (1) | US5450356A (de) |
EP (1) | EP0709964B1 (de) |
JP (1) | JPH08263185A (de) |
KR (1) | KR960015911A (de) |
CN (1) | CN1129863A (de) |
DE (1) | DE69507425T2 (de) |
TW (1) | TW321803B (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1995026077A1 (de) * | 1994-03-24 | 1995-09-28 | Siemens Aktiengesellschaft | Verlustarme integrierte schaltung mit reduziertem takthub |
JPH0879047A (ja) * | 1994-09-02 | 1996-03-22 | Toshiba Microelectron Corp | 半導体集積回路およびその製造方法 |
KR960043524A (ko) * | 1995-05-23 | 1996-12-23 | 홍-치우 후 | 출력 버퍼링 장치 |
US5619153A (en) * | 1995-06-28 | 1997-04-08 | Hal Computer Systems, Inc. | Fast swing-limited pullup circuit |
JPH09162711A (ja) * | 1995-12-01 | 1997-06-20 | At & T Corp | 移行時間制御ドライバ回路 |
US5939923A (en) * | 1995-12-27 | 1999-08-17 | Texas Instruments Incorporated | Selectable low power signal line and method of operation |
US6198325B1 (en) * | 1997-06-27 | 2001-03-06 | Sun Microsystems, Inc. | Differencing non-overlapped dual-output amplifier circuit |
DE19823477A1 (de) * | 1998-05-26 | 1999-05-20 | Siemens Ag | Inverterschaltung |
EP0982665A3 (de) * | 1998-08-21 | 2004-02-04 | Matsushita Electronics Corporation | Systembus und Mastergerät das die elektrische Busspannung während der Zugriffsruheperioden stabilisiert |
US6141263A (en) * | 1999-03-01 | 2000-10-31 | Micron Technology, Inc. | Circuit and method for a high data transfer rate output driver |
US7369912B2 (en) * | 2003-05-29 | 2008-05-06 | Fisher-Rosemount Systems, Inc. | Batch execution engine with independent batch execution processes |
US8098097B2 (en) * | 2009-12-23 | 2012-01-17 | Honeywell International Inc. | Radio frequency buffer |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4789967A (en) * | 1986-09-16 | 1988-12-06 | Advanced Micro Devices, Inc. | Random access memory device with block reset |
US4961168A (en) * | 1987-02-24 | 1990-10-02 | Texas Instruments Incorporated | Bipolar-CMOS static random access memory device with bit line bias control |
US4855623A (en) * | 1987-11-05 | 1989-08-08 | Texas Instruments Incorporated | Output buffer having programmable drive current |
US5293082A (en) * | 1988-06-21 | 1994-03-08 | Western Digital Corporation | Output driver for reducing transient noise in integrated circuits |
US4880997A (en) * | 1988-08-18 | 1989-11-14 | Ncr Corporation | Low noise output buffer circuit |
JPH0777345B2 (ja) * | 1988-11-04 | 1995-08-16 | 三菱電機株式会社 | 半導体装置 |
US5239237A (en) * | 1990-02-14 | 1993-08-24 | Zilog, Inc. | Control circuit having outputs with differing rise and fall times |
US5144165A (en) * | 1990-12-14 | 1992-09-01 | International Business Machines Corporation | CMOS off-chip driver circuits |
US5206545A (en) * | 1991-02-05 | 1993-04-27 | Vlsi Technology, Inc. | Method and apparatus for providing output contention relief for digital buffers |
KR920018591A (ko) * | 1991-03-13 | 1992-10-22 | 제임스 에이취. 폭스 | 저파워 버스를 구비한 마이크로프로세서 |
US5276364A (en) * | 1991-12-13 | 1994-01-04 | Texas Instruments Incorporated | BiCMOS bus interface output driver compatible with a mixed voltage system environment |
JPH05181982A (ja) * | 1991-12-27 | 1993-07-23 | Nec Eng Ltd | 大規模集積回路装置 |
KR950012019B1 (ko) * | 1992-10-02 | 1995-10-13 | 삼성전자주식회사 | 반도체메모리장치의 데이타출력버퍼 |
US5359240A (en) * | 1993-01-25 | 1994-10-25 | National Semiconductor Corporation | Low power digital signal buffer circuit |
US5331593A (en) * | 1993-03-03 | 1994-07-19 | Micron Semiconductor, Inc. | Read circuit for accessing dynamic random access memories (DRAMS) |
-
1994
- 1994-10-25 US US08/329,028 patent/US5450356A/en not_active Expired - Lifetime
- 1994-11-14 TW TW083110510A patent/TW321803B/zh not_active IP Right Cessation
-
1995
- 1995-10-24 CN CN95117644A patent/CN1129863A/zh active Pending
- 1995-10-24 EP EP95307530A patent/EP0709964B1/de not_active Expired - Lifetime
- 1995-10-24 DE DE69507425T patent/DE69507425T2/de not_active Expired - Lifetime
- 1995-10-24 KR KR1019950036743A patent/KR960015911A/ko not_active Application Discontinuation
- 1995-10-25 JP JP7277302A patent/JPH08263185A/ja not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
KR960015911A (ko) | 1996-05-22 |
US5450356A (en) | 1995-09-12 |
TW321803B (de) | 1997-12-01 |
JPH08263185A (ja) | 1996-10-11 |
EP0709964A1 (de) | 1996-05-01 |
EP0709964B1 (de) | 1999-01-20 |
DE69507425D1 (de) | 1999-03-04 |
CN1129863A (zh) | 1996-08-28 |
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