DE69230554T2 - Risc-mikroprozessorarchitektur mit schnellem unterbrechungs- und ausnahmemodus - Google Patents

Risc-mikroprozessorarchitektur mit schnellem unterbrechungs- und ausnahmemodus

Info

Publication number
DE69230554T2
DE69230554T2 DE69230554T DE69230554T DE69230554T2 DE 69230554 T2 DE69230554 T2 DE 69230554T2 DE 69230554 T DE69230554 T DE 69230554T DE 69230554 T DE69230554 T DE 69230554T DE 69230554 T2 DE69230554 T2 DE 69230554T2
Authority
DE
Germany
Prior art keywords
trap
microprocessor architecture
risc microprocessor
fast interrupt
exception mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69230554T
Other languages
English (en)
Other versions
DE69230554D1 (de
Inventor
Le Trong Nguyen
J Lentz
Yoshiyuki Miyayama
Sanjiv Garg
Yasuaki Hagiwara
Johannes Wang
H Trang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of DE69230554D1 publication Critical patent/DE69230554D1/de
Application granted granted Critical
Publication of DE69230554T2 publication Critical patent/DE69230554T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3865Recovery, e.g. branch miss-prediction, exception handling using deferred exception handling, e.g. exception flags
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017Runtime instruction translation, e.g. macros
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32Address formation of the next instruction, e.g. by incrementing the instruction counter
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
    • G06F9/3804Instruction prefetching for branches, e.g. hedging, branch folding
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
    • G06F9/3814Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384Register renaming
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3854Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858Result writeback, i.e. updating the architectural state or memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/461Saving or restoring of program or task context
    • G06F9/462Saving or restoring of program or task context with multiple register sets
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
DE69230554T 1991-07-08 1992-07-07 Risc-mikroprozessorarchitektur mit schnellem unterbrechungs- und ausnahmemodus Expired - Lifetime DE69230554T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US72694291A 1991-07-08 1991-07-08
PCT/JP1992/000872 WO1993001547A1 (en) 1991-07-08 1992-07-07 Risc microprocessor architecture implementing fast trap and exception state

Publications (2)

Publication Number Publication Date
DE69230554D1 DE69230554D1 (de) 2000-02-17
DE69230554T2 true DE69230554T2 (de) 2000-07-06

Family

ID=24920677

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69230554T Expired - Lifetime DE69230554T2 (de) 1991-07-08 1992-07-07 Risc-mikroprozessorarchitektur mit schnellem unterbrechungs- und ausnahmemodus

Country Status (8)

Country Link
US (2) US5448705A (de)
EP (2) EP0547240B1 (de)
JP (6) JP3333196B2 (de)
KR (1) KR100294276B1 (de)
AT (1) ATE188786T1 (de)
DE (1) DE69230554T2 (de)
HK (1) HK1014783A1 (de)
WO (1) WO1993001547A1 (de)

Families Citing this family (71)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0886209B1 (de) * 1991-07-08 2005-03-23 Seiko Epson Corporation RISC-Prozessor mit erweiterbarer Architektur
US5493687A (en) 1991-07-08 1996-02-20 Seiko Epson Corporation RISC microprocessor architecture implementing multiple typed register sets
US5539911A (en) 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
JP3730252B2 (ja) 1992-03-31 2005-12-21 トランスメタ コーポレイション レジスタ名称変更方法及び名称変更システム
DE69308548T2 (de) 1992-05-01 1997-06-12 Seiko Epson Corp Vorrichtung und verfahren zum befehlsabschluss in einem superskalaren prozessor.
WO1994016384A1 (en) 1992-12-31 1994-07-21 Seiko Epson Corporation System and method for register renaming
US5628021A (en) 1992-12-31 1997-05-06 Seiko Epson Corporation System and method for assigning tags to control instruction processing in a superscalar processor
JPH06242948A (ja) * 1993-02-16 1994-09-02 Fujitsu Ltd パイプライン処理計算機
JP2596712B2 (ja) * 1993-07-01 1997-04-02 インターナショナル・ビジネス・マシーンズ・コーポレイション 近接した分岐命令を含む命令の実行を管理するシステム及び方法
US5548776A (en) * 1993-09-30 1996-08-20 Intel Corporation N-wide bypass for data dependencies within register alias table
EP0661625B1 (de) * 1994-01-03 1999-09-08 Intel Corporation Verfahren und Vorrichtung zum Implementieren eines vierstufigen Verzweigungsauflosungssystem in einem Rechnerprozessor
GB2286265B (en) * 1994-01-26 1998-02-18 Advanced Risc Mach Ltd selectable processing registers
US5515521A (en) * 1994-02-08 1996-05-07 Meridian Semiconductor, Inc. Circuit and method for reducing delays associated with contention interference between code fetches and operand accesses of a microprocessor
US5673427A (en) * 1994-03-01 1997-09-30 Intel Corporation Packing valid micro operations received from a parallel decoder into adjacent locations of an output queue
NL9400607A (nl) * 1994-04-15 1995-11-01 Arcobel Graphics Bv Dataverwerkingscircuit, vermenigvuldigingseenheid met pijplijn, ALU en schuifregistereenheid ten gebruike bij een dataverwerkingscircuit.
JP3672634B2 (ja) * 1994-09-09 2005-07-20 株式会社ルネサステクノロジ データ処理装置
US5642516A (en) * 1994-10-14 1997-06-24 Cirrus Logic, Inc. Selective shadowing of registers for interrupt processing
US5655115A (en) * 1995-02-14 1997-08-05 Hal Computer Systems, Inc. Processor structure and method for watchpoint of plural simultaneous unresolved branch evaluation
WO1996025705A1 (en) * 1995-02-14 1996-08-22 Fujitsu Limited Structure and method for high-performance speculative execution processor providing special features
US6006030A (en) * 1995-02-17 1999-12-21 Vlsi Technology, Inc. Microprocessor with programmable instruction trap for deimplementing instructions
US5887152A (en) * 1995-04-12 1999-03-23 Advanced Micro Devices, Inc. Load/store unit with multiple oldest outstanding instruction pointers for completing store and load/store miss instructions
US5692170A (en) * 1995-04-28 1997-11-25 Metaflow Technologies, Inc. Apparatus for detecting and executing traps in a superscalar processor
US6052801A (en) * 1995-05-10 2000-04-18 Intel Corporation Method and apparatus for providing breakpoints on a selectable address range
US5659679A (en) * 1995-05-30 1997-08-19 Intel Corporation Method and apparatus for providing breakpoints on taken jumps and for providing software profiling in a computer system
US5694589A (en) * 1995-06-13 1997-12-02 Intel Corporation Instruction breakpoint detection apparatus for use in an out-of-order microprocessor
US5621886A (en) * 1995-06-19 1997-04-15 Intel Corporation Method and apparatus for providing efficient software debugging
US5740413A (en) * 1995-06-19 1998-04-14 Intel Corporation Method and apparatus for providing address breakpoints, branch breakpoints, and single stepping
US5774709A (en) * 1995-12-06 1998-06-30 Lsi Logic Corporation Enhanced branch delay slot handling with single exception program counter
US5761492A (en) * 1996-05-07 1998-06-02 Lucent Technologies Inc. Method and apparatus for uniform and efficient handling of multiple precise events in a processor by including event commands in the instruction set
US5729729A (en) * 1996-06-17 1998-03-17 Sun Microsystems, Inc. System for fast trap generation by creation of possible trap masks from early trap indicators and selecting one mask using late trap indicators
US5924128A (en) * 1996-06-20 1999-07-13 International Business Machines Corporation Pseudo zero cycle address generator and fast memory access
US5958061A (en) * 1996-07-24 1999-09-28 Transmeta Corporation Host microprocessor with apparatus for temporarily holding target processor state
US6199152B1 (en) * 1996-08-22 2001-03-06 Transmeta Corporation Translated memory protection apparatus for an advanced microprocessor
US5937437A (en) * 1996-10-28 1999-08-10 International Business Machines Corporation Method and apparatus for monitoring address translation performance
US5764971A (en) * 1996-12-11 1998-06-09 Industrial Technology Research Institute Method and apparatus for implementing precise interrupts in a pipelined data processing system
US5784606A (en) * 1996-12-16 1998-07-21 International Business Machines Corporation Method and system in a superscalar data processing system for the efficient handling of exceptions
US5850556A (en) * 1996-12-26 1998-12-15 Cypress Semiconductor Corp. Interruptible state machine
US5978900A (en) * 1996-12-30 1999-11-02 Intel Corporation Renaming numeric and segment registers using common general register pool
US6253317B1 (en) * 1997-01-09 2001-06-26 Sun Microsystems, Inc. Method and apparatus for providing and handling traps
US5987601A (en) * 1997-02-14 1999-11-16 Xyron Corporation Zero overhead computer interrupts with task switching
US6122729A (en) * 1997-05-13 2000-09-19 Advanced Micro Devices, Inc. Prefetch buffer which stores a pointer indicating an initial predecode position
CN1107909C (zh) * 1997-07-11 2003-05-07 全斯美达有限公司 带临时保存目标处理器状态的装置的主处理器
KR100522468B1 (ko) * 1997-07-11 2005-10-19 트랜스메타 코포레이션 타겟 프로세서의 상태를 일시적으로 홀딩하는 장치를 갖는 호스트 마이크로프로세서
US6128728A (en) 1997-08-01 2000-10-03 Micron Technology, Inc. Virtual shadow registers and virtual register windows
US6039765A (en) * 1997-12-15 2000-03-21 Motorola, Inc. Computer instruction which generates multiple results of different data types to improve software emulation
US6061787A (en) * 1998-02-02 2000-05-09 Texas Instruments Incorporated Interrupt branch address formed by concatenation of base address and bits corresponding to highest priority interrupt asserted and enabled
US6339752B1 (en) * 1998-12-15 2002-01-15 Bull Hn Information Systems Inc. Processor emulation instruction counter virtual memory address translation
US6253299B1 (en) * 1999-01-04 2001-06-26 International Business Machines Corporation Virtual cache registers with selectable width for accommodating different precision data formats
US6327650B1 (en) * 1999-02-12 2001-12-04 Vsli Technology, Inc. Pipelined multiprocessing with upstream processor concurrently writing to local register and to register of downstream processor
US6493781B1 (en) * 1999-08-19 2002-12-10 Koninklijke Philips Electronics N.V. Servicing of interrupts with stored and restored flags
US6745321B1 (en) * 1999-11-08 2004-06-01 International Business Machines Corporation Method and apparatus for harvesting problematic code sections aggravating hardware design flaws in a microprocessor
US6523097B1 (en) * 1999-11-12 2003-02-18 International Business Machines Corporation Unvalue-tagged memory without additional bits
US6678817B1 (en) * 2000-02-22 2004-01-13 Hewlett-Packard Development Company, L.P. Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engine
US6968469B1 (en) 2000-06-16 2005-11-22 Transmeta Corporation System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored
FR2817460B1 (fr) * 2000-12-04 2003-09-05 Ge Med Sys Global Tech Co Llc Procede et systeme pour simuler l'elargissement de diametre d'une lesion d'un vaisseau sanguin, en particulier une stenose, a l'aide d'une prothese endovasculaire
US6889279B2 (en) * 2000-12-11 2005-05-03 Cadence Design Systems, Inc. Pre-stored vector interrupt handling system and method
US20030014474A1 (en) * 2001-05-30 2003-01-16 Mckaig Ray S. Alternate zero overhead task change circuit
MXPA05000817A (es) 2002-07-19 2005-04-28 Baxter Int Sistemas y metodos para realizar dialisis peritoneal.
CN1678999A (zh) * 2002-09-03 2005-10-05 皇家飞利浦电子股份有限公司 用于处理嵌套中断的方法和设备
US7165018B2 (en) 2002-11-22 2007-01-16 Texas Instruments Incorporated Address range comparator for detection of multi size memory accesses with data matching qualification and full or partial overlap
US7493478B2 (en) * 2002-12-05 2009-02-17 International Business Machines Corporation Enhanced processor virtualization mechanism via saving and restoring soft processor/system states
US7360070B1 (en) * 2003-08-13 2008-04-15 Apple Inc. Specialized processing upon an occurrence of an exceptional situation during the course of a computation
US7014122B2 (en) * 2003-12-24 2006-03-21 International Business Machines Corporation Method and apparatus for performing bit-aligned permute
US7613911B2 (en) * 2004-03-12 2009-11-03 Arm Limited Prefetching exception vectors by early lookup exception vectors within a cache memory
GB2412192B (en) * 2004-03-18 2007-08-29 Advanced Risc Mach Ltd Function calling mechanism
JP2007041837A (ja) * 2005-08-03 2007-02-15 Nec Electronics Corp 命令プリフェッチ装置及び命令プリフェッチ方法
US20080077782A1 (en) * 2006-09-26 2008-03-27 Arm Limited Restoring a register renaming table within a processor following an exception
JP5507317B2 (ja) 2010-04-12 2014-05-28 ルネサスエレクトロニクス株式会社 マイクロコンピュータ及び割込み制御方法
KR102025338B1 (ko) * 2011-12-28 2019-09-26 삼성전자 주식회사 신호 처리 장치, 이를 구비한 디스플레이 장치 및 신호 처리 방법
CN114546492A (zh) 2015-04-24 2022-05-27 优创半导体科技有限公司 使用目标寄存器实现虚拟地址的预转换的计算机处理器
KR102268112B1 (ko) * 2019-12-24 2021-06-22 한국항공우주연구원 위성 커맨드 저장 처리 방법 및 위성 커맨드 저장 처리 시스템

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3346851A (en) * 1964-07-08 1967-10-10 Control Data Corp Simultaneous multiprocessing computer system
GB1301471A (de) * 1968-10-29 1972-12-29
US3789365A (en) * 1971-06-03 1974-01-29 Bunker Ramo Processor interrupt system
US3771138A (en) * 1971-08-31 1973-11-06 Ibm Apparatus and method for serializing instructions from two independent instruction streams
US4034349A (en) * 1976-01-29 1977-07-05 Sperry Rand Corporation Apparatus for processing interrupts in microprocessing systems
AU529675B2 (en) * 1977-12-07 1983-06-16 Honeywell Information Systems Incorp. Cache memory unit
US4315314A (en) * 1977-12-30 1982-02-09 Rca Corporation Priority vectored interrupt having means to supply branch address directly
US4200927A (en) * 1978-01-03 1980-04-29 International Business Machines Corporation Multi-instruction stream branch processing mechanism
US4228495A (en) * 1978-12-19 1980-10-14 Allen-Bradley Company Multiprocessor numerical control system
US4296470A (en) * 1979-06-21 1981-10-20 International Business Machines Corp. Link register storage and restore system for use in an instruction pre-fetch micro-processor interrupt system
JPS5616248A (en) * 1979-07-17 1981-02-17 Matsushita Electric Ind Co Ltd Processing system for interruption
US4434461A (en) * 1980-09-15 1984-02-28 Motorola, Inc. Microprocessor with duplicate registers for processing interrupts
JPS5757345A (en) * 1980-09-24 1982-04-06 Toshiba Corp Data controller
US4434641A (en) * 1982-03-11 1984-03-06 Ball Corporation Buckle resistance for metal container closures
US4635194A (en) * 1983-05-02 1987-01-06 International Business Machines Corporation Instruction buffer bypass apparatus
US4800486A (en) * 1983-09-29 1989-01-24 Tandem Computers Incorporated Multiple data patch CPU architecture
JPS60225943A (ja) * 1984-04-25 1985-11-11 Hitachi Ltd 例外割込み処理方式
US4766564A (en) * 1984-08-13 1988-08-23 International Business Machines Corporation Dual putaway/bypass busses for multiple arithmetic units
CA1242803A (en) * 1984-12-27 1988-10-04 Nobuhisa Watanabe Microprocessor with option area facilitating interfacing with peripheral devices
JPH0762823B2 (ja) * 1985-05-22 1995-07-05 株式会社日立製作所 デ−タ処理装置
JPS63131230A (ja) * 1986-11-21 1988-06-03 Hitachi Ltd 情報処理装置
US4926323A (en) * 1988-03-03 1990-05-15 Advanced Micro Devices, Inc. Streamlined instruction processor
US5003462A (en) * 1988-05-31 1991-03-26 International Business Machines Corporation Apparatus and method for implementing precise interrupts on a pipelined processor with multiple functional units with separate address translation interrupt means
US4897810A (en) * 1988-06-13 1990-01-30 Advanced Micro Devices, Inc. Asynchronous interrupt status bit circuit
JPH0673105B2 (ja) * 1988-08-11 1994-09-14 株式会社東芝 命令パイプライン方式のマイクロプロセッサ
JP2810068B2 (ja) * 1988-11-11 1998-10-15 株式会社日立製作所 プロセッサシステム、コンピュータシステム及び命令処理方法
GB8828817D0 (en) * 1988-12-09 1989-01-18 Int Computers Ltd Data processing apparatus
US5075840A (en) * 1989-01-13 1991-12-24 International Business Machines Corporation Tightly coupled multiprocessor instruction synchronization
JPH0314025A (ja) * 1989-06-13 1991-01-22 Nec Corp 命令実行制御方式
EP0419105B1 (de) * 1989-09-21 1997-08-13 Texas Instruments Incorporated Integrierte Schaltung, die an der Oberfläche eines Halbleitersubstrats angeordnet ist, und Verfahren zur Herstellung derselben
JP2835103B2 (ja) * 1989-11-01 1998-12-14 富士通株式会社 命令指定方法及び命令実行方式
EP0479390B1 (de) * 1990-10-05 1999-01-07 Koninklijke Philips Electronics N.V. Verarbeitungsgerät mit Speicherschaltung und eine Gruppe von Funktionseinheiten

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JP2001022584A (ja) 2001-01-26
JP3333196B2 (ja) 2002-10-07
EP0945787A2 (de) 1999-09-29
JPH06502035A (ja) 1994-03-03
DE69230554D1 (de) 2000-02-17
EP0945787A3 (de) 2008-12-31
EP0547240A1 (de) 1993-06-23
JP2001022583A (ja) 2001-01-26
JP3879812B2 (ja) 2007-02-14
JP2003330708A (ja) 2003-11-21
US5448705A (en) 1995-09-05
WO1993001547A1 (en) 1993-01-21
US5481685A (en) 1996-01-02
JP3750743B2 (ja) 2006-03-01
EP0547240B1 (de) 2000-01-12
ATE188786T1 (de) 2000-01-15
JP2001067220A (ja) 2001-03-16
JP2001027949A (ja) 2001-01-30
KR930702719A (ko) 1993-09-09
KR100294276B1 (ko) 2001-09-17
JP3552995B2 (ja) 2004-08-11
HK1014783A1 (en) 1999-09-30

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