DE69223212D1 - Kalibrierung eines aus einer rekonfigurierbaren Reihe von Stufen bestehenden Systems - Google Patents

Kalibrierung eines aus einer rekonfigurierbaren Reihe von Stufen bestehenden Systems

Info

Publication number
DE69223212D1
DE69223212D1 DE69223212T DE69223212T DE69223212D1 DE 69223212 D1 DE69223212 D1 DE 69223212D1 DE 69223212 T DE69223212 T DE 69223212T DE 69223212 T DE69223212 T DE 69223212T DE 69223212 D1 DE69223212 D1 DE 69223212D1
Authority
DE
Germany
Prior art keywords
calibration
stages
system consisting
reconfigurable series
reconfigurable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69223212T
Other languages
English (en)
Other versions
DE69223212T2 (de
Inventor
Eric G Soenen
Randall L Geiger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69223212D1 publication Critical patent/DE69223212D1/de
Application granted granted Critical
Publication of DE69223212T2 publication Critical patent/DE69223212T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10—Calibration or testing
    • H03M1/1009—Calibration
    • H03M1/1033—Calibration over the full range of the converter, e.g. for correcting differential non-linearity
    • H03M1/1057—Calibration over the full range of the converter, e.g. for correcting differential non-linearity by trimming, i.e. by individually adjusting at least part of the quantisation value generators or stages to their nominal values
    • H03M1/1061—Calibration over the full range of the converter, e.g. for correcting differential non-linearity by trimming, i.e. by individually adjusting at least part of the quantisation value generators or stages to their nominal values using digitally programmable trimming circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H03M1/164—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages
    • H03M1/167—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages all stages comprising simultaneous converters
    • H03M1/168—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages all stages comprising simultaneous converters and delivering the same number of bits
DE69223212T 1991-08-15 1992-08-14 Kalibrierung eines aus einer rekonfigurierbaren Reihe von Stufen bestehenden Systems Expired - Fee Related DE69223212T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US74627091A 1991-08-15 1991-08-15

Publications (2)

Publication Number Publication Date
DE69223212D1 true DE69223212D1 (de) 1998-01-02
DE69223212T2 DE69223212T2 (de) 1998-05-14

Family

ID=25000129

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69223212T Expired - Fee Related DE69223212T2 (de) 1991-08-15 1992-08-14 Kalibrierung eines aus einer rekonfigurierbaren Reihe von Stufen bestehenden Systems

Country Status (5)

Country Link
US (1) US5327129A (de)
EP (1) EP0536504B1 (de)
JP (1) JP3162197B2 (de)
KR (1) KR100261057B1 (de)
DE (1) DE69223212T2 (de)

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US5499027A (en) * 1994-02-24 1996-03-12 Massachusetts Institute Of Technology Digitally self-calibrating pipeline analog-to-digital converter
US5644313A (en) * 1995-06-05 1997-07-01 Motorola, Inc. Redundant signed digit A-to-D conversion circuit and method thereof
US5877720A (en) * 1997-05-30 1999-03-02 Lucent Technologies, Inc. Reconfigurable analog-to-digital converter
US5861828A (en) * 1997-10-14 1999-01-19 National Semiconductor Corporation Apparatus and method for monotonic digital calibration of a pipeline analog-to-digital converter
US6195032B1 (en) * 1999-08-12 2001-02-27 Centillium Communications, Inc. Two-stage pipelined recycling analog-to-digital converter (ADC)
JP3587755B2 (ja) * 2000-03-14 2004-11-10 シスメックス株式会社 粒子測定装置およびその方法
US6647349B1 (en) * 2000-03-31 2003-11-11 Intel Corporation Apparatus, method and system for counting logic events, determining logic event histograms and for identifying a logic event in a logic environment
US6515486B1 (en) * 2000-06-22 2003-02-04 Xilinx, Inc. Method and structure to determine low threshold voltage and high threshold voltage
WO2004062108A1 (ja) * 2002-12-27 2004-07-22 Thine Electronics, Inc. アナログ／ディジタル変換器及び電子回路
CN100527630C (zh) * 2004-04-30 2009-08-12 瑞昱半导体股份有限公司 额外模数转换模块校正流水线式模数转换器的方法及装置
JP2006067201A (ja) * 2004-08-26 2006-03-09 Matsushita Electric Ind Co Ltd パイプラインａ／ｄ変換器およびその出力誤差補正方法
JP2006080717A (ja) * 2004-09-08 2006-03-23 Matsushita Electric Ind Co Ltd パイプラインａ／ｄ変換器およびその出力補正方法
WO2007142328A1 (ja) * 2006-06-08 2007-12-13 National University Corporation Shizuoka University アナログディジタル変換器、ａ／ｄ変換ステージ、アナログ信号に対応したディジタル信号を生成する方法、およびａ／ｄ変換ステージにおける変換誤差を示す信号を生成する方法
US20080043995A1 (en) * 2006-08-01 2008-02-21 Acoustic Technologies, Inc. Histogram for controlling a telephone
US7839318B2 (en) * 2006-11-17 2010-11-23 Siflare, Inc Current mode pipelined analog-to-digital converter
US8723707B2 (en) * 2011-11-14 2014-05-13 Analog Devices, Inc. Correlation-based background calibration for reducing inter-stage gain error and non-linearity in pipelined analog-to-digital converters
US9075930B2 (en) * 2012-11-09 2015-07-07 Xilinx, Inc. Configurable embedded memory system
WO2018129452A1 (en) * 2017-01-06 2018-07-12 Microchip Technology Incorporated Verification, validation, and applications support for analog-to-digital converter systems
US11943244B2 (en) 2021-06-22 2024-03-26 International Business Machines Corporation Anomaly detection over high-dimensional space

Family Cites Families (16)

* Cited by examiner, † Cited by third party
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JPS4932227B1 (de) * 1969-11-01 1974-08-28
JPS54133170A (en) * 1978-04-05 1979-10-16 Shionogi Seiyaku Kk Method and device for selectively measuring various electric constants
DE3031592A1 (de) * 1980-08-21 1982-03-18 Siemens AG, 1000 Berlin und 8000 München Verfahren zum nullpunktabgleich des durch einen operationsverstaerker realisierten analogwertvergleichers eines unter verwendung eines digital-analog-wandlers nach dem iterativprinzip arbeitenden analog-digital-wandlers, insbesondere bei dessen zugehoerigkeit zu einer einrichtung zur analog-digital-wandlung und umgekehrt zur digital-analog-wandlung (codec)
US4414638A (en) * 1981-04-30 1983-11-08 Dranetz Engineering Laboratories, Inc. Sampling network analyzer with stored correction of gain errors
US4672566A (en) * 1981-12-01 1987-06-09 Nissan Motor Company, Limited Device for measuring variable with automatic compensation for offset
US4593268A (en) * 1983-02-22 1986-06-03 Signetics Corporation Analog-to-digital converter using absolute-value conversion
US4535318A (en) * 1983-11-16 1985-08-13 John Fluke Mfg. Co., Inc. Calibration apparatus for systems such as analog to digital converters
US4799041A (en) * 1986-10-06 1989-01-17 Applied Automation, Inc. Recirculating analog to digital converter with auto-calibrating feature
GB2199711B (en) * 1987-01-08 1990-10-24 Schlumberger Electronics Converter calibration
US4745394A (en) * 1987-04-03 1988-05-17 Motorola, Inc. Pipelined A/D converter
DE3851747D1 (de) * 1987-12-14 1994-11-10 Siemens Ag Kalibrierungsverfahren für redundante A/D-und D/A-Umsetzer mit gewichtetem Netzwerk.
US4903026A (en) * 1988-11-22 1990-02-20 General Electric Company Architecture for high sampling rate, high resolution analog-to-digital converter system
US4996530A (en) * 1989-11-27 1991-02-26 Hewlett-Packard Company Statistically based continuous autocalibration method and apparatus
JP2689689B2 (ja) * 1990-05-22 1997-12-10 日本電気株式会社 直並列型アナログ／ディジタル変換器
US5047772A (en) * 1990-06-04 1991-09-10 General Electric Company Digital error correction system for subranging analog-to-digital converters
FI86120C (fi) * 1990-07-02 1992-07-10 Nokia Mobile Phones Ltd A/d- eller d/a-omvandlare, a/d- eller d/a-omvandlarsystem samt kalibreringsfoerfarande foer dessa.

Also Published As

Publication number Publication date
JPH06244724A (ja) 1994-09-02
EP0536504A3 (en) 1993-05-05
KR930005378A (ko) 1993-03-23
JP3162197B2 (ja) 2001-04-25
EP0536504A2 (de) 1993-04-14
KR100261057B1 (ko) 2000-07-01
US5327129A (en) 1994-07-05
DE69223212T2 (de) 1998-05-14
EP0536504B1 (de) 1997-11-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee