DE69032381T2 - Vorrichtung und Verfahren für die kollektive Verzweigung in einem Mehrbefehlsstrommultiprozessor - Google Patents
Vorrichtung und Verfahren für die kollektive Verzweigung in einem MehrbefehlsstrommultiprozessorInfo
- Publication number
- DE69032381T2 DE69032381T2 DE69032381T DE69032381T DE69032381T2 DE 69032381 T2 DE69032381 T2 DE 69032381T2 DE 69032381 T DE69032381 T DE 69032381T DE 69032381 T DE69032381 T DE 69032381T DE 69032381 T2 DE69032381 T2 DE 69032381T2
- Authority
- DE
- Germany
- Prior art keywords
- instruction stream
- stream multiprocessor
- collective
- branching
- collective branching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Devices For Executing Special Programs (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/366,570 US5127092A (en) | 1989-06-15 | 1989-06-15 | Apparatus and method for collective branching in a multiple instruction stream multiprocessor where any of the parallel processors is scheduled to evaluate the branching condition |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69032381D1 DE69032381D1 (de) | 1998-07-16 |
DE69032381T2 true DE69032381T2 (de) | 1999-01-28 |
Family
ID=23443581
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69032381T Expired - Fee Related DE69032381T2 (de) | 1989-06-15 | 1990-06-11 | Vorrichtung und Verfahren für die kollektive Verzweigung in einem Mehrbefehlsstrommultiprozessor |
Country Status (4)
Country | Link |
---|---|
US (1) | US5127092A (de) |
EP (1) | EP0403014B1 (de) |
JP (1) | JP2966892B2 (de) |
DE (1) | DE69032381T2 (de) |
Families Citing this family (50)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0353819B1 (de) * | 1988-08-02 | 1997-04-09 | Koninklijke Philips Electronics N.V. | Verfahren und Vorrichtung für die Synchronisierung von parallelen Prozessoren unter Verwendung einer unscharf definierten Sperre |
WO1991004536A1 (en) * | 1989-09-20 | 1991-04-04 | Dolphin Server Technology A/S | Instruction cache architecture for parallel issuing of multiple instructions |
EP0474297B1 (de) * | 1990-09-05 | 1998-06-10 | Koninklijke Philips Electronics N.V. | Maschine mit sehr langem Befehlswort für leistungsfähige Durchführung von Programmen mit bedingten Verzweigungen |
US5488729A (en) * | 1991-05-15 | 1996-01-30 | Ross Technology, Inc. | Central processing unit architecture with symmetric instruction scheduling to achieve multiple instruction launch and execution |
US6282583B1 (en) * | 1991-06-04 | 2001-08-28 | Silicon Graphics, Inc. | Method and apparatus for memory access in a matrix processor computer |
JP2552784B2 (ja) * | 1991-11-28 | 1996-11-13 | 富士通株式会社 | 並列データ処理制御方式 |
US5546593A (en) * | 1992-05-18 | 1996-08-13 | Matsushita Electric Industrial Co., Ltd. | Multistream instruction processor able to reduce interlocks by having a wait state for an instruction stream |
JPH06259262A (ja) * | 1993-03-08 | 1994-09-16 | Fujitsu Ltd | 分岐確率を設定するコンパイラの処理方法および処理装置 |
JP2596712B2 (ja) * | 1993-07-01 | 1997-04-02 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 近接した分岐命令を含む命令の実行を管理するシステム及び方法 |
JP2550897B2 (ja) * | 1993-11-29 | 1996-11-06 | 日本電気株式会社 | マルチプロセッサシステムのバリア同期装置 |
US5434995A (en) * | 1993-12-10 | 1995-07-18 | Cray Research, Inc. | Barrier synchronization for distributed memory massively parallel processing systems |
US5539888A (en) * | 1993-12-23 | 1996-07-23 | Unisys Corporation | System and method for processing external conditional branch instructions |
JP3639319B2 (ja) * | 1994-01-25 | 2005-04-20 | 富士通株式会社 | 並列計算機システム,データ転送制御方法および送受信制御装置 |
EP0679990B1 (de) * | 1994-04-28 | 2000-03-01 | Hewlett-Packard Company | Rechnervorrichtung mit Mitteln zum Erzwingen der Ausführung von Befehlen in regelmässiger Folge |
EP0817998A4 (de) * | 1995-03-31 | 1998-09-23 | Intel Corp | Testen des speichers in einem mehrprozessor-computersystem |
US5887174A (en) * | 1996-06-18 | 1999-03-23 | International Business Machines Corporation | System, method, and program product for instruction scheduling in the presence of hardware lookahead accomplished by the rescheduling of idle slots |
US5924128A (en) * | 1996-06-20 | 1999-07-13 | International Business Machines Corporation | Pseudo zero cycle address generator and fast memory access |
JP3532037B2 (ja) * | 1996-07-31 | 2004-05-31 | 富士通株式会社 | 並列計算機 |
WO1998026350A1 (en) * | 1996-12-13 | 1998-06-18 | Koninklijke Philips Electronics N.V. | Redundant data processing system having two programmed logic controllers operating in tandem |
JP3730740B2 (ja) * | 1997-02-24 | 2006-01-05 | 株式会社日立製作所 | 並列ジョブ多重スケジューリング方法 |
US6075935A (en) * | 1997-12-01 | 2000-06-13 | Improv Systems, Inc. | Method of generating application specific integrated circuits using a programmable hardware architecture |
US6112299A (en) * | 1997-12-31 | 2000-08-29 | International Business Machines Corporation | Method and apparatus to select the next instruction in a superscalar or a very long instruction word computer having N-way branching |
US6314493B1 (en) | 1998-02-03 | 2001-11-06 | International Business Machines Corporation | Branch history cache |
US6112288A (en) * | 1998-05-19 | 2000-08-29 | Paracel, Inc. | Dynamic configurable system of parallel modules comprising chain of chips comprising parallel pipeline chain of processors with master controller feeding command and data |
US6216174B1 (en) * | 1998-09-29 | 2001-04-10 | Silicon Graphics, Inc. | System and method for fast barrier synchronization |
US6978462B1 (en) | 1999-01-28 | 2005-12-20 | Ati International Srl | Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled |
US7275246B1 (en) | 1999-01-28 | 2007-09-25 | Ati International Srl | Executing programs for a first computer architecture on a computer of a second architecture |
US7065633B1 (en) | 1999-01-28 | 2006-06-20 | Ati International Srl | System for delivering exception raised in first architecture to operating system coded in second architecture in dual architecture CPU |
US8074055B1 (en) | 1999-01-28 | 2011-12-06 | Ati Technologies Ulc | Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code |
US7941647B2 (en) * | 1999-01-28 | 2011-05-10 | Ati Technologies Ulc | Computer for executing two instruction sets and adds a macroinstruction end marker for performing iterations after loop termination |
US8121828B2 (en) | 1999-01-28 | 2012-02-21 | Ati Technologies Ulc | Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions |
US8127121B2 (en) | 1999-01-28 | 2012-02-28 | Ati Technologies Ulc | Apparatus for executing programs for a first computer architechture on a computer of a second architechture |
US7111290B1 (en) | 1999-01-28 | 2006-09-19 | Ati International Srl | Profiling program execution to identify frequently-executed portions and to assist binary translation |
US6349378B1 (en) * | 1999-03-31 | 2002-02-19 | U.S. Philips Corporation | Data processing using various data processors |
EP1050805B1 (de) * | 1999-05-03 | 2008-12-17 | STMicroelectronics S.A. | Übertragung von Schutzwerten in einem Rechnersystem |
DE69934875D1 (de) * | 1999-05-03 | 2007-03-08 | St Microelectronics Sa | Geschützte Ausführung von Rechnerbefehlen |
US20040158695A1 (en) | 1999-05-03 | 2004-08-12 | Laurent Ugen | Method and apparatus for handling transfer of guarded instructions in a computer system |
US6338136B1 (en) * | 1999-05-18 | 2002-01-08 | Ip-First, Llc | Pairing of load-ALU-store with conditional branch |
US6549959B1 (en) | 1999-08-30 | 2003-04-15 | Ati International Srl | Detecting modification to computer memory by a DMA device |
US6751698B1 (en) * | 1999-09-29 | 2004-06-15 | Silicon Graphics, Inc. | Multiprocessor node controller circuit and method |
US6934832B1 (en) | 2000-01-18 | 2005-08-23 | Ati International Srl | Exception mechanism for a computer |
US7000091B2 (en) * | 2002-08-08 | 2006-02-14 | Hewlett-Packard Development Company, L.P. | System and method for independent branching in systems with plural processing elements |
US7194609B2 (en) * | 2002-08-08 | 2007-03-20 | Hewlett-Packard Development Company, L.P. | Branch reconfigurable systems and methods |
CN1732457A (zh) * | 2002-12-30 | 2006-02-08 | 皇家飞利浦电子股份有限公司 | 处理系统 |
JP2007521554A (ja) * | 2003-07-02 | 2007-08-02 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | システム、方法、プログラム、コンパイラ及び記録媒体 |
US20080115139A1 (en) * | 2006-10-27 | 2008-05-15 | Todd Alan Inglett | Barrier-based access to a shared resource in a massively parallel computer system |
US8301936B2 (en) * | 2006-11-02 | 2012-10-30 | Nec Corporation | Apparatus and method for performing a screening test of semiconductor integrated circuits |
US7739481B1 (en) * | 2007-09-06 | 2010-06-15 | Altera Corporation | Parallelism with variable partitioning and threading |
JP2009176116A (ja) * | 2008-01-25 | 2009-08-06 | Univ Waseda | マルチプロセッサシステムおよびマルチプロセッサシステムの同期方法 |
JP5576605B2 (ja) * | 2008-12-25 | 2014-08-20 | パナソニック株式会社 | プログラム変換装置およびプログラム変換方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4365292A (en) * | 1979-11-26 | 1982-12-21 | Burroughs Corporation | Array processor architecture connection network |
US4412303A (en) * | 1979-11-26 | 1983-10-25 | Burroughs Corporation | Array processor architecture |
JPS6043535B2 (ja) * | 1979-12-29 | 1985-09-28 | 富士通株式会社 | 情報処理装置 |
US4344134A (en) * | 1980-06-30 | 1982-08-10 | Burroughs Corporation | Partitionable parallel processor |
JPS6043751A (ja) * | 1983-08-18 | 1985-03-08 | Hitachi Ltd | 情報処理装置 |
US4807115A (en) * | 1983-10-07 | 1989-02-21 | Cornell Research Foundation, Inc. | Instruction issuing mechanism for processors with multiple functional units |
US4870614A (en) * | 1984-08-02 | 1989-09-26 | Quatse Jesse T | Programmable controller ("PC") with co-processing architecture |
US4837676A (en) * | 1984-11-05 | 1989-06-06 | Hughes Aircraft Company | MIMD instruction flow computer architecture |
US4847755A (en) * | 1985-10-31 | 1989-07-11 | Mcc Development, Ltd. | Parallel processing method and apparatus for increasing processing throughout by parallel processing low level instructions having natural concurrencies |
US4891787A (en) * | 1986-12-17 | 1990-01-02 | Massachusetts Institute Of Technology | Parallel processing system with processor array having SIMD/MIMD instruction processing |
US5050070A (en) * | 1988-02-29 | 1991-09-17 | Convex Computer Corporation | Multi-processor computer system having self-allocating processors |
US5050068A (en) * | 1988-10-03 | 1991-09-17 | Duke University | Method and apparatus for using extracted program flow information to prepare for execution multiple instruction streams |
-
1989
- 1989-06-15 US US07/366,570 patent/US5127092A/en not_active Expired - Fee Related
-
1990
- 1990-06-11 EP EP90201500A patent/EP0403014B1/de not_active Expired - Lifetime
- 1990-06-11 DE DE69032381T patent/DE69032381T2/de not_active Expired - Fee Related
- 1990-06-15 JP JP2155606A patent/JP2966892B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH0368060A (ja) | 1991-03-25 |
EP0403014A2 (de) | 1990-12-19 |
EP0403014A3 (de) | 1991-07-24 |
JP2966892B2 (ja) | 1999-10-25 |
EP0403014B1 (de) | 1998-06-10 |
DE69032381D1 (de) | 1998-07-16 |
US5127092A (en) | 1992-06-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8339 | Ceased/non-payment of the annual fee |