DE68928040T2 - Pufferspeichersubsystem für Peripheriesteuerungen und Verfahren - Google Patents

Pufferspeichersubsystem für Peripheriesteuerungen und Verfahren

Info

Publication number
DE68928040T2
DE68928040T2 DE68928040T DE68928040T DE68928040T2 DE 68928040 T2 DE68928040 T2 DE 68928040T2 DE 68928040 T DE68928040 T DE 68928040T DE 68928040 T DE68928040 T DE 68928040T DE 68928040 T2 DE68928040 T2 DE 68928040T2
Authority
DE
Germany
Prior art keywords
cpu
peripheral controller
processes
buffer
data communications
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE68928040T
Other languages
English (en)
Other versions
DE68928040D1 (de
Inventor
Vineet Dujari
Nicos Syrimis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE68928040D1 publication Critical patent/DE68928040D1/de
Publication of DE68928040T2 publication Critical patent/DE68928040T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
DE68928040T 1988-09-09 1989-09-04 Pufferspeichersubsystem für Peripheriesteuerungen und Verfahren Expired - Lifetime DE68928040T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/242,743 US5239636A (en) 1988-09-09 1988-09-09 Buffer memory subsystem for peripheral controllers

Publications (2)

Publication Number Publication Date
DE68928040D1 DE68928040D1 (de) 1997-06-19
DE68928040T2 true DE68928040T2 (de) 1998-01-08

Family

ID=22916012

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68928040T Expired - Lifetime DE68928040T2 (de) 1988-09-09 1989-09-04 Pufferspeichersubsystem für Peripheriesteuerungen und Verfahren

Country Status (7)

Country Link
US (1) US5239636A (de)
EP (1) EP0358423B1 (de)
JP (1) JP2853809B2 (de)
AT (1) ATE153150T1 (de)
DE (1) DE68928040T2 (de)
ES (1) ES2102979T3 (de)
GR (1) GR3023419T3 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5999994A (en) * 1991-01-31 1999-12-07 Ast Research, Inc. Dual path computer control system
US5829043A (en) * 1991-04-15 1998-10-27 Gilet, Deceased; Roger Coupler circuit and its use in a card and process
JPH0561951A (ja) * 1991-08-30 1993-03-12 Fujitsu Ltd イメージ処理装置
US6343363B1 (en) 1994-09-22 2002-01-29 National Semiconductor Corporation Method of invoking a low power mode in a computer system using a halt instruction
US5524268A (en) * 1992-06-26 1996-06-04 Cirrus Logic, Inc. Flexible processor-driven control of SCSI buses utilizing tags appended to data bytes to determine SCSI-protocol phases
US5613135A (en) * 1992-09-17 1997-03-18 Kabushiki Kaisha Toshiba Portable computer having dedicated register group and peripheral controller bus between system bus and peripheral controller
TW276312B (de) * 1992-10-20 1996-05-21 Cirrlis Logic Inc
US5588125A (en) * 1993-10-20 1996-12-24 Ast Research, Inc. Method and apparatus for increasing bus bandwidth on a system bus by inhibiting interrupts while posted I/O write operations are pending
US5666516A (en) * 1993-12-16 1997-09-09 International Business Machines Corporation Protected programmable memory cartridge having selective access circuitry
US5564023A (en) * 1994-06-30 1996-10-08 Adaptec, Inc. Method for accessing a sequencer control block by a host adapter integrated circuit
US5625800A (en) * 1994-06-30 1997-04-29 Adaptec, Inc. SCB array external to a host adapter integrated circuit
JPH08106733A (ja) * 1994-10-07 1996-04-23 Hitachi Ltd 情報記憶媒体利用システム
WO1996032674A2 (en) * 1995-04-13 1996-10-17 Cirrus Logic, Inc. Semiconductor memory device for mass storage block access applications
US5564027A (en) * 1995-04-20 1996-10-08 International Business Machines Corporation Low latency cadence selectable interface for data transfers between busses of differing frequencies
US5983025A (en) * 1995-06-07 1999-11-09 International Business Machines Corporation Computer system buffers for providing concurrency and avoid deadlock conditions between CPU accesses, local bus accesses, and memory accesses
US7076149B1 (en) * 1998-07-20 2006-07-11 Thomson Licensing Digital video apparatus user interface
JP4233373B2 (ja) * 2003-04-14 2009-03-04 株式会社ルネサステクノロジ データ転送制御装置
JPWO2009139109A1 (ja) * 2008-05-13 2011-09-15 パナソニック株式会社 メモリ制御装置、およびこれを備えた情報処理装置
US11157441B2 (en) 2017-07-24 2021-10-26 Tesla, Inc. Computational array microprocessor system using non-consecutive data formatting
US10671349B2 (en) 2017-07-24 2020-06-02 Tesla, Inc. Accelerated mathematical engine
US11409692B2 (en) 2017-07-24 2022-08-09 Tesla, Inc. Vector computational unit
US11893393B2 (en) 2017-07-24 2024-02-06 Tesla, Inc. Computational array microprocessor system with hardware arbiter managing memory requests
US11561791B2 (en) 2018-02-01 2023-01-24 Tesla, Inc. Vector computational unit receiving data elements in parallel from a last row of a computational array

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7507050A (nl) * 1975-06-13 1976-12-15 Philips Nv Geheugensysteem.
US4075691A (en) * 1975-11-06 1978-02-21 Bunker Ramo Corporation Communication control unit
US4236210A (en) * 1978-10-02 1980-11-25 Honeywell Information Systems Inc. Architecture for a control store included in a data processing system
JPS57169865A (en) * 1981-04-14 1982-10-19 Fuji Xerox Co Ltd Picture information storage device
US4543627A (en) * 1981-12-14 1985-09-24 At&T Bell Laboratories Internal communication arrangement for a multiprocessor system
US4538224A (en) * 1982-09-30 1985-08-27 At&T Bell Laboratories Direct memory access peripheral unit controller
US4875154A (en) * 1983-10-13 1989-10-17 Mitchell Maurice E Microcomputer with disconnected, open, independent, bimemory architecture, allowing large interacting, interconnected multi-microcomputer parallel systems accomodating multiple levels of programmer defined heirarchy
US4604683A (en) * 1984-12-10 1986-08-05 Advanced Computer Communications Communication controller using multiported random access memory
JPS61189386A (ja) * 1985-02-13 1986-08-23 三菱電機株式会社 配管用絶縁接続装置の製造方法
US4672613A (en) * 1985-11-01 1987-06-09 Cipher Data Products, Inc. System for transferring digital data between a host device and a recording medium
JPS6344364A (ja) * 1986-08-12 1988-02-25 Olympus Optical Co Ltd 光デイスク制御装置
EP0371034A4 (en) * 1987-07-02 1993-02-24 Exabyte Corporation Method and apparatus for data buffer management

Also Published As

Publication number Publication date
JPH02114350A (ja) 1990-04-26
US5239636A (en) 1993-08-24
ES2102979T3 (es) 1997-08-16
DE68928040D1 (de) 1997-06-19
ATE153150T1 (de) 1997-05-15
EP0358423B1 (de) 1997-05-14
EP0358423A3 (de) 1991-03-13
EP0358423A2 (de) 1990-03-14
JP2853809B2 (ja) 1999-02-03
GR3023419T3 (en) 1997-08-29

Similar Documents

Publication Publication Date Title
DE68928040D1 (de) Pufferspeichersubsystem für Peripheriesteuerungen und Verfahren
EP0927938A4 (de) Datenübertragungssystem und verfahren
JPS56159725A (en) Module type data processor
BR8800537A (pt) Circuito interface de cabo de interconexao para processamento digital de dados
KR930016886A (ko) 컴퓨터 시스템 및 데이타 저장방법
EP0833248A3 (de) Vorrichtung und Verfahren zur Speicherung der Speicheraktualisierungsgeschichte
EP0315209A3 (en) Microcomputer incorporating memory
SE7900021L (sv) Integrerad kommunikationsadapter
DE3782500D1 (de) Gemeinsam genutzte speicherschnittstelle fuer datenverarbeitungsanlage.
MY122111A (en) System input/output interface design for scaling.
DE3470618D1 (en) Stored program control
EP0382358A3 (de) Direktspeicherzugriffssteuerung mit Volladressen-Adressierung und mit Übertragung von Wörtern mit ungeraden Adressen
JPS57111733A (en) Bus conversion system
KR970059914A (ko) 플래시 메모리 시스템
EP0382342A3 (de) DMA-Übertragung für Rechnersystem
EP0568678B1 (de) Datenübertragungsvorrichtung
JPS57130278A (en) Storage device
EP0373042A3 (de) Integrierte Schaltung zur dynamischen Programmierung
JPS6467652A (en) Cache memory eliminating data discordance
DE3377170D1 (en) Peripheral controller for i/o subsystem using slow devices
JPS6482164A (en) Communication system
JPS643706A (en) Controller
JPS5463640A (en) Information processing system
JPS6433657A (en) Memory access controller
JPS6415854A (en) Memory access control system

Legal Events

Date Code Title Description
8364 No opposition during term of opposition