DE60236050D1 - Geschützte Speicherung von Daten in einer integrierten Schaltung - Google Patents

Geschützte Speicherung von Daten in einer integrierten Schaltung

Info

Publication number
DE60236050D1
DE60236050D1 DE60236050T DE60236050T DE60236050D1 DE 60236050 D1 DE60236050 D1 DE 60236050D1 DE 60236050 T DE60236050 T DE 60236050T DE 60236050 T DE60236050 T DE 60236050T DE 60236050 D1 DE60236050 D1 DE 60236050D1
Authority
DE
Germany
Prior art keywords
data
integrated circuit
protected storage
protected
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60236050T
Other languages
English (en)
Inventor
William Orlando
Luc Wuidart
Michel Bardouillet
Pierre Balthazar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Application granted granted Critical
Publication of DE60236050D1 publication Critical patent/DE60236050D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/57Protection from inspection, reverse engineering or tampering
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/10Protecting distributed programs or content, e.g. vending or licensing of copyrighted material ; Digital rights management [DRM]
    • G06F21/12Protecting executable software
    • G06F21/121Restricting unauthorised execution of programs
    • G06F21/123Restricting unauthorised execution of programs by using dedicated hardware, e.g. dongles, smart cards, cryptographic processors, global positioning systems [GPS] devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • H04L9/0866Generation of secret information including derivation or calculation of cryptographic keys or passwords involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Multimedia (AREA)
  • Technology Law (AREA)
  • Storage Device Security (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE60236050T 2001-06-11 2002-06-11 Geschützte Speicherung von Daten in einer integrierten Schaltung Expired - Lifetime DE60236050D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0107591A FR2825873A1 (fr) 2001-06-11 2001-06-11 Stockage protege d'une donnee dans un circuit integre

Publications (1)

Publication Number Publication Date
DE60236050D1 true DE60236050D1 (de) 2010-06-02

Family

ID=8864158

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60236050T Expired - Lifetime DE60236050D1 (de) 2001-06-11 2002-06-11 Geschützte Speicherung von Daten in einer integrierten Schaltung

Country Status (5)

Country Link
US (2) US7334131B2 (de)
EP (1) EP1267248B1 (de)
JP (1) JP2003051820A (de)
DE (1) DE60236050D1 (de)
FR (1) FR2825873A1 (de)

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FR2823398B1 (fr) * 2001-04-04 2003-08-15 St Microelectronics Sa Extraction d'une donnee privee pour authentification d'un circuit integre
US7840803B2 (en) 2002-04-16 2010-11-23 Massachusetts Institute Of Technology Authentication of integrated circuits
JP2005123883A (ja) * 2003-10-16 2005-05-12 Japan Science & Technology Agency 電子署名システム
FR2875949A1 (fr) * 2004-09-28 2006-03-31 St Microelectronics Sa Verrouillage d'un circuit integre
US7702927B2 (en) 2004-11-12 2010-04-20 Verayo, Inc. Securely field configurable device
DE102005024379A1 (de) * 2005-05-27 2006-11-30 Universität Mannheim Verfahren zur Erzeugung und/oder Einprägung eines wiedergewinnbaren kryptographischen Schlüssels bei der Herstellung einer topographischen Struktur
GB2428948B (en) * 2005-07-27 2007-09-05 Ingenia Technology Ltd Keys
JP2009508430A (ja) * 2005-09-14 2009-02-26 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 品目の真正性を判定するデバイス、システム及び方法
EP1768028A1 (de) * 2005-09-22 2007-03-28 STMicroelectronics (Research & Development) Limited Peripherieadressierung in einer integrierten Schaltung
DE602007013697D1 (de) 2006-01-24 2011-05-19 Verayo Inc
GB0615392D0 (en) * 2006-08-03 2006-09-13 Wivenhoe Technology Ltd Pseudo random number circuitry
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JPWO2008056613A1 (ja) * 2006-11-06 2010-02-25 パナソニック株式会社 認証装置
US8510608B2 (en) 2006-11-06 2013-08-13 Panasonic Corporation Generating PUF error correcting code using redundant hardware
CN101542496B (zh) * 2007-09-19 2012-09-05 美国威诚股份有限公司 利用物理不可克隆功能的身份验证
TWI498827B (zh) * 2008-11-21 2015-09-01 Verayo Inc 非連網射頻辨識裝置物理不可複製功能之鑑認技術
FR2941343B1 (fr) * 2009-01-20 2011-04-08 Groupe Des Ecoles De Telecommunications Get Ecole Nat Superieure Des Telecommunications Enst Circuit de cryptographie, protege notamment contre les attaques par observation de fuites d'information par leur chiffrement.
US8745410B2 (en) * 2009-03-18 2014-06-03 Atmel Corporation Method and apparatus to scramble data stored in memories accessed by microprocessors
JP5447790B2 (ja) * 2009-04-22 2014-03-19 大日本印刷株式会社 セキュリティトークン及びスクランブル鍵の派生方法
US8468186B2 (en) * 2009-08-05 2013-06-18 Verayo, Inc. Combination of values from a pseudo-random source
US8811615B2 (en) * 2009-08-05 2014-08-19 Verayo, Inc. Index-based coding with a pseudo-random source
JP5839659B2 (ja) * 2011-06-20 2016-01-06 ルネサスエレクトロニクス株式会社 半導体装置
US8590010B2 (en) * 2011-11-22 2013-11-19 International Business Machines Corporation Retention based intrinsic fingerprint identification featuring a fuzzy algorithm and a dynamic key
GB2499985A (en) * 2012-02-29 2013-09-11 Nds Ltd Current state of OTP memory used with new received information to define new OTP state for computation of new digital signature in preventing playback attacks
GB2508052A (en) * 2012-11-18 2014-05-21 Nds Ltd Glitch resistant device
KR101489088B1 (ko) * 2013-09-03 2015-02-04 (주) 아이씨티케이 식별키 생성 장치 및 방법
US9712330B2 (en) 2014-12-15 2017-07-18 Honeywell International Inc. Physically uncloneable function device using MRAM

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FR2833119A1 (fr) * 2001-11-30 2003-06-06 St Microelectronics Sa Generation de quantites secretes d'identification d'un circuit integre
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US7840803B2 (en) * 2002-04-16 2010-11-23 Massachusetts Institute Of Technology Authentication of integrated circuits
US7702927B2 (en) * 2004-11-12 2010-04-20 Verayo, Inc. Securely field configurable device
US7970980B2 (en) * 2004-12-15 2011-06-28 International Business Machines Corporation Method and apparatus for accessing memory in a computer system architecture supporting heterogeneous configurations of memory structures

Also Published As

Publication number Publication date
JP2003051820A (ja) 2003-02-21
US7945791B2 (en) 2011-05-17
US20020188857A1 (en) 2002-12-12
EP1267248A1 (de) 2002-12-18
EP1267248B1 (de) 2010-04-21
US7334131B2 (en) 2008-02-19
FR2825873A1 (fr) 2002-12-13
US20080104420A1 (en) 2008-05-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition