DE602007011789D1 - Verfahren und vorrichtung für eine schnittstelle zwischen einem host-prozessor und koprozessor - Google Patents
Verfahren und vorrichtung für eine schnittstelle zwischen einem host-prozessor und koprozessorInfo
- Publication number
- DE602007011789D1 DE602007011789D1 DE602007011789T DE602007011789T DE602007011789D1 DE 602007011789 D1 DE602007011789 D1 DE 602007011789D1 DE 602007011789 T DE602007011789 T DE 602007011789T DE 602007011789 T DE602007011789 T DE 602007011789T DE 602007011789 D1 DE602007011789 D1 DE 602007011789D1
- Authority
- DE
- Germany
- Prior art keywords
- coprocessor
- interface
- host processor
- host
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
- G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4265—Bus transfer protocol, e.g. handshake; Synchronisation on a point to point bus
- G06F13/4273—Bus transfer protocol, e.g. handshake; Synchronisation on a point to point bus using a clocked protocol
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
- G06F9/3879—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
- G06F9/3881—Arrangements for communication of instructions and data
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/542,092 US8095699B2 (en) | 2006-09-29 | 2006-09-29 | Methods and apparatus for interfacing between a host processor and a coprocessor |
| PCT/US2007/020827 WO2008042207A2 (en) | 2006-09-29 | 2007-09-27 | Methods and apparatus for interfacing between a host processor and a coprocessor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE602007011789D1 true DE602007011789D1 (de) | 2011-02-17 |
Family
ID=39015988
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE602007011789T Active DE602007011789D1 (de) | 2006-09-29 | 2007-09-27 | Verfahren und vorrichtung für eine schnittstelle zwischen einem host-prozessor und koprozessor |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8095699B2 (de) |
| EP (2) | EP2069918B1 (de) |
| CN (2) | CN102681823A (de) |
| DE (1) | DE602007011789D1 (de) |
| WO (1) | WO2008042207A2 (de) |
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| US8127113B1 (en) * | 2006-12-01 | 2012-02-28 | Synopsys, Inc. | Generating hardware accelerators and processor offloads |
| CN102035778B (zh) * | 2009-09-27 | 2013-01-30 | 中国科学院计算技术研究所 | 用于宽带无线通信的数字基带处理器 |
| US8918534B2 (en) * | 2009-09-29 | 2014-12-23 | Cleversafe, Inc. | Writing data slices to ready and non-ready distributed storage units in a distributed storage network |
| JP5752382B2 (ja) * | 2010-09-29 | 2015-07-22 | 矢崎総業株式会社 | 表示装置及び画像データの転送方法 |
| US8665663B2 (en) * | 2011-04-27 | 2014-03-04 | Nanya Technology Corporation | Memory circuit and control method thereof |
| US9037770B2 (en) | 2011-05-05 | 2015-05-19 | International Business Machines Corporation | Accelerator engine emulation over an interconnect link |
| CN102226895B (zh) * | 2011-06-01 | 2013-05-01 | 展讯通信（上海）有限公司 | 协处理器和主处理器共享存储器的系统及访问方法 |
| KR101849702B1 (ko) | 2011-07-25 | 2018-04-17 | 삼성전자주식회사 | 외부 인트린직 인터페이스 |
| US10157060B2 (en) | 2011-12-29 | 2018-12-18 | Intel Corporation | Method, device and system for control signaling in a data path module of a data stream processing engine |
| CN103677971B (zh) * | 2012-09-21 | 2017-11-24 | 上海斐讯数据通信技术有限公司 | 多线程处理系统及方法 |
| US10331583B2 (en) | 2013-09-26 | 2019-06-25 | Intel Corporation | Executing distributed memory operations using processing elements connected by distributed channels |
| CN103793208B (zh) * | 2014-01-22 | 2016-07-06 | 芯原微电子(上海)有限公司 | 矢量dsp处理器和协处理器协同运作的数据处理系统 |
| US20150261535A1 (en) * | 2014-03-11 | 2015-09-17 | Cavium, Inc. | Method and apparatus for low latency exchange of data between a processor and coprocessor |
| US10268448B2 (en) * | 2016-05-06 | 2019-04-23 | Texas Instruments Incorporated | Data flow control for multi-chip-select |
| CN106776457B (zh) * | 2016-12-29 | 2020-04-03 | 郑州云海信息技术有限公司 | 一种服务器跨板共享信号的控制系统及方法 |
| US10572376B2 (en) | 2016-12-30 | 2020-02-25 | Intel Corporation | Memory ordering in acceleration hardware |
| US10558575B2 (en) | 2016-12-30 | 2020-02-11 | Intel Corporation | Processors, methods, and systems with a configurable spatial accelerator |
| CN113721725A (zh) * | 2017-03-28 | 2021-11-30 | 上海山里智能科技有限公司 | 一种综合计算系统 |
| US11086816B2 (en) | 2017-09-28 | 2021-08-10 | Intel Corporation | Processors, methods, and systems for debugging a configurable spatial accelerator |
| US20190101952A1 (en) * | 2017-09-30 | 2019-04-04 | Intel Corporation | Processors and methods for configurable clock gating in a spatial array |
| US10565134B2 (en) | 2017-12-30 | 2020-02-18 | Intel Corporation | Apparatus, methods, and systems for multicast in a configurable spatial accelerator |
| US10564980B2 (en) | 2018-04-03 | 2020-02-18 | Intel Corporation | Apparatus, methods, and systems for conditional queues in a configurable spatial accelerator |
| US11307873B2 (en) | 2018-04-03 | 2022-04-19 | Intel Corporation | Apparatus, methods, and systems for unstructured data flow in a configurable spatial accelerator with predicate propagation and merging |
| CN108595369B (zh) * | 2018-04-28 | 2020-08-25 | 天津芯海创科技有限公司 | 算式并行计算装置及方法 |
| US11200186B2 (en) | 2018-06-30 | 2021-12-14 | Intel Corporation | Apparatuses, methods, and systems for operations in a configurable spatial accelerator |
| US10891240B2 (en) | 2018-06-30 | 2021-01-12 | Intel Corporation | Apparatus, methods, and systems for low latency communication in a configurable spatial accelerator |
| US10678724B1 (en) | 2018-12-29 | 2020-06-09 | Intel Corporation | Apparatuses, methods, and systems for in-network storage in a configurable spatial accelerator |
| US11436166B2 (en) * | 2019-02-05 | 2022-09-06 | Arm Limited | Data processing systems |
| US10965536B2 (en) | 2019-03-30 | 2021-03-30 | Intel Corporation | Methods and apparatus to insert buffers in a dataflow graph |
| US10817291B2 (en) | 2019-03-30 | 2020-10-27 | Intel Corporation | Apparatuses, methods, and systems for swizzle operations in a configurable spatial accelerator |
| US11029927B2 (en) | 2019-03-30 | 2021-06-08 | Intel Corporation | Methods and apparatus to detect and annotate backedges in a dataflow graph |
| US10915471B2 (en) | 2019-03-30 | 2021-02-09 | Intel Corporation | Apparatuses, methods, and systems for memory interface circuit allocation in a configurable spatial accelerator |
| US11037050B2 (en) | 2019-06-29 | 2021-06-15 | Intel Corporation | Apparatuses, methods, and systems for memory interface circuit arbitration in a configurable spatial accelerator |
| US11907713B2 (en) | 2019-12-28 | 2024-02-20 | Intel Corporation | Apparatuses, methods, and systems for fused operations using sign modification in a processing element of a configurable spatial accelerator |
| CN112834820B (zh) * | 2021-04-09 | 2024-01-23 | 杭州万高科技股份有限公司 | 一种电能表及其计量装置 |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4812973A (en) | 1984-02-29 | 1989-03-14 | Kabushiki Kaisha Toshiba | Multiprocessor system and control method therefor |
| US5416908A (en) | 1992-04-28 | 1995-05-16 | Allen-Bradley Company, Inc. | Interface between industrial controller components using common memory |
| US5790881A (en) | 1995-02-07 | 1998-08-04 | Sigma Designs, Inc. | Computer system including coprocessor devices simulating memory interfaces |
| JPH09258998A (ja) * | 1996-03-22 | 1997-10-03 | Sharp Corp | テストおよび診断メカニズム |
| US5925118A (en) * | 1996-10-11 | 1999-07-20 | International Business Machines Corporation | Methods and architectures for overlapped read and write operations |
| US6032212A (en) * | 1997-08-14 | 2000-02-29 | Goode; Jeff | Device and method for interfacing PCI and VMEbus with a byte swapping circuit |
| US6505290B1 (en) * | 1997-09-05 | 2003-01-07 | Motorola, Inc. | Method and apparatus for interfacing a processor to a coprocessor |
| US6081860A (en) * | 1997-11-20 | 2000-06-27 | International Business Machines Corporation | Address pipelining for data transfers |
| US6480952B2 (en) * | 1998-05-26 | 2002-11-12 | Advanced Micro Devices, Inc. | Emulation coprocessor |
| US6434650B1 (en) | 1998-10-21 | 2002-08-13 | Intel Corporation | Apparatus and method for multiplexing bi-directional data onto a low pin count bus between a host CPU and co-processor |
| US6674751B1 (en) * | 1999-06-03 | 2004-01-06 | Fujitsu Network Communications, Inc. | Serialized bus communication and control architecture |
| US20030126413A1 (en) | 2000-01-06 | 2003-07-03 | Tony S. El-Kik | Processor system including internal address generator for implementing single and burst data transfers |
| US6874044B1 (en) * | 2003-09-10 | 2005-03-29 | Supertalent Electronics, Inc. | Flash drive/reader with serial-port controller and flash-memory controller mastering a second RAM-buffer bus parallel to a CPU bus |
| GB2398199A (en) * | 2003-02-10 | 2004-08-11 | Nokia Corp | A system for transferring content audio and video data from a provider to a personal digital assistant |
| JP4182801B2 (ja) * | 2003-04-24 | 2008-11-19 | 日本電気株式会社 | マルチプロセサシステム |
| KR100575723B1 (ko) | 2003-06-14 | 2006-05-03 | 엘지전자 주식회사 | 시분할 동기 코드 분할 방식의 채널 판단 방법 |
| DE10355643B4 (de) | 2003-11-28 | 2006-04-20 | Infineon Technologies Ag | Mobilstation zum Verarbeiten von Signalen des GSM- und des TD-SCDMA-Funkstandards |
| JP2005258719A (ja) * | 2004-03-10 | 2005-09-22 | Matsushita Electric Ind Co Ltd | データ処理システム及びスレーブデバイス |
| US7870176B2 (en) | 2004-07-08 | 2011-01-11 | Asocs Ltd. | Method of and apparatus for implementing fast orthogonal transforms of variable size |
| US7343155B2 (en) | 2004-10-15 | 2008-03-11 | Spreadtrum Communications Corporation | Maximum ratio combining of channel estimation for joint detection in TD-SCDMA systems |
| US7533106B2 (en) * | 2005-09-09 | 2009-05-12 | Quickfilter Technologies, Inc. | Data structures and circuit for multi-channel data transfers using a serial peripheral interface |
| US7761633B2 (en) * | 2007-01-29 | 2010-07-20 | Microsemi Corp. - Analog Mixed Signal Group Ltd. | Addressable serial peripheral interface |
-
2006
- 2006-09-29 US US11/542,092 patent/US8095699B2/en active Active
-
2007
- 2007-09-27 CN CN2012100223462A patent/CN102681823A/zh active Pending
- 2007-09-27 DE DE602007011789T patent/DE602007011789D1/de active Active
- 2007-09-27 EP EP07852442A patent/EP2069918B1/de active Active
- 2007-09-27 WO PCT/US2007/020827 patent/WO2008042207A2/en active Application Filing
- 2007-09-27 CN CN2007800365511A patent/CN101523345B/zh active Active
- 2007-09-27 EP EP10174359A patent/EP2251792B1/de active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN101523345A (zh) | 2009-09-02 |
| WO2008042207A3 (en) | 2008-06-26 |
| US8095699B2 (en) | 2012-01-10 |
| EP2069918B1 (de) | 2011-01-05 |
| WO2008042207A2 (en) | 2008-04-10 |
| CN101523345B (zh) | 2012-04-25 |
| CN102681823A (zh) | 2012-09-19 |
| US20080155135A1 (en) | 2008-06-26 |
| EP2251792A1 (de) | 2010-11-17 |
| EP2069918A2 (de) | 2009-06-17 |
| EP2251792B1 (de) | 2013-02-20 |
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