DE60105375D1 - Herstellungsverfahren einer elektronischen Packungsanordnung - Google Patents
Herstellungsverfahren einer elektronischen PackungsanordnungInfo
- Publication number
- DE60105375D1 DE60105375D1 DE60105375T DE60105375T DE60105375D1 DE 60105375 D1 DE60105375 D1 DE 60105375D1 DE 60105375 T DE60105375 T DE 60105375T DE 60105375 T DE60105375 T DE 60105375T DE 60105375 D1 DE60105375 D1 DE 60105375D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing process
- electronic packaging
- packaging arrangement
- arrangement
- electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00830796 | 2000-11-30 | ||
EP00830796A EP1211721A1 (de) | 2000-11-30 | 2000-11-30 | Verbesserte elektronische Packungsanordnung und Herstellungsverfahren dafür |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60105375D1 true DE60105375D1 (de) | 2004-10-14 |
DE60105375T2 DE60105375T2 (de) | 2005-09-22 |
Family
ID=8175575
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60105375T Expired - Lifetime DE60105375T2 (de) | 2000-11-30 | 2001-11-29 | Herstellungsverfahren einer elektronischen Packungsanordnung |
Country Status (3)
Country | Link |
---|---|
US (1) | US20020070464A1 (de) |
EP (1) | EP1211721A1 (de) |
DE (1) | DE60105375T2 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6900508B2 (en) | 2002-04-16 | 2005-05-31 | Stmicroelectronics, Inc. | Embedded flat film molding |
DE10327694A1 (de) | 2003-06-20 | 2005-01-05 | Robert Bosch Gmbh | Optische Sensoranordnung und entsprechendes Herstellungsverfahren |
US7199438B2 (en) * | 2003-09-23 | 2007-04-03 | Advanced Semiconductor Engineering, Inc. | Overmolded optical package |
GB0412435D0 (en) * | 2004-06-04 | 2004-07-07 | Melexis Nv | Packaged intergrated circuit devices |
DE102004027512A1 (de) * | 2004-06-04 | 2005-12-22 | Robert Bosch Gmbh | Spektroskopischer Gassensor, insbesondere zum Nachweis mindestens einer Gaskomponente in der Umluft, und Verfahren zur Herstellung eines derartigen spektroskopischen Gassensors |
DE102004031316B3 (de) | 2004-06-29 | 2005-12-29 | Robert Bosch Gmbh | Gassensor-Modul zur spektroskopischen Messung einer Gaskonzentration |
US7897920B2 (en) * | 2005-09-21 | 2011-03-01 | Analog Devices, Inc. | Radiation sensor device and method |
DE102007038515A1 (de) * | 2006-11-09 | 2008-05-15 | Robert Bosch Gmbh | Vorrichtung zur Passivierung eines Bauelements und Verfahren zur Herstellung der Vorrichtung |
ITMI20072099A1 (it) * | 2007-10-30 | 2009-04-30 | St Microelectronics Srl | Metodo di fabbricazione di un dispositivo elettronico comprendente dispositivi mems incapsulati per stampaggio |
EP2224218B1 (de) * | 2009-02-25 | 2018-11-28 | Sensirion Automotive Solutions AG | Sensor in einer geformten Verpackung und Herstellungsverfahren dafür |
JP5759943B2 (ja) * | 2012-06-15 | 2015-08-05 | 日立オートモティブシステムズ株式会社 | 熱式流量計 |
US9677950B2 (en) | 2013-03-14 | 2017-06-13 | Robert Bosch Gmbh | Portable device with temperature sensing |
IT201700055921A1 (it) | 2017-05-23 | 2018-11-23 | St Microelectronics Srl | Dispositivo a semiconduttore, circuito e procedimento corrispondenti |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5105262A (en) * | 1988-09-19 | 1992-04-14 | Ford Motor Company | Thick film circuit housing assembly design |
KR960009089B1 (ko) * | 1993-03-04 | 1996-07-10 | 문정환 | 패키지 성형용 금형 및 그 금형을 이용한 플라스틱 고체촬상소자 패키지 제조방법 및 패키지 |
KR970005706B1 (ko) * | 1994-01-24 | 1997-04-19 | 금성일렉트론 주식회사 | 고체촬상소자 및 그 제조방법 |
NL1003315C2 (nl) * | 1996-06-11 | 1997-12-17 | Europ Semiconductor Assembly E | Werkwijze voor het inkapselen van een geïntegreerde halfgeleiderschake- ling. |
US6069027A (en) * | 1997-05-21 | 2000-05-30 | Lsi Logic Corporation | Fixture for lid-attachment for encapsulated packages |
FR2782388B1 (fr) * | 1998-08-11 | 2000-11-03 | Trixell Sas | Detecteur de rayonnement a l'etat solide a duree de vie accrue |
US6331452B1 (en) * | 1999-04-12 | 2001-12-18 | Verdicom, Inc. | Method of fabricating integrated circuit package with opening allowing access to die |
-
2000
- 2000-11-30 EP EP00830796A patent/EP1211721A1/de not_active Withdrawn
-
2001
- 2001-11-29 DE DE60105375T patent/DE60105375T2/de not_active Expired - Lifetime
- 2001-11-30 US US09/997,995 patent/US20020070464A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
DE60105375T2 (de) | 2005-09-22 |
EP1211721A1 (de) | 2002-06-05 |
US20020070464A1 (en) | 2002-06-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |