DE60045230D1 - Eingangs/Ausgangszellenanordnung für mehrere Eingangs/Ausgangsstandards - Google Patents
Eingangs/Ausgangszellenanordnung für mehrere Eingangs/AusgangsstandardsInfo
- Publication number
- DE60045230D1 DE60045230D1 DE60045230T DE60045230T DE60045230D1 DE 60045230 D1 DE60045230 D1 DE 60045230D1 DE 60045230 T DE60045230 T DE 60045230T DE 60045230 T DE60045230 T DE 60045230T DE 60045230 D1 DE60045230 D1 DE 60045230D1
- Authority
- DE
- Germany
- Prior art keywords
- input
- output
- cell arrangement
- standards
- multiple input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17736—Structural details of routing resources
- H03K19/17744—Structural details of routing resources for input/output signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12623599P | 1999-03-24 | 1999-03-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE60045230D1 true DE60045230D1 (de) | 2010-12-30 |
Family
ID=22423748
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE60045230T Expired - Lifetime DE60045230D1 (de) | 1999-03-24 | 2000-03-24 | Eingangs/Ausgangszellenanordnung für mehrere Eingangs/Ausgangsstandards |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US6271679B1 (de) |
| EP (2) | EP2288030A1 (de) |
| JP (2) | JP4785224B2 (de) |
| DE (1) | DE60045230D1 (de) |
Families Citing this family (86)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6825698B2 (en) * | 2001-08-29 | 2004-11-30 | Altera Corporation | Programmable high speed I/O interface |
| US6242943B1 (en) * | 1998-12-31 | 2001-06-05 | Khaled Ahmad El-Ayat | Programmable multi-standard I/O architecture for FPGAS |
| US6762621B1 (en) * | 1998-12-31 | 2004-07-13 | Actel Corporation | Programmable multi-standard I/O architecture for FPGAs |
| US6836151B1 (en) * | 1999-03-24 | 2004-12-28 | Altera Corporation | I/O cell configuration for multiple I/O standards |
| US6864710B1 (en) * | 1999-12-30 | 2005-03-08 | Cypress Semiconductor Corp. | Programmable logic device |
| US6388464B1 (en) | 1999-12-30 | 2002-05-14 | Cypress Semiconductor Corp. | Configurable memory for programmable logic circuits |
| US6608500B1 (en) * | 2000-03-31 | 2003-08-19 | Cypress Semiconductor Corp. | I/O architecture/cell design for programmable logic device |
| US6535043B2 (en) * | 2000-05-26 | 2003-03-18 | Lattice Semiconductor Corp | Clock signal selection system, method of generating a clock signal and programmable clock manager including same |
| US6487710B1 (en) * | 2000-06-30 | 2002-11-26 | Xilinx, Inc. | Method and apparatus for assigning PLD signal routes to input signals having different voltage requirements |
| US8176296B2 (en) | 2000-10-26 | 2012-05-08 | Cypress Semiconductor Corporation | Programmable microcontroller architecture |
| US8103496B1 (en) | 2000-10-26 | 2012-01-24 | Cypress Semicondutor Corporation | Breakpoint control in an in-circuit emulation system |
| US7765095B1 (en) | 2000-10-26 | 2010-07-27 | Cypress Semiconductor Corporation | Conditional branching in an in-circuit emulation system |
| US8149048B1 (en) | 2000-10-26 | 2012-04-03 | Cypress Semiconductor Corporation | Apparatus and method for programmable power management in a programmable analog circuit block |
| US6724220B1 (en) | 2000-10-26 | 2004-04-20 | Cyress Semiconductor Corporation | Programmable microcontroller architecture (mixed analog/digital) |
| US7962716B2 (en) | 2001-03-22 | 2011-06-14 | Qst Holdings, Inc. | Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements |
| US7249242B2 (en) | 2002-10-28 | 2007-07-24 | Nvidia Corporation | Input pipeline registers for a node in an adaptive computing engine |
| US7325123B2 (en) | 2001-03-22 | 2008-01-29 | Qst Holdings, Llc | Hierarchical interconnect for configuring separate interconnects for each group of fixed and diverse computational elements |
| US6836839B2 (en) | 2001-03-22 | 2004-12-28 | Quicksilver Technology, Inc. | Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements |
| US7752419B1 (en) | 2001-03-22 | 2010-07-06 | Qst Holdings, Llc | Method and system for managing hardware resources to implement system functions using an adaptive computing architecture |
| US7653710B2 (en) | 2002-06-25 | 2010-01-26 | Qst Holdings, Llc. | Hardware task manager |
| US6605962B2 (en) | 2001-05-06 | 2003-08-12 | Altera Corporation | PLD architecture for flexible placement of IP function blocks |
| US6577678B2 (en) | 2001-05-08 | 2003-06-10 | Quicksilver Technology | Method and system for reconfigurable channel coding |
| US7406674B1 (en) | 2001-10-24 | 2008-07-29 | Cypress Semiconductor Corporation | Method and apparatus for generating microcontroller configuration information |
| US8078970B1 (en) | 2001-11-09 | 2011-12-13 | Cypress Semiconductor Corporation | Graphical user interface with user-selectable list-box |
| US8042093B1 (en) | 2001-11-15 | 2011-10-18 | Cypress Semiconductor Corporation | System providing automatic source code generation for personalization and parameterization of user modules |
| US6971004B1 (en) | 2001-11-19 | 2005-11-29 | Cypress Semiconductor Corp. | System and method of dynamically reconfiguring a programmable integrated circuit |
| US8069405B1 (en) | 2001-11-19 | 2011-11-29 | Cypress Semiconductor Corporation | User interface for efficiently browsing an electronic document using data-driven tabs |
| US7770113B1 (en) | 2001-11-19 | 2010-08-03 | Cypress Semiconductor Corporation | System and method for dynamically generating a configuration datasheet |
| US7774190B1 (en) | 2001-11-19 | 2010-08-10 | Cypress Semiconductor Corporation | Sleep and stall in an in-circuit emulation system |
| US7844437B1 (en) | 2001-11-19 | 2010-11-30 | Cypress Semiconductor Corporation | System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit |
| US7046635B2 (en) | 2001-11-28 | 2006-05-16 | Quicksilver Technology, Inc. | System for authorizing functionality in adaptable hardware devices |
| US8412915B2 (en) | 2001-11-30 | 2013-04-02 | Altera Corporation | Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements |
| US6986021B2 (en) | 2001-11-30 | 2006-01-10 | Quick Silver Technology, Inc. | Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements |
| US7215701B2 (en) | 2001-12-12 | 2007-05-08 | Sharad Sambhwani | Low I/O bandwidth method and system for implementing detection and identification of scrambling codes |
| US7403981B2 (en) | 2002-01-04 | 2008-07-22 | Quicksilver Technology, Inc. | Apparatus and method for adaptive multimedia reception and transmission in communication environments |
| US8103497B1 (en) | 2002-03-28 | 2012-01-24 | Cypress Semiconductor Corporation | External interface for event architecture |
| US6836149B2 (en) | 2002-04-12 | 2004-12-28 | Stmicroelectronics, Inc. | Versatile RSDS-LVDS-miniLVDS-BLVDS differential signal interface circuit |
| US7308608B1 (en) | 2002-05-01 | 2007-12-11 | Cypress Semiconductor Corporation | Reconfigurable testing system and method |
| US7660984B1 (en) | 2003-05-13 | 2010-02-09 | Quicksilver Technology | Method and system for achieving individualized protected space in an operating system |
| US7328414B1 (en) | 2003-05-13 | 2008-02-05 | Qst Holdings, Llc | Method and system for creating and programming an adaptive computing engine |
| KR100493020B1 (ko) * | 2002-07-05 | 2005-06-07 | 삼성전자주식회사 | 고 주파수 동작을 위한 출력 드라이버를 구비하는 반도체메모리 장치 |
| US6753698B2 (en) * | 2002-08-08 | 2004-06-22 | International Business Machines Corporation | Low power low voltage transistor—transistor logic I/O driver |
| US8108656B2 (en) | 2002-08-29 | 2012-01-31 | Qst Holdings, Llc | Task definition for specifying resource requirements |
| US7761845B1 (en) | 2002-09-09 | 2010-07-20 | Cypress Semiconductor Corporation | Method for parameterizing a user module |
| US7937591B1 (en) | 2002-10-25 | 2011-05-03 | Qst Holdings, Llc | Method and system for providing a device which can be adapted on an ongoing basis |
| US8276135B2 (en) | 2002-11-07 | 2012-09-25 | Qst Holdings Llc | Profiling of software and circuit designs utilizing data operation analyses |
| US7225301B2 (en) | 2002-11-22 | 2007-05-29 | Quicksilver Technologies | External memory controller node |
| WO2004061903A2 (en) * | 2002-12-18 | 2004-07-22 | Easic Corporation | Method for fabrication of semiconductor device |
| US6831480B1 (en) * | 2003-01-07 | 2004-12-14 | Altera Corporation | Programmable logic device multispeed I/O circuitry |
| US6940302B1 (en) * | 2003-01-07 | 2005-09-06 | Altera Corporation | Integrated circuit output driver circuitry with programmable preemphasis |
| US7307446B1 (en) | 2003-01-07 | 2007-12-11 | Altera Corporation | Integrated circuit output driver circuitry with programmable preemphasis |
| US7106103B2 (en) * | 2003-12-10 | 2006-09-12 | Hewlett-Packard Development Company, L.P. | Selectable integrated circuit interface |
| US7295049B1 (en) | 2004-03-25 | 2007-11-13 | Cypress Semiconductor Corporation | Method and circuit for rapid alignment of signals |
| US7400167B2 (en) * | 2005-08-16 | 2008-07-15 | Altera Corporation | Apparatus and methods for optimizing the performance of programmable logic devices |
| FR2872629B1 (fr) * | 2004-06-30 | 2007-07-13 | St Microelectronics Sa | Circuit integre ayant une borne d'entree/sortie configurable dans une gamme de tension determinee |
| US8069436B2 (en) | 2004-08-13 | 2011-11-29 | Cypress Semiconductor Corporation | Providing hardware independence to automate code generation of processing device firmware |
| JP4580202B2 (ja) * | 2004-09-03 | 2010-11-10 | 富士通セミコンダクター株式会社 | 半導体装置の電圧供給回路 |
| US7196542B1 (en) * | 2004-10-28 | 2007-03-27 | Altera Corporation | Techniques for providing increased flexibility to input/output banks with respect to supply voltages |
| US20060119382A1 (en) * | 2004-12-07 | 2006-06-08 | Shumarayev Sergey Y | Apparatus and methods for adjusting performance characteristics of programmable logic devices |
| US7332976B1 (en) | 2005-02-04 | 2008-02-19 | Cypress Semiconductor Corporation | Poly-phase frequency synthesis oscillator |
| US7400183B1 (en) | 2005-05-05 | 2008-07-15 | Cypress Semiconductor Corporation | Voltage controlled oscillator delay cell and method |
| US7523430B1 (en) * | 2005-09-09 | 2009-04-21 | Altera Corporation | Programmable logic device design tool with simultaneous switching noise awareness |
| US8085067B1 (en) | 2005-12-21 | 2011-12-27 | Cypress Semiconductor Corporation | Differential-to-single ended signal converter circuit and method |
| US8045353B2 (en) * | 2005-12-30 | 2011-10-25 | Stmicroelectronics Pvt. Ltd. | Integrated circuit capable of operating at different supply voltages |
| US8067948B2 (en) | 2006-03-27 | 2011-11-29 | Cypress Semiconductor Corporation | Input/output multiplexer bus |
| US7506296B1 (en) | 2006-04-18 | 2009-03-17 | Altera Corporation | Programmable logic device design tool with support for variable predriver power supply levels |
| US7953162B2 (en) * | 2006-11-17 | 2011-05-31 | Intersil Americas Inc. | Use of differential pair as single-ended data paths to transport low speed data |
| US8026739B2 (en) | 2007-04-17 | 2011-09-27 | Cypress Semiconductor Corporation | System level interconnect with programmable switching |
| US7737724B2 (en) * | 2007-04-17 | 2010-06-15 | Cypress Semiconductor Corporation | Universal digital block interconnection and channel routing |
| US9564902B2 (en) | 2007-04-17 | 2017-02-07 | Cypress Semiconductor Corporation | Dynamically configurable and re-configurable data path |
| US8040266B2 (en) | 2007-04-17 | 2011-10-18 | Cypress Semiconductor Corporation | Programmable sigma-delta analog-to-digital converter |
| US8092083B2 (en) | 2007-04-17 | 2012-01-10 | Cypress Semiconductor Corporation | Temperature sensor with digital bandgap |
| US8130025B2 (en) | 2007-04-17 | 2012-03-06 | Cypress Semiconductor Corporation | Numerical band gap |
| US8516025B2 (en) | 2007-04-17 | 2013-08-20 | Cypress Semiconductor Corporation | Clock driven dynamic datapath chaining |
| US9720805B1 (en) | 2007-04-25 | 2017-08-01 | Cypress Semiconductor Corporation | System and method for controlling a target device |
| US8065653B1 (en) | 2007-04-25 | 2011-11-22 | Cypress Semiconductor Corporation | Configuration of programmable IC design elements |
| US8266575B1 (en) | 2007-04-25 | 2012-09-11 | Cypress Semiconductor Corporation | Systems and methods for dynamically reconfiguring a programmable system on a chip |
| US8049569B1 (en) | 2007-09-05 | 2011-11-01 | Cypress Semiconductor Corporation | Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes |
| US7893772B1 (en) | 2007-12-03 | 2011-02-22 | Cypress Semiconductor Corporation | System and method of loading a programmable counter |
| JP4928434B2 (ja) * | 2007-12-27 | 2012-05-09 | 株式会社リコー | 画像形成装置および画像形成方法 |
| US9448964B2 (en) | 2009-05-04 | 2016-09-20 | Cypress Semiconductor Corporation | Autonomous control in a programmable system |
| US8289051B2 (en) * | 2010-11-17 | 2012-10-16 | Lsi Corporation | Input/output core design and method of manufacture therefor |
| US9484891B2 (en) * | 2011-01-25 | 2016-11-01 | Rambus Inc. | Multi-modal communication interface |
| US9471484B2 (en) | 2012-09-19 | 2016-10-18 | Novachips Canada Inc. | Flash memory controller having dual mode pin-out |
| US9000799B1 (en) * | 2013-10-01 | 2015-04-07 | Texas Instruments Incorporated | Method to achieve true fail safe compliance and ultra low pin current during power-up sequencing for mobile interfaces |
| US9383794B2 (en) | 2014-06-11 | 2016-07-05 | Freescale Semiconductor, Inc. | Integrated circuit with multi-voltage input/output (I/O) cells |
Family Cites Families (67)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2417054C3 (de) | 1974-04-08 | 1983-02-10 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung mit zwei miteinander verknüpften Schaltkreissystemen |
| US4469959A (en) * | 1982-03-15 | 1984-09-04 | Motorola, Inc. | Input buffer |
| US4472647A (en) | 1982-08-20 | 1984-09-18 | Motorola, Inc. | Circuit for interfacing with both TTL and CMOS voltage levels |
| JPS5961046A (ja) | 1982-09-30 | 1984-04-07 | Fujitsu Ltd | 集積回路装置 |
| US4527079A (en) | 1983-11-01 | 1985-07-02 | Advanced Micro Devices, Inc. | Integrated circuit device accepting inputs and providing outputs at the levels of different logic families |
| JPH0773205B2 (ja) | 1983-12-20 | 1995-08-02 | 株式会社日立製作所 | レベル変換回路 |
| US4617479B1 (en) | 1984-05-03 | 1993-09-21 | Altera Semiconductor Corp. | Programmable logic array device using eprom technology |
| US4933577A (en) | 1985-03-22 | 1990-06-12 | Advanced Micro Devices, Inc. | Output circuit for a programmable logic array |
| US4742252A (en) | 1985-03-29 | 1988-05-03 | Advanced Micro Devices, Inc. | Multiple array customizable logic device |
| US4820937A (en) | 1985-09-19 | 1989-04-11 | Xilinx, Incorporated | TTL/CMOS compatible input buffer |
| US4783607A (en) | 1986-11-05 | 1988-11-08 | Xilinx, Inc. | TTL/CMOS compatible input buffer with Schmitt trigger |
| US4791312A (en) | 1987-06-08 | 1988-12-13 | Grumman Aerospace Corporation | Programmable level shifting interface device |
| JPH0646707B2 (ja) | 1988-06-30 | 1994-06-15 | 川崎製鉄株式会社 | プログラマブル論理素子 |
| JPH01259274A (ja) | 1988-04-08 | 1989-10-16 | Fujitsu Ltd | 集積回路の試験方式 |
| JPH01274512A (ja) | 1988-04-27 | 1989-11-02 | Hitachi Ltd | 半導体論理装置 |
| US4871930A (en) | 1988-05-05 | 1989-10-03 | Altera Corporation | Programmable logic device with array blocks connected via programmable interconnect |
| US4879481A (en) | 1988-09-02 | 1989-11-07 | Cypress Semiconductor Corporation | Dual I/O macrocell for high speed synchronous state machine |
| JP2772051B2 (ja) | 1988-09-08 | 1998-07-02 | 川崎製鉄株式会社 | プログラマブル入出力回路及びプログラマブル論理素子 |
| US4987319A (en) * | 1988-09-08 | 1991-01-22 | Kawasaki Steel Corporation | Programmable input/output circuit and programmable logic device |
| JPH0288332U (de) | 1988-12-23 | 1990-07-12 | ||
| US4999529A (en) | 1989-06-30 | 1991-03-12 | At&T Bell Laboratories | Programmable logic level input buffer |
| US5233539A (en) * | 1989-08-15 | 1993-08-03 | Advanced Micro Devices, Inc. | Programmable gate array with improved interconnect structure, input/output structure and configurable logic block |
| US5027011A (en) | 1989-10-31 | 1991-06-25 | Sgs-Thomson Microelectronics, Inc. | Input row drivers for programmable logic devices |
| JPH03166821A (ja) | 1989-11-27 | 1991-07-18 | Hitachi Ltd | 半導体集積回路装置 |
| US4975602A (en) | 1990-02-23 | 1990-12-04 | The United States Of America As Represented By The Secretary Of The Navy | Logic level data conversion system |
| US5028821A (en) | 1990-03-01 | 1991-07-02 | Plus Logic, Inc. | Programmable logic device with programmable inverters at input/output pads |
| US5023488A (en) | 1990-03-30 | 1991-06-11 | Xerox Corporation | Drivers and receivers for interfacing VLSI CMOS circuits to transmission lines |
| US4994691A (en) | 1990-04-16 | 1991-02-19 | Advanced Micro Devices, Inc. | TTL-to-CML translator circuit |
| US5151619A (en) | 1990-10-11 | 1992-09-29 | International Business Machines Corporation | Cmos off chip driver circuit |
| JPH04223617A (ja) | 1990-12-25 | 1992-08-13 | Ricoh Co Ltd | 半導体集積回路装置のインターフェース |
| US5241224A (en) | 1991-04-25 | 1993-08-31 | Altera Corporation | High-density erasable programmable logic device architecture using multiplexer interconnections |
| US5221865A (en) | 1991-06-21 | 1993-06-22 | Crosspoint Solutions, Inc. | Programmable input/output buffer circuit with test capability |
| US5436575A (en) | 1991-09-03 | 1995-07-25 | Altera Corporation | Programmable logic array integrated circuits |
| US5260611A (en) | 1991-09-03 | 1993-11-09 | Altera Corporation | Programmable logic array having local and long distance conductors |
| US5260610A (en) | 1991-09-03 | 1993-11-09 | Altera Corporation | Programmable logic element interconnections for programmable logic array integrated circuits |
| US5550782A (en) | 1991-09-03 | 1996-08-27 | Altera Corporation | Programmable logic array integrated circuits |
| DE4133764C1 (de) | 1991-10-11 | 1993-02-18 | Texas Instruments Deutschland Gmbh, 8050 Freising, De | |
| US5282271A (en) | 1991-10-30 | 1994-01-25 | I-Cube Design Systems, Inc. | I/O buffering system to a programmable switching apparatus |
| US5428800A (en) | 1991-10-30 | 1995-06-27 | I-Cube, Inc. | Input/output (I/O) bidirectional buffer for interfacing I/O ports of a field programmable interconnection device with array ports of a cross-point switch |
| US5239510A (en) | 1991-11-25 | 1993-08-24 | At&T Bell Laboratories | Multiple voltage supplies for field programmable gate arrays and the like |
| US5235219A (en) | 1992-04-01 | 1993-08-10 | Gte Laboratories Incorporated | Electrical circuitry with threshold control |
| US5428305A (en) | 1992-04-29 | 1995-06-27 | Hughes Aircraft Company | Differential logic level translator circuit with dual output logic levels selectable by power connector options |
| US5258668A (en) | 1992-05-08 | 1993-11-02 | Altera Corporation | Programmable logic array integrated circuits with cascade connections between logic modules |
| US5369317A (en) | 1992-06-26 | 1994-11-29 | Micron Technology, Inc. | Circuit and method for controlling the potential of a digit line and in limiting said potential to a maximum value |
| EP0608515A1 (de) | 1993-01-29 | 1994-08-03 | Motorola, Inc. | Ausgangstreiber mit programmierbarer Steuerung |
| US5300835A (en) | 1993-02-10 | 1994-04-05 | Cirrus Logic, Inc. | CMOS low power mixed voltage bidirectional I/O buffer |
| US5317210A (en) | 1993-02-23 | 1994-05-31 | Altera Corporation | I/O cell for programmable logic device providing latched, unlatched, and fast inputs |
| US5406139A (en) | 1993-03-19 | 1995-04-11 | Advanced Micro Devices, Inc. | Input buffer utilizing a cascode to provide a zero power TTL to CMOS input with high speed switching |
| US5311080A (en) | 1993-03-26 | 1994-05-10 | At&T Bell Laboratories | Field programmable gate array with direct input/output connection |
| US5332935A (en) | 1993-04-12 | 1994-07-26 | Sierra Semiconductor | ECL and TTL to CMOS logic converter |
| US5440249A (en) * | 1994-05-03 | 1995-08-08 | Motorola, Inc. | Voltage level translator circuit with cascoded output transistors |
| US5589783A (en) | 1994-07-29 | 1996-12-31 | Sgs-Thomson Microelectronics, Inc. | Variable input threshold adjustment |
| US5521530A (en) * | 1994-08-31 | 1996-05-28 | Oki Semiconductor America, Inc. | Efficient method and resulting structure for integrated circuits with flexible I/O interface and power supply voltages |
| US5534794A (en) | 1994-12-01 | 1996-07-09 | Analog Devices, Inc. | Selectable logic output stage |
| US5594373A (en) | 1994-12-20 | 1997-01-14 | Sgs-Thomson Microelectronics, Inc. | Output driver circuitry with selective limited output high voltage |
| GB2300946B (en) * | 1995-05-17 | 1999-10-20 | Altera Corp | Tri-statable input/output circuitry for programmable logic |
| US5612637A (en) | 1995-05-26 | 1997-03-18 | National Semiconductor Corporation | Supply and interface configurable input/output buffer |
| JPH098637A (ja) | 1995-06-21 | 1997-01-10 | Fujitsu Ltd | 半導体装置 |
| US5583454A (en) | 1995-12-01 | 1996-12-10 | Advanced Micro Devices, Inc. | Programmable input/output driver circuit capable of operating at a variety of voltage levels and having a programmable pullup/pulldown function |
| JPH1012823A (ja) * | 1996-06-21 | 1998-01-16 | Nkk Corp | ２電源型集積回路 |
| US5815013A (en) * | 1996-09-18 | 1998-09-29 | Intel Corporation | Self back-bias compensating P-driver for multiple voltage switching environments |
| US5877632A (en) * | 1997-04-11 | 1999-03-02 | Xilinx, Inc. | FPGA with a plurality of I/O voltage levels |
| US5958026A (en) | 1997-04-11 | 1999-09-28 | Xilinx, Inc. | Input/output buffer supporting multiple I/O standards |
| JPH10326489A (ja) * | 1997-05-26 | 1998-12-08 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| TW343758U (en) | 1997-10-07 | 1998-10-21 | Faraday technology co ltd | I/O & auto control I/O |
| US6040712A (en) * | 1998-11-30 | 2000-03-21 | Altera Corporation | Apparatus and method for protecting a circuit during a hot socket condition |
| US6335637B1 (en) * | 2000-04-03 | 2002-01-01 | International Business Machines Corporation | Two-supply protection circuit |
-
2000
- 2000-03-23 US US09/535,064 patent/US6271679B1/en not_active Expired - Lifetime
- 2000-03-24 DE DE60045230T patent/DE60045230D1/de not_active Expired - Lifetime
- 2000-03-24 JP JP2000083870A patent/JP4785224B2/ja not_active Expired - Fee Related
- 2000-03-24 EP EP10179941A patent/EP2288030A1/de not_active Withdrawn
- 2000-03-24 EP EP00302450A patent/EP1039639B1/de not_active Expired - Lifetime
-
2001
- 2001-07-03 US US09/898,183 patent/US6714050B2/en not_active Expired - Lifetime
-
2011
- 2011-05-13 JP JP2011108045A patent/JP4891448B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP4891448B2 (ja) | 2012-03-07 |
| JP2011172280A (ja) | 2011-09-01 |
| JP4785224B2 (ja) | 2011-10-05 |
| EP2288030A1 (de) | 2011-02-23 |
| US6714050B2 (en) | 2004-03-30 |
| US6271679B1 (en) | 2001-08-07 |
| US20010035773A1 (en) | 2001-11-01 |
| EP1039639A3 (de) | 2000-11-29 |
| EP1039639A2 (de) | 2000-09-27 |
| EP1039639B1 (de) | 2010-11-17 |
| JP2000315731A (ja) | 2000-11-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE60045230D1 (de) | Eingangs/Ausgangszellenanordnung für mehrere Eingangs/Ausgangsstandards | |
| DE19980447D2 (de) | Solarzellenanordnung | |
| DE69943376D1 (de) | Echoverminderung für einen bitserielen mehrfachrabzweigbus | |
| DE60033235D1 (de) | Informations-ein-/ausgabe-einheit | |
| DE69940291D1 (de) | Weltraumsolarzelle | |
| DE60038853D1 (de) | Brennstoffzelle | |
| DE10066271B8 (de) | Solarzelle | |
| DE69907918T2 (de) | Solarzellen-BAUELEMENT | |
| DE60031251D1 (de) | Zelleneliminierungsmeldung | |
| DE60020974D1 (de) | Dichtung für geringe belastung | |
| DE60008527D1 (de) | Zellproliferation inhibitoren | |
| DE69941616D1 (de) | Solarzelle | |
| DE60025859D1 (de) | Verbindungsstruktur für Stromsammelschienen | |
| ATA184399A (de) | Brennstoffzelle | |
| DE59913423D1 (de) | Speicherzellenanordnung | |
| DE60142405D1 (de) | Multi-axiale lastzelle | |
| DE60041300D1 (de) | Sequentielle Bus-Architektur | |
| DE69836322D1 (de) | Integrierte schaltungsanordung für photoelektrische umwandlung | |
| NO20014010D0 (no) | <beta>-alaninderivater | |
| DE60043331D1 (de) | Ausgangsschaltung | |
| DE50014731D1 (de) | Speicherzellenanordnung | |
| DE50006021D1 (de) | Brennstoffzellenblock | |
| DE50303362D1 (de) | Kraftaufnehmer | |
| ATA138299A (de) | Brennstoffzellenanordnung | |
| DE69934286D1 (de) | Rahmengestell, insbesondere für ein Elektrogerät |