DE60015213D1 - Paralelle Wiedergabevorrichtung - Google Patents

Paralelle Wiedergabevorrichtung

Info

Publication number
DE60015213D1
DE60015213D1 DE60015213T DE60015213T DE60015213D1 DE 60015213 D1 DE60015213 D1 DE 60015213D1 DE 60015213 T DE60015213 T DE 60015213T DE 60015213 T DE60015213 T DE 60015213T DE 60015213 D1 DE60015213 D1 DE 60015213D1
Authority
DE
Germany
Prior art keywords
playback device
parallel playback
parallel
playback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60015213T
Other languages
English (en)
Other versions
DE60015213T2 (de
Inventor
Yoshihito Miyauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE60015213D1 publication Critical patent/DE60015213D1/de
Application granted granted Critical
Publication of DE60015213T2 publication Critical patent/DE60015213T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
DE60015213T 1999-03-16 2000-03-14 Paralelle Wiedergabevorrichtung Expired - Lifetime DE60015213T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP06981299A JP3169933B2 (ja) 1999-03-16 1999-03-16 並列描画装置
JP6981299 1999-03-16

Publications (2)

Publication Number Publication Date
DE60015213D1 true DE60015213D1 (de) 2004-12-02
DE60015213T2 DE60015213T2 (de) 2005-11-10

Family

ID=13413558

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60015213T Expired - Lifetime DE60015213T2 (de) 1999-03-16 2000-03-14 Paralelle Wiedergabevorrichtung

Country Status (4)

Country Link
US (1) US6529198B1 (de)
EP (1) EP1037164B1 (de)
JP (1) JP3169933B2 (de)
DE (1) DE60015213T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3633465B2 (ja) 2000-09-27 2005-03-30 日本電気株式会社 携帯電話端末及びそれに用いる画面遷移制御方法
JP2003030641A (ja) 2001-07-19 2003-01-31 Nec System Technologies Ltd 描画装置とその並列描画方法、及び並列描画プログラム
JP3631702B2 (ja) 2001-07-19 2005-03-23 エヌイーシーシステムテクノロジー株式会社 描画表示システム
US6920618B2 (en) * 2001-12-21 2005-07-19 Hewlett-Packard Development Company, L.P. System and method for configuring graphics pipelines in a computer graphical display system
US6853380B2 (en) * 2002-03-04 2005-02-08 Hewlett-Packard Development Company, L.P. Graphical display system and method
US20080211816A1 (en) * 2003-07-15 2008-09-04 Alienware Labs. Corp. Multiple parallel processor computer graphics system
US7119808B2 (en) * 2003-07-15 2006-10-10 Alienware Labs Corp. Multiple parallel processor computer graphics system
US7782325B2 (en) * 2003-10-22 2010-08-24 Alienware Labs Corporation Motherboard for supporting multiple graphics cards
US20090027383A1 (en) 2003-11-19 2009-01-29 Lucid Information Technology, Ltd. Computing system parallelizing the operation of multiple graphics processing pipelines (GPPLs) and supporting depth-less based image recomposition
US7961194B2 (en) * 2003-11-19 2011-06-14 Lucid Information Technology, Ltd. Method of controlling in real time the switching of modes of parallel operation of a multi-mode parallel graphics processing subsystem embodied within a host computing system
US8085273B2 (en) 2003-11-19 2011-12-27 Lucid Information Technology, Ltd Multi-mode parallel graphics rendering system employing real-time automatic scene profiling and mode control
US20080079737A1 (en) * 2003-11-19 2008-04-03 Reuven Bakalash Multi-mode parallel graphics rendering and display system supporting real-time detection of mode control commands (MCCS) programmed within pre-profiled scenes of the graphics-based application
US7808499B2 (en) * 2003-11-19 2010-10-05 Lucid Information Technology, Ltd. PC-based computing system employing parallelized graphics processing units (GPUS) interfaced with the central processing unit (CPU) using a PC bus and a hardware graphics hub having a router
US8497865B2 (en) * 2006-12-31 2013-07-30 Lucid Information Technology, Ltd. Parallel graphics system employing multiple graphics processing pipelines with multiple graphics processing units (GPUS) and supporting an object division mode of parallel graphics processing using programmable pixel or vertex processing resources provided with the GPUS
WO2006117683A2 (en) * 2005-01-25 2006-11-09 Lucid Information Technology, Ltd. Graphics processing and display system employing multiple graphics cores on a silicon chip of monolithic construction
US20060095410A1 (en) * 2004-10-29 2006-05-04 Ostrover Lewis S Personal video recorder for home network providing filtering and format conversion of content
JP2006202211A (ja) * 2005-01-24 2006-08-03 Fujitsu Ltd 画像描画装置および画像描画方法
US20090096798A1 (en) * 2005-01-25 2009-04-16 Reuven Bakalash Graphics Processing and Display System Employing Multiple Graphics Cores on a Silicon Chip of Monolithic Construction
JP5546090B2 (ja) * 2005-11-28 2014-07-09 株式会社アイ・オー・データ機器 情報処理装置、表示装置、および表示システム
US8253749B1 (en) * 2006-03-08 2012-08-28 Nvidia Corporation Using affinity masks to control multi-GPU processing
US8004535B2 (en) * 2006-06-01 2011-08-23 Qualcomm Incorporated Apparatus and method for selectively double buffering portions of displayable content
JP5448576B2 (ja) * 2008-06-03 2014-03-19 キヤノン株式会社 表示制御装置、表示制御方法及びプログラム
US20100141552A1 (en) * 2008-12-04 2010-06-10 Andrew Rodney Ferlitsch Methods and Systems for Imaging Device and Display Interaction
JP7149705B2 (ja) * 2017-12-28 2022-10-07 シャープ株式会社 情報処理装置、情報処理方法、及びプログラム

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6423677A (en) 1987-07-17 1989-01-26 Sharp Kk Image synthesizing method
JPH02150973A (ja) 1988-12-01 1990-06-11 Mitsubishi Electric Corp グラフィック表示装置
US5224210A (en) * 1989-07-28 1993-06-29 Hewlett-Packard Company Method and apparatus for graphics pipeline context switching in a multi-tasking windows system
JPH05189549A (ja) * 1991-09-10 1993-07-30 Kubota Corp マルチプロセッサによる画像データ処理装置
JPH06149757A (ja) * 1992-11-10 1994-05-31 Hitachi Ltd 並列処理装置
US5388206A (en) * 1992-11-13 1995-02-07 The University Of North Carolina Architecture and apparatus for image generation
US5392393A (en) * 1993-06-04 1995-02-21 Sun Microsystems, Inc. Architecture for a high performance three dimensional graphics accelerator
JPH07182536A (ja) 1993-12-22 1995-07-21 Hitachi Ltd 描画方式および装置
EP0693737A3 (de) * 1994-07-21 1997-01-08 Ibm Verfahren und Apparat zum Verwalten der Aufgaben in einem Mehrprozessorsystem
WO1997021192A1 (en) * 1995-12-06 1997-06-12 Intergraph Corporation Peer-to-peer parallel processing graphics accelerator
US5794016A (en) * 1995-12-11 1998-08-11 Dynamic Pictures, Inc. Parallel-processor graphics architecture
US6329996B1 (en) * 1999-01-08 2001-12-11 Silicon Graphics, Inc. Method and apparatus for synchronizing graphics pipelines

Also Published As

Publication number Publication date
EP1037164A3 (de) 2002-12-04
US6529198B1 (en) 2003-03-04
JP3169933B2 (ja) 2001-05-28
DE60015213T2 (de) 2005-11-10
JP2000267651A (ja) 2000-09-29
EP1037164A2 (de) 2000-09-20
EP1037164B1 (de) 2004-10-27

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