DE60002589D1 - System und verfahren zur initialisierung von serieller datenübertragung zwischen zwei taktbereichen - Google Patents

System und verfahren zur initialisierung von serieller datenübertragung zwischen zwei taktbereichen

Info

Publication number
DE60002589D1
DE60002589D1 DE60002589T DE60002589T DE60002589D1 DE 60002589 D1 DE60002589 D1 DE 60002589D1 DE 60002589 T DE60002589 T DE 60002589T DE 60002589 T DE60002589 T DE 60002589T DE 60002589 D1 DE60002589 D1 DE 60002589D1
Authority
DE
Germany
Prior art keywords
data transfer
serial data
clock areas
initializing serial
initializing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60002589T
Other languages
English (en)
Other versions
DE60002589T2 (de
Inventor
R Meyer
S Madrid
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE60002589D1 publication Critical patent/DE60002589D1/de
Publication of DE60002589T2 publication Critical patent/DE60002589T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G06F13/4059—Coupling between buses using bus bridges where the bridge performs a synchronising function where the synchronisation uses buffers, e.g. for speed matching between buses
DE60002589T 1999-08-31 2000-03-23 System und verfahren zur initialisierung von serieller datenübertragung zwischen zwei taktbereichen Expired - Lifetime DE60002589T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US386650 1999-08-31
US09/386,650 US6393502B1 (en) 1999-08-31 1999-08-31 System and method for initiating a serial data transfer between two clock domains
PCT/US2000/007695 WO2001016773A1 (en) 1999-08-31 2000-03-23 System and method for initiating a serial data transfer between two clock domains

Publications (2)

Publication Number Publication Date
DE60002589D1 true DE60002589D1 (de) 2003-06-12
DE60002589T2 DE60002589T2 (de) 2004-03-25

Family

ID=23526484

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60002589T Expired - Lifetime DE60002589T2 (de) 1999-08-31 2000-03-23 System und verfahren zur initialisierung von serieller datenübertragung zwischen zwei taktbereichen

Country Status (6)

Country Link
US (3) US6393502B1 (de)
EP (1) EP1214662B1 (de)
JP (1) JP4630512B2 (de)
KR (1) KR100734528B1 (de)
DE (1) DE60002589T2 (de)
WO (1) WO2001016773A1 (de)

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US7764757B2 (en) * 2006-05-30 2010-07-27 Fujitsu Limited System and method for the adjustment of offset compensation applied to a signal
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US7787534B2 (en) * 2006-05-30 2010-08-31 Fujitsu Limited System and method for adjusting offset compensation applied to a signal
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US7817757B2 (en) * 2006-05-30 2010-10-19 Fujitsu Limited System and method for independently adjusting multiple offset compensations applied to a signal
US7817712B2 (en) * 2006-05-30 2010-10-19 Fujitsu Limited System and method for independently adjusting multiple compensations applied to a signal
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US7760798B2 (en) * 2006-05-30 2010-07-20 Fujitsu Limited System and method for adjusting compensation applied to a signal
US7839958B2 (en) 2006-05-30 2010-11-23 Fujitsu Limited System and method for the adjustment of compensation applied to a signal
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US8467486B2 (en) * 2007-12-14 2013-06-18 Mosaid Technologies Incorporated Memory controller with flexible data alignment to clock
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Also Published As

Publication number Publication date
US20020090046A1 (en) 2002-07-11
EP1214662A1 (de) 2002-06-19
WO2001016773A1 (en) 2001-03-08
US6668292B2 (en) 2003-12-23
KR20020064277A (ko) 2002-08-07
EP1214662B1 (de) 2003-05-07
DE60002589T2 (de) 2004-03-25
US6393502B1 (en) 2002-05-21
JP4630512B2 (ja) 2011-02-09
KR100734528B1 (ko) 2007-07-03
US6505261B1 (en) 2003-01-07
JP2003508956A (ja) 2003-03-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: GLOBALFOUNDRIES INC. MAPLES CORPORATE SERVICES, KY