DE3850980T2 - Digital/Analog-Wandler. - Google Patents

Digital/Analog-Wandler.

Info

Publication number
DE3850980T2
DE3850980T2 DE3850980T DE3850980T DE3850980T2 DE 3850980 T2 DE3850980 T2 DE 3850980T2 DE 3850980 T DE3850980 T DE 3850980T DE 3850980 T DE3850980 T DE 3850980T DE 3850980 T2 DE3850980 T2 DE 3850980T2
Authority
DE
Germany
Prior art keywords
digital
analog converter
analog
converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3850980T
Other languages
English (en)
Other versions
DE3850980D1 (de
Inventor
Joseph H Colles
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mindspeed Technologies LLC
Original Assignee
Brooktree Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Brooktree Corp filed Critical Brooktree Corp
Application granted granted Critical
Publication of DE3850980D1 publication Critical patent/DE3850980D1/de
Publication of DE3850980T2 publication Critical patent/DE3850980T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
    • H03M1/0643—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the spatial domain
    • H03M1/0648—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the spatial domain by arranging the quantisation value generators in a non-sequential pattern layout, e.g. symmetrical
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
    • H03M1/682—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits both converters being of the unary decoded type
    • H03M1/685—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits both converters being of the unary decoded type the quantisation value generators of both converters being arranged in a common two-dimensional array

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
DE3850980T 1987-02-24 1988-02-24 Digital/Analog-Wandler. Expired - Fee Related DE3850980T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/018,014 US4812818A (en) 1987-02-24 1987-02-24 Digital-to-analog converter

Publications (2)

Publication Number Publication Date
DE3850980D1 DE3850980D1 (de) 1994-09-15
DE3850980T2 true DE3850980T2 (de) 1994-12-15

Family

ID=21785788

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3850980T Expired - Fee Related DE3850980T2 (de) 1987-02-24 1988-02-24 Digital/Analog-Wandler.

Country Status (5)

Country Link
US (1) US4812818A (de)
EP (1) EP0280277B1 (de)
JP (1) JP2930950B2 (de)
CA (1) CA1274317A (de)
DE (1) DE3850980T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2641641B2 (ja) * 1991-05-21 1997-08-20 三菱電機株式会社 Ｄａ変換器
US5269572A (en) * 1992-08-28 1993-12-14 Gold Star Manufacturing, Inc. Apparatus and method for coupling elongated members
GB2313004A (en) * 1996-05-07 1997-11-12 Advanced Risc Mach Ltd Digital to analogue converter
US5949362A (en) * 1997-08-22 1999-09-07 Harris Corporation Digital-to-analog converter including current cell matrix with enhanced linearity and associated methods
GB2333190B (en) * 1998-01-08 2002-03-27 Fujitsu Ltd Cell array circuitry
DE60115003T2 (de) * 2000-04-04 2006-08-10 Koninklijke Philips Electronics N.V. Ein digital-analog-wandler
GB0101307D0 (en) * 2000-10-26 2001-02-28 Fujitsu Ltd Segmented circuitry
DE60119476T2 (de) * 2000-10-26 2006-11-23 Fujitsu Ltd., Kawasaki Segmentierte Schaltungsanordnung
EP1202459B1 (de) * 2000-10-26 2006-05-10 Fujitsu Limited Segmentierte Schaltungsanordnung
CN111431528B (zh) * 2020-04-10 2023-11-28 上海安路信息科技股份有限公司 Dac误差补偿方法及误差补偿系统

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3995304A (en) * 1972-01-10 1976-11-30 Teledyne, Inc. D/A bit switch
US4146882A (en) * 1976-08-24 1979-03-27 Intel Corporation Digital-to-analog converter employing two levels of decoding
US4398207A (en) * 1976-08-24 1983-08-09 Intel Corporation MOS Digital-to-analog converter with resistor chain using compensating "dummy" metal contacts
GB1592856A (en) * 1976-11-27 1981-07-08 Ferranti Ltd Semiconductor devices
US4599634A (en) * 1978-08-15 1986-07-08 National Semiconductor Corporation Stress insensitive integrated circuit
JPH0119474Y2 (de) * 1980-12-02 1989-06-06
JPS5936421A (ja) * 1982-08-23 1984-02-28 Matsushita Electric Ind Co Ltd Ｄ／ａコンバ−タ
JPS5961162A (ja) * 1982-09-30 1984-04-07 Fujitsu Ltd 半導体集積回路
US4658240A (en) * 1984-05-07 1987-04-14 Brooktree Corporation Apparatus for converting data between analog and digital values
JPS6126330A (ja) * 1984-07-16 1986-02-05 Toshiba Corp 抵抗分圧回路
JPH071870B2 (ja) * 1984-07-31 1995-01-11 日本電気株式会社 ディジタル／アナログ変換回路

Also Published As

Publication number Publication date
US4812818A (en) 1989-03-14
JPS6447128A (en) 1989-02-21
EP0280277A2 (de) 1988-08-31
CA1274317A (en) 1990-09-18
EP0280277A3 (en) 1990-10-31
JP2930950B2 (ja) 1999-08-09
DE3850980D1 (de) 1994-09-15
EP0280277B1 (de) 1994-08-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee