DE3751853D1 - Vorrichtung für ein fehlertolerantes Rechnersystem mit erweiterungsfähigem Prozessorabschnitt - Google Patents
Vorrichtung für ein fehlertolerantes Rechnersystem mit erweiterungsfähigem ProzessorabschnittInfo
- Publication number
- DE3751853D1 DE3751853D1 DE3751853T DE3751853T DE3751853D1 DE 3751853 D1 DE3751853 D1 DE 3751853D1 DE 3751853 T DE3751853 T DE 3751853T DE 3751853 T DE3751853 T DE 3751853T DE 3751853 D1 DE3751853 D1 DE 3751853D1
- Authority
- DE
- Germany
- Prior art keywords
- processor
- section
- units
- computer system
- processor section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000012163 sequencing technique Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
- G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
- G06F13/372—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a time-dependent priority, e.g. individually loaded time counters or time slot
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/177—Initialisation or configuration control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
- G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/927,746 US4816990A (en) | 1986-11-05 | 1986-11-05 | Method and apparatus for fault-tolerant computer system having expandable processor section |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3751853D1 true DE3751853D1 (de) | 1996-08-08 |
DE3751853T2 DE3751853T2 (de) | 1997-02-27 |
Family
ID=25455185
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3751853T Expired - Lifetime DE3751853T2 (de) | 1986-11-05 | 1987-11-04 | Vorrichtung für ein fehlertolerantes Rechnersystem mit erweiterungsfähigem Prozessorabschnitt |
Country Status (5)
Country | Link |
---|---|
US (1) | US4816990A (de) |
EP (1) | EP0267011B1 (de) |
JP (2) | JP2623261B2 (de) |
AT (1) | ATE140088T1 (de) |
DE (1) | DE3751853T2 (de) |
Families Citing this family (55)
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---|---|---|---|---|
DE58908047D1 (de) * | 1989-04-25 | 1994-08-18 | Siemens Ag | Verfahren zur Synchronisation von Datenverarbeitungsanlagen. |
US5155809A (en) * | 1989-05-17 | 1992-10-13 | International Business Machines Corp. | Uncoupling a central processing unit from its associated hardware for interaction with data handling apparatus alien to the operating system controlling said unit and hardware |
US5144692A (en) * | 1989-05-17 | 1992-09-01 | International Business Machines Corporation | System for controlling access by first system to portion of main memory dedicated exclusively to second system to facilitate input/output processing via first system |
US5113522A (en) * | 1989-05-17 | 1992-05-12 | International Business Machines Corporation | Data processing system with system resource management for itself and for an associated alien processor |
US5303352A (en) * | 1989-11-06 | 1994-04-12 | Zenith Data Systems Corporation | Dual connector port for bus master card |
US6038584A (en) * | 1989-11-17 | 2000-03-14 | Texas Instruments Incorporated | Synchronized MIMD multi-processing system and method of operation |
US5239629A (en) * | 1989-12-29 | 1993-08-24 | Supercomputer Systems Limited Partnership | Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system |
US5197130A (en) * | 1989-12-29 | 1993-03-23 | Supercomputer Systems Limited Partnership | Cluster architecture for a highly parallel scalar/vector multiprocessor system |
US5168570A (en) * | 1989-12-29 | 1992-12-01 | Supercomputer Systems Limited Partnership | Method and apparatus for a multiple request toggling priority system |
US5193187A (en) * | 1989-12-29 | 1993-03-09 | Supercomputer Systems Limited Partnership | Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers |
JPH07101410B2 (ja) * | 1990-01-17 | 1995-11-01 | インターナショナル、ビジネス、マシーンズ、コーポレーション | データ処理ネットワークにおいて逐次化手段の試験のため命令流の実行を同期させる方法 |
US5459836A (en) * | 1990-02-09 | 1995-10-17 | Unisys Corporation | Inter-processor communication net |
US5291608A (en) * | 1990-02-13 | 1994-03-01 | International Business Machines Corporation | Display adapter event handler with rendering context manager |
US5261089A (en) * | 1990-05-16 | 1993-11-09 | International Business Machines Corporation | Optimization of commit procedures by utilizing a two-phase commit procedure only when necessary |
JP2691081B2 (ja) * | 1990-05-16 | 1997-12-17 | インターナショナル・ビジネス・マシーンズ・コーポレイション | コンピュータ・ネットワーク |
JP3293839B2 (ja) * | 1990-05-16 | 2002-06-17 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 作業ユニットに合わせてコミット範囲を調整するコンピュータ・システム |
US5327532A (en) * | 1990-05-16 | 1994-07-05 | International Business Machines Corporation | Coordinated sync point management of protected resources |
US5276876A (en) * | 1990-05-16 | 1994-01-04 | International Business Machines Corporation | Registration of resources for commit procedures |
US5319774A (en) * | 1990-05-16 | 1994-06-07 | International Business Machines Corporation | Recovery facility for incomplete sync points for distributed application |
US5319773A (en) * | 1990-05-16 | 1994-06-07 | International Business Machines Corporation | Asynchronous resynchronization of a commit procedure |
US5165031A (en) * | 1990-05-16 | 1992-11-17 | International Business Machines Corporation | Coordinated handling of error codes and information describing errors in a commit procedure |
US5179707A (en) * | 1990-06-01 | 1993-01-12 | At&T Bell Laboratories | Interrupt processing allocation in a multiprocessor system |
US5220668A (en) * | 1990-09-21 | 1993-06-15 | Stratus Computer, Inc. | Digital data processor with maintenance and diagnostic system |
JPH04246763A (ja) * | 1991-01-31 | 1992-09-02 | Nec Corp | マルチプロセッサ回路 |
US6247144B1 (en) * | 1991-01-31 | 2001-06-12 | Compaq Computer Corporation | Method and apparatus for comparing real time operation of object code compatible processors |
JP2625589B2 (ja) * | 1991-04-22 | 1997-07-02 | インターナショナル・ビジネス・マシーンズ・コーポレイション | マルチプロセッサ・システム |
US5379381A (en) * | 1991-08-12 | 1995-01-03 | Stratus Computer, Inc. | System using separate transfer circuits for performing different transfer operations respectively and scanning I/O devices status upon absence of both operations |
US5257383A (en) * | 1991-08-12 | 1993-10-26 | Stratus Computer, Inc. | Programmable interrupt priority encoder method and apparatus |
US5506964A (en) * | 1992-04-16 | 1996-04-09 | International Business Machines Corporation | System with multiple interface logic circuits including arbitration logic for individually linking multiple processing systems to at least one remote sub-system |
US5434997A (en) * | 1992-10-02 | 1995-07-18 | Compaq Computer Corp. | Method and apparatus for testing and debugging a tightly coupled mirrored processing system |
US5493655A (en) * | 1993-02-20 | 1996-02-20 | Acer Incorporated | Method and apparatus for upgrading a data processing system from a single processor system to a multiprocessor system |
US5490279A (en) * | 1993-05-21 | 1996-02-06 | Intel Corporation | Method and apparatus for operating a single CPU computer system as a multiprocessor system |
US5630056A (en) | 1994-09-20 | 1997-05-13 | Stratus Computer, Inc. | Digital data processing methods and apparatus for fault detection and fault tolerance |
KR0155269B1 (ko) * | 1995-01-16 | 1998-11-16 | 김광호 | 버스 중재방법 및 그 장치 |
US5692121A (en) * | 1995-04-14 | 1997-11-25 | International Business Machines Corporation | Recovery unit for mirrored processors |
US6564278B1 (en) * | 1999-10-21 | 2003-05-13 | Ulysses Esd, Inc. | System and method for obtaining board address information |
US6820213B1 (en) | 2000-04-13 | 2004-11-16 | Stratus Technologies Bermuda, Ltd. | Fault-tolerant computer system with voter delay buffer |
US6633996B1 (en) | 2000-04-13 | 2003-10-14 | Stratus Technologies Bermuda Ltd. | Fault-tolerant maintenance bus architecture |
US6691257B1 (en) | 2000-04-13 | 2004-02-10 | Stratus Technologies Bermuda Ltd. | Fault-tolerant maintenance bus protocol and method for using the same |
US6708283B1 (en) | 2000-04-13 | 2004-03-16 | Stratus Technologies, Bermuda Ltd. | System and method for operating a system with redundant peripheral bus controllers |
US6687851B1 (en) | 2000-04-13 | 2004-02-03 | Stratus Technologies Bermuda Ltd. | Method and system for upgrading fault-tolerant systems |
US6735715B1 (en) | 2000-04-13 | 2004-05-11 | Stratus Technologies Bermuda Ltd. | System and method for operating a SCSI bus with redundant SCSI adaptors |
US6691225B1 (en) | 2000-04-14 | 2004-02-10 | Stratus Technologies Bermuda Ltd. | Method and apparatus for deterministically booting a computer system having redundant components |
US6948010B2 (en) | 2000-12-20 | 2005-09-20 | Stratus Technologies Bermuda Ltd. | Method and apparatus for efficiently moving portions of a memory block |
US6766479B2 (en) | 2001-02-28 | 2004-07-20 | Stratus Technologies Bermuda, Ltd. | Apparatus and methods for identifying bus protocol violations |
US7065672B2 (en) * | 2001-03-28 | 2006-06-20 | Stratus Technologies Bermuda Ltd. | Apparatus and methods for fault-tolerant computing using a switching fabric |
US6928583B2 (en) * | 2001-04-11 | 2005-08-09 | Stratus Technologies Bermuda Ltd. | Apparatus and method for two computing elements in a fault-tolerant server to execute instructions in lockstep |
US6996750B2 (en) * | 2001-05-31 | 2006-02-07 | Stratus Technologies Bermuda Ltd. | Methods and apparatus for computer bus error termination |
US20060112208A1 (en) * | 2004-11-22 | 2006-05-25 | International Business Machines Corporation | Interrupt thresholding for SMT and multi processor systems |
DE102007049004A1 (de) * | 2007-10-12 | 2009-04-16 | Fujitsu Siemens Computers Gmbh | Serverschrank, Server, sowie Verfahren zur Erzeugung einer digitalen Kennung eines Servers in einem Serverschrank |
US7453910B1 (en) * | 2007-12-18 | 2008-11-18 | International Business Machines Corporation | Synchronization of independent clocks |
JP2009205258A (ja) * | 2008-02-26 | 2009-09-10 | Toshiba Corp | 半導体集積回路 |
IT1391785B1 (it) * | 2008-11-21 | 2012-01-27 | St Microelectronics Srl | Sistema elettronico per il rilevamento di un guasto |
US8972767B2 (en) * | 2012-11-16 | 2015-03-03 | Oracle International Corporation | Method and apparatus for synchronizing the time reference of a dynamically activated processor to the system time reference |
US10063567B2 (en) | 2014-11-13 | 2018-08-28 | Virtual Software Systems, Inc. | System for cross-host, multi-thread session alignment |
Family Cites Families (39)
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US3469239A (en) * | 1965-12-02 | 1969-09-23 | Hughes Aircraft Co | Interlocking means for a multi-processor system |
US3544973A (en) * | 1968-03-13 | 1970-12-01 | Westinghouse Electric Corp | Variable structure computer |
AT285689B (de) * | 1968-03-29 | 1970-11-10 | Siemens Ag | Zentralgesteuerte Vermittlungsanlage der Fernmelde-, insbesondere Fernsprechtechnik |
US3548382A (en) * | 1968-06-10 | 1970-12-15 | Burroughs Corp | High speed modular data processing system having magnetic core main memory modules of various storage capacities and operational speeds |
US3641505A (en) * | 1969-06-25 | 1972-02-08 | Bell Telephone Labor Inc | Multiprocessor computer adapted for partitioning into a plurality of independently operating systems |
US3812468A (en) * | 1972-05-12 | 1974-05-21 | Burroughs Corp | Multiprocessing system having means for dynamic redesignation of unit functions |
US3812463A (en) * | 1972-07-17 | 1974-05-21 | Sperry Rand Corp | Processor interrupt pointer |
US4112488A (en) * | 1975-03-07 | 1978-09-05 | The Charles Stark Draper Laboratory, Inc. | Fault-tolerant network with node branching |
US4015246A (en) * | 1975-04-14 | 1977-03-29 | The Charles Stark Draper Laboratory, Inc. | Synchronous fault tolerant multi-processor system |
US4015243A (en) * | 1975-06-02 | 1977-03-29 | Kurpanek Horst G | Multi-processing computer system |
JPS5837585B2 (ja) * | 1975-09-30 | 1983-08-17 | 株式会社東芝 | ケイサンキソウチ |
US4014005A (en) * | 1976-01-05 | 1977-03-22 | International Business Machines Corporation | Configuration and control unit for a heterogeneous multi-system |
US4032893A (en) * | 1976-01-23 | 1977-06-28 | Sperry Rand Corporation | Reconfigurable data bus |
US4228496A (en) * | 1976-09-07 | 1980-10-14 | Tandem Computers Incorporated | Multiprocessor system |
IT1111606B (it) * | 1978-03-03 | 1986-01-13 | Cselt Centro Studi Lab Telecom | Sistema elaborativo modulare multiconfigurabile integrato con un sistema di preelaborazione |
US4257095A (en) * | 1978-06-30 | 1981-03-17 | Intel Corporation | System bus arbitration, circuitry and methodology |
US4263649A (en) * | 1979-01-05 | 1981-04-21 | Mohawk Data Sciences Corp. | Computer system with two busses |
JPS6048787B2 (ja) * | 1979-06-05 | 1985-10-29 | 日本電気株式会社 | 情報処理装置 |
JPS5621218A (en) * | 1979-07-30 | 1981-02-27 | Nec Corp | Harmonizer for competitive signal |
US4428044A (en) * | 1979-09-20 | 1984-01-24 | Bell Telephone Laboratories, Incorporated | Peripheral unit controller |
US4326250A (en) * | 1979-10-10 | 1982-04-20 | Magnuson Computer Systems, Inc. | Data processing apparatus with serial and parallel priority |
US4304001A (en) * | 1980-01-24 | 1981-12-01 | Forney Engineering Company | Industrial control system with interconnected remotely located computer control units |
US4356546A (en) * | 1980-02-05 | 1982-10-26 | The Bendix Corporation | Fault-tolerant multi-computer system |
US4323966A (en) * | 1980-02-05 | 1982-04-06 | The Bendix Corporation | Operations controller for a fault-tolerant multiple computer system |
EP0044765B1 (de) * | 1980-07-08 | 1985-06-05 | Thomson-Csf Telephone | Verfahren und Einrichtung zur prioritätsgesteuerten Auswahl verschiedener Teilsysteme |
WO1982003931A1 (en) * | 1981-04-27 | 1982-11-11 | Kris Bryan | Multi-master processor bus |
JPS5858672A (ja) * | 1981-07-24 | 1983-04-07 | テキサス・インストルメンツ・インコ−ポレ−テツド | 再構成可能集積回路 |
JPS6012666B2 (ja) * | 1981-07-24 | 1985-04-02 | 株式会社日立製作所 | 分散形優先競合の自己制御方法および装置 |
US4453215A (en) * | 1981-10-01 | 1984-06-05 | Stratus Computer, Inc. | Central processing apparatus for fault-tolerant computing |
US4467436A (en) * | 1981-10-26 | 1984-08-21 | United States Robots, Inc. | Robot arm controller with common bus memory |
US4608631A (en) * | 1982-09-03 | 1986-08-26 | Sequoia Systems, Inc. | Modular computer system |
US4484273A (en) * | 1982-09-03 | 1984-11-20 | Sequoia Systems, Inc. | Modular computer system |
JPS59158151A (ja) * | 1983-02-28 | 1984-09-07 | Fujitsu Ltd | ポ−リング制御方式 |
GB8310003D0 (en) * | 1983-04-13 | 1983-05-18 | Gen Electric Co Plc | Input signal handling apparatus |
DE3334765A1 (de) * | 1983-09-26 | 1985-04-11 | Siemens AG, 1000 Berlin und 8000 München | Pruefungseinrichtung zur fehlererkennung bei gedoppelten schaltungen, insbesondere prozessoren eines fernsprechvermittlungssystems |
DE3334797A1 (de) * | 1983-09-26 | 1985-01-03 | Siemens AG, 1000 Berlin und 8000 München | Multiprozessor-rechner, insbesondere multiprozessor-zentralsteuereinheit eines fernsprech-vermittlungssystems |
EP0137609B1 (de) * | 1983-09-27 | 1990-07-25 | Trw Inc. | Multi-Master-Übertragungsbus |
JPS60146350A (ja) * | 1984-01-11 | 1985-08-02 | Hitachi Ltd | 通信制御装置 |
US4658353A (en) * | 1984-11-20 | 1987-04-14 | Burroughs Corporation | System control network for multiple processor modules |
-
1986
- 1986-11-05 US US06/927,746 patent/US4816990A/en not_active Expired - Lifetime
-
1987
- 1987-11-04 DE DE3751853T patent/DE3751853T2/de not_active Expired - Lifetime
- 1987-11-04 EP EP87309735A patent/EP0267011B1/de not_active Expired - Lifetime
- 1987-11-04 AT AT87309735T patent/ATE140088T1/de active
- 1987-11-05 JP JP62278458A patent/JP2623261B2/ja not_active Expired - Lifetime
-
1996
- 1996-11-22 JP JP8325843A patent/JP3071151B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0267011A3 (en) | 1990-01-31 |
JPS63220353A (ja) | 1988-09-13 |
EP0267011A2 (de) | 1988-05-11 |
US4816990A (en) | 1989-03-28 |
EP0267011B1 (de) | 1996-07-03 |
JP3071151B2 (ja) | 2000-07-31 |
DE3751853T2 (de) | 1997-02-27 |
ATE140088T1 (de) | 1996-07-15 |
JPH09198359A (ja) | 1997-07-31 |
JP2623261B2 (ja) | 1997-06-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Representative=s name: KRAMER - BARSKE - SCHMIDTCHEN, 81245 MUENCHEN |