DE3585755D1 - Mit jeder durch unterschiedliche instruktionsformattypen repraesentierter programmsprache vereinbarer mikrorechner. - Google Patents

Mit jeder durch unterschiedliche instruktionsformattypen repraesentierter programmsprache vereinbarer mikrorechner.

Info

Publication number
DE3585755D1
DE3585755D1 DE8585109333T DE3585755T DE3585755D1 DE 3585755 D1 DE3585755 D1 DE 3585755D1 DE 8585109333 T DE8585109333 T DE 8585109333T DE 3585755 T DE3585755 T DE 3585755T DE 3585755 D1 DE3585755 D1 DE 3585755D1
Authority
DE
Germany
Prior art keywords
instruction format
format type
program language
different instruction
language represented
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585109333T
Other languages
English (en)
Inventor
Shigetatsu Katori
Yukio Maehashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3585755D1 publication Critical patent/DE3585755D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G06F9/30174—Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
DE8585109333T 1984-07-25 1985-07-25 Mit jeder durch unterschiedliche instruktionsformattypen repraesentierter programmsprache vereinbarer mikrorechner. Expired - Fee Related DE3585755D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15482484A JPS6133546A (ja) 1984-07-25 1984-07-25 情報処理装置

Publications (1)

Publication Number Publication Date
DE3585755D1 true DE3585755D1 (de) 1992-05-07

Family

ID=15592675

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585109333T Expired - Fee Related DE3585755D1 (de) 1984-07-25 1985-07-25 Mit jeder durch unterschiedliche instruktionsformattypen repraesentierter programmsprache vereinbarer mikrorechner.

Country Status (4)

Country Link
US (1) US4839797A (de)
EP (1) EP0169565B1 (de)
JP (1) JPS6133546A (de)
DE (1) DE3585755D1 (de)

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JP3451595B2 (ja) * 1995-06-07 2003-09-29 インターナショナル・ビジネス・マシーンズ・コーポレーション 二つの別個の命令セット・アーキテクチャへの拡張をサポートすることができるアーキテクチャ・モード制御を備えたマイクロプロセッサ
US5819063A (en) * 1995-09-11 1998-10-06 International Business Machines Corporation Method and data processing system for emulating a program
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US5905893A (en) * 1996-06-10 1999-05-18 Lsi Logic Corporation Microprocessor adapted for executing both a non-compressed fixed length instruction set and a compressed variable length instruction set
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US7107439B2 (en) * 2001-08-10 2006-09-12 Mips Technologies, Inc. System and method of controlling software decompression through exceptions
US7707389B2 (en) 2003-10-31 2010-04-27 Mips Technologies, Inc. Multi-ISA instruction fetch unit for a processor, and applications thereof
DE102004025418A1 (de) * 2004-05-24 2005-12-22 Infineon Technologies Ag Controller mit einer Decodiereinrichtung
DE102004025419A1 (de) * 2004-05-24 2005-12-22 Infineon Technologies Ag Controller und Verfahren zum Verarbeiten von Befehlen
US7802252B2 (en) * 2007-01-09 2010-09-21 International Business Machines Corporation Method and apparatus for selecting the architecture level to which a processor appears to conform
EP2203814A4 (de) * 2007-09-19 2012-11-07 Kpit Cummins Infosystems Ltd Mechanismus zum freigeben von plug-und-play-hardwarekomponenten für halbautomatische softwaremigration
US11669328B2 (en) 2020-12-29 2023-06-06 Shanghai Zhaoxin Semiconductor Co., Ltd. Method and system for converting instructions
US11789736B2 (en) 2020-12-29 2023-10-17 Shanghai Zhaoxin Semiconductor Co., Ltd. Method and system for executing new instructions
US11803383B2 (en) 2020-12-29 2023-10-31 Shanghai Zhaoxin Semiconductor Co., Ltd. Method and system for executing new instructions
US11625247B2 (en) 2020-12-29 2023-04-11 Shanghai Zhaoxin Semiconductor Co., Ltd. System for executing new instructions and method for executing new instructions
US11803381B2 (en) 2020-12-29 2023-10-31 Shanghai Zhaoxin Semiconductor Co., Ltd. Instruction simulation device and method thereof
US11914997B2 (en) 2020-12-29 2024-02-27 Shanghai Zhaoxin Semiconductor Co., Ltd. Method and system for executing new instructions
US11803387B2 (en) 2020-12-29 2023-10-31 Shanghai Zhaoxin Semiconductor Co., Ltd. System for executing new instructions and method for executing new instructions
US11604643B2 (en) 2020-12-29 2023-03-14 Shanghai Zhaoxin Semiconductor Co., Ltd. System for executing new instructions and method for executing new instructions

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Also Published As

Publication number Publication date
EP0169565A2 (de) 1986-01-29
EP0169565B1 (de) 1992-04-01
US4839797A (en) 1989-06-13
JPH0412853B2 (de) 1992-03-05
JPS6133546A (ja) 1986-02-17
EP0169565A3 (en) 1988-09-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee