DE3382592D1 - Zweifachbusstruktur fuer die rechnerverbindung. - Google Patents

Zweifachbusstruktur fuer die rechnerverbindung.

Info

Publication number
DE3382592D1
DE3382592D1 DE8787112180T DE3382592T DE3382592D1 DE 3382592 D1 DE3382592 D1 DE 3382592D1 DE 8787112180 T DE8787112180 T DE 8787112180T DE 3382592 T DE3382592 T DE 3382592T DE 3382592 D1 DE3382592 D1 DE 3382592D1
Authority
DE
Germany
Prior art keywords
bus structure
computer connection
double bus
double
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787112180T
Other languages
English (en)
Other versions
DE3382592T2 (de
Inventor
William D Strecker
David Thompson
Richard Casabona
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of DE3382592D1 publication Critical patent/DE3382592D1/de
Publication of DE3382592T2 publication Critical patent/DE3382592T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
DE8787112180T 1982-05-07 1983-04-28 Zweifachbusstruktur fuer die rechnerverbindung. Expired - Fee Related DE3382592T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/376,068 US4490785A (en) 1982-05-07 1982-05-07 Dual path bus structure for computer interconnection

Publications (2)

Publication Number Publication Date
DE3382592D1 true DE3382592D1 (de) 1992-08-20
DE3382592T2 DE3382592T2 (de) 1993-03-11

Family

ID=23483574

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8383302413T Expired DE3378433D1 (en) 1982-05-07 1983-04-28 Computer interconnection part
DE8787112180T Expired - Fee Related DE3382592T2 (de) 1982-05-07 1983-04-28 Zweifachbusstruktur fuer die rechnerverbindung.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE8383302413T Expired DE3378433D1 (en) 1982-05-07 1983-04-28 Computer interconnection part

Country Status (5)

Country Link
US (1) US4490785A (de)
EP (2) EP0094179B1 (de)
JP (1) JPS5941031A (de)
CA (1) CA1185375A (de)
DE (2) DE3378433D1 (de)

Families Citing this family (72)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4931922A (en) * 1981-10-01 1990-06-05 Stratus Computer, Inc. Method and apparatus for monitoring peripheral device communications
US4680698A (en) * 1982-11-26 1987-07-14 Inmos Limited High density ROM in separate isolation well on single with chip
US5243698A (en) * 1982-11-26 1993-09-07 Inmos Limited Microcomputer
US6414368B1 (en) 1982-11-26 2002-07-02 Stmicroelectronics Limited Microcomputer with high density RAM on single chip
US4787033A (en) * 1983-09-22 1988-11-22 Digital Equipment Corporation Arbitration mechanism for assigning control of a communications path in a digital computer system
GB8329510D0 (en) * 1983-11-04 1983-12-07 Inmos Ltd Computer apparatus
US4695952A (en) * 1984-07-30 1987-09-22 United Technologies Corporation Dual redundant bus interface circuit architecture
JPH0680492B2 (ja) * 1984-09-29 1994-10-12 株式会社日立製作所 エラー回復方法
GB2165970A (en) * 1984-10-19 1986-04-23 Burr Brown Corp Method and apparatus for an expandable remote interface unit
US4870704A (en) * 1984-10-31 1989-09-26 Flexible Computer Corporation Multicomputer digital processing system
EP0189192A1 (de) * 1985-01-24 1986-07-30 BURROUGHS CORPORATION (a Delaware corporation) Verfahren zum Betrieb eines lokalen Zweidrahtnetzwerkes um Grenzkomponenten in der sekundären Schleife zu lokalisieren
US4967344A (en) * 1985-03-26 1990-10-30 Codex Corporation Interconnection network for multiple processors
JPS6226561A (ja) * 1985-07-26 1987-02-04 Toshiba Corp パ−ソナルコンピユ−タ
US4837739A (en) * 1986-07-25 1989-06-06 Ford Aerospace & Communications Corporation Telemetry data processor
CN1008018B (zh) * 1986-09-27 1990-05-16 徐肇昌 一种具有合作能力的同构型多计算机系统及其合作方法
US4949239A (en) * 1987-05-01 1990-08-14 Digital Equipment Corporation System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system
DE3884606T2 (de) * 1987-05-01 1994-03-17 Digital Equipment Corp Steuerungsknotenverfahren und -anordnung zur sicherung eines angepassten zugriffs zu betriebsmitteln in einem multiprozessordatenverarbeitungssystem.
US5341510A (en) * 1987-05-01 1994-08-23 Digital Equipment Corporation Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor
US4941083A (en) * 1987-05-01 1990-07-10 Digital Equipment Corporation Method and apparatus for initiating interlock read transactions on a multiprocessor computer system
US4937733A (en) * 1987-05-01 1990-06-26 Digital Equipment Corporation Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system
US4858116A (en) * 1987-05-01 1989-08-15 Digital Equipment Corporation Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
DE3715586C1 (de) * 1987-05-09 1988-09-22 Gewerkschaft Eisenhuette Westfalia Gmbh, 4670 Luenen, De
US4887076A (en) * 1987-10-16 1989-12-12 Digital Equipment Corporation Computer interconnect coupler for clusters of data processing devices
US4897833A (en) * 1987-10-16 1990-01-30 Digital Equipment Corporation Hierarchical arbitration system
US5168572A (en) * 1989-03-10 1992-12-01 The Boeing Company System for dynamic selection of globally-determined optimal data path
US5187780A (en) * 1989-04-07 1993-02-16 Digital Equipment Corporation Dual-path computer interconnect system with zone manager for packet memory
CA2011935A1 (en) * 1989-04-07 1990-10-07 Desiree A. Awiszio Dual-path computer interconnect system with four-ported packet memory control
US5167019A (en) 1989-06-23 1992-11-24 Digital Equipment Corporation Apparatus and method for interconnecting a plurality of devices to a single node in a node-limited serial data bus computer network
JP2504206B2 (ja) * 1989-07-27 1996-06-05 三菱電機株式会社 バスコントロ―ラ
US5193151A (en) 1989-08-30 1993-03-09 Digital Equipment Corporation Delay-based congestion avoidance in computer networks
US5053947A (en) * 1989-09-29 1991-10-01 Allegro Microsystems, Inc. Extended multistation bus system and method
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US5388243A (en) * 1990-03-09 1995-02-07 Mti Technology Corporation Multi-sort mass storage device announcing its active paths without deactivating its ports in a network architecture
US5461723A (en) * 1990-04-05 1995-10-24 Mit Technology Corp. Dual channel data block transfer bus
JP2753123B2 (ja) * 1990-08-28 1998-05-18 富士通株式会社 制御モード選択式通信コントローラ
JPH0756644B2 (ja) * 1990-08-31 1995-06-14 インターナショナル・ビジネス・マシーンズ・コーポレイション 状態変化通知装置及び方法
US5287464A (en) * 1990-10-24 1994-02-15 Zilog, Inc. Semiconductor multi-device system with logic means for controlling the operational mode of a set of input/output data bus drivers
JP3206006B2 (ja) * 1991-01-25 2001-09-04 株式会社日立製作所 二重化バス制御方法及び装置
GB2268602A (en) * 1992-06-25 1994-01-12 Mitac Ltd Enhancing security of data transfer
US5898894A (en) * 1992-09-29 1999-04-27 Intel Corporation CPU reads data from slow bus if I/O devices connected to fast bus do not acknowledge to a read request after a predetermined time interval
US6487626B2 (en) 1992-09-29 2002-11-26 Intel Corporaiton Method and apparatus of bus interface for a processor
US5809533A (en) * 1993-02-18 1998-09-15 Unisys Corporation Dual bus system with multiple processors having data coherency maintenance
US5386424A (en) * 1993-03-31 1995-01-31 Honeywell, Inc. Apparatus and method for transmitting information between dual redundant components utilizing four signal paths
JP3264465B2 (ja) * 1993-06-30 2002-03-11 株式会社日立製作所 記憶システム
US5604487A (en) * 1993-07-30 1997-02-18 Lockheed Martin Tactical Systems, Inc. Apparatus and method for user-selective data communication with verification
US5515423A (en) * 1993-12-03 1996-05-07 Canon Kabushiki Kaisha Two-line telephone controller
US5835960A (en) * 1994-01-07 1998-11-10 Cirrus Logic, Inc. Apparatus and method for interfacing a peripheral device having a ROM BIOS to a PCI bus
US5613068A (en) * 1994-06-17 1997-03-18 International Business Machines Corporation Method for transferring data between processors on a network by establishing an address space for each processor in each other processor's
US5586271A (en) * 1994-09-27 1996-12-17 Macrolink Inc. In-line SCSI bus circuit for providing isolation and bi-directional communication between two portions of a SCSI bus
KR100197407B1 (ko) * 1995-12-28 1999-06-15 유기범 전전자 교환기에 있어서 프로세서들간 통신버스구조
US5862408A (en) * 1996-05-13 1999-01-19 Advanced Micro Devices, Inc. Microprocessor system having multiplexor disposed in first and second read paths between memory CPU and DMA for selecting data from either read path
DE59814339D1 (de) * 1997-06-20 2009-03-12 Abb Ag Redundanter serienbus
US6434637B1 (en) 1998-12-31 2002-08-13 Emc Corporation Method and apparatus for balancing workloads among paths in a multi-path computer system based on the state of previous I/O operations
US6701432B1 (en) * 1999-04-01 2004-03-02 Netscreen Technologies, Inc. Firewall including local bus
US6598106B1 (en) 1999-12-23 2003-07-22 Lsi Logic Corporation Dual-port SCSI sub-system with fail-over capabilities
US6675253B1 (en) * 2000-04-04 2004-01-06 Hewlett-Packard Development Company, L.P. Dynamic routing of data across multiple data paths from a source controller to a destination controller
US6601128B1 (en) 2000-05-02 2003-07-29 International Business Machines Corporation Method, system, program, and data structure for selecting a preferred path to a storage device
US6393535B1 (en) 2000-05-02 2002-05-21 International Business Machines Corporation Method, system, and program for modifying preferred path assignments to a storage device
US7228538B1 (en) 2000-05-02 2007-06-05 International Business Machines Corporation Method, system, and program for updating firmware to a storage system comprised of multiple controllers
US6874039B2 (en) * 2000-09-08 2005-03-29 Intel Corporation Method and apparatus for distributed direct memory access for systems on chip
US7318116B2 (en) 2002-11-08 2008-01-08 International Business Machines Corporation Control path failover in an automated data storage library
JP2005221731A (ja) * 2004-02-05 2005-08-18 Konica Minolta Photo Imaging Inc 撮像装置
US7680904B2 (en) * 2004-08-06 2010-03-16 Logic Controls, Inc. Diagnostic method and apparatus for detecting and locating computer network discontinuities
JP2006260140A (ja) * 2005-03-17 2006-09-28 Fujitsu Ltd データ処理システム
US8018844B2 (en) 2005-08-24 2011-09-13 International Business Machines Corporation Reliable message transfer over an unreliable network
US7602705B1 (en) * 2005-10-12 2009-10-13 Garrettcom, Inc. Dual-homing layer 2 switch
US8358658B2 (en) * 2010-03-19 2013-01-22 International Business Machines Corporation Implementing ordered and reliable transfer of packets while spraying packets over multiple links
US10063407B1 (en) 2016-02-08 2018-08-28 Barefoot Networks, Inc. Identifying and marking failed egress links in data plane
US10313231B1 (en) * 2016-02-08 2019-06-04 Barefoot Networks, Inc. Resilient hashing for forwarding packets
US10237206B1 (en) 2017-03-05 2019-03-19 Barefoot Networks, Inc. Equal cost multiple path group failover for multicast
US10404619B1 (en) 2017-03-05 2019-09-03 Barefoot Networks, Inc. Link aggregation group failover for multicast
US10565146B2 (en) * 2018-01-02 2020-02-18 Arm Limited Interconnect and method of handling supplementary data in an interconnect

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5057347A (de) * 1973-09-19 1975-05-19
US4228496A (en) * 1976-09-07 1980-10-14 Tandem Computers Incorporated Multiprocessor system
JPS5463634A (en) * 1977-10-03 1979-05-22 Nec Corp Bus controller
US4195351A (en) * 1978-01-27 1980-03-25 International Business Machines Corporation Loop configured data transmission system
JPS5513475A (en) * 1978-07-14 1980-01-30 Nec Corp Bus selection system
JPS5552130A (en) * 1978-10-11 1980-04-16 Nec Corp Information processing unit
US4245344A (en) * 1979-04-02 1981-01-13 Rockwell International Corporation Processing system with dual buses
JPS5629731A (en) * 1979-08-16 1981-03-25 Nec Corp Multiplex bus control system
JPS56114063A (en) * 1980-02-14 1981-09-08 Mitsubishi Electric Corp Multiprocessor
JPS5816495B2 (ja) * 1980-04-11 1983-03-31 パナフアコム株式会社 多重系システムのインタフエ−ス制御方式
US4412281A (en) * 1980-07-11 1983-10-25 Raytheon Company Distributed signal processing system
JPS57124950A (en) * 1981-01-27 1982-08-04 Nippon Telegr & Teleph Corp <Ntt> Duplicated bus connecting system

Also Published As

Publication number Publication date
EP0282628A2 (de) 1988-09-21
EP0094179A2 (de) 1983-11-16
DE3378433D1 (en) 1988-12-15
DE3382592T2 (de) 1993-03-11
US4490785A (en) 1984-12-25
CA1185375A (en) 1985-04-09
EP0282628B1 (de) 1992-07-15
JPS5941031A (ja) 1984-03-07
EP0094179B1 (de) 1988-11-09
EP0282628A3 (en) 1989-01-25
EP0094179A3 (en) 1985-01-30

Similar Documents

Publication Publication Date Title
DE3382592T2 (de) Zweifachbusstruktur fuer die rechnerverbindung.
DE3584690D1 (de) Ein-/ausgabebus fuer rechner.
DE3381451D1 (de) Adressenumsetzungsgeraet fuer mehrprozessorsystem.
DE3868016D1 (de) Hilfsgeraet fuer die beatmung.
DE3585932D1 (de) Pufferschaltung fuer ram-speicher.
DE3576721D1 (de) Verbindung fuer rohre.
DE3584632D1 (de) Verbinder fuer strukturelemente.
DE3484147D1 (de) Rechnersystem.
DE3778009D1 (de) Seiteneckenstruktur fuer fahrzeuge.
DE3584649D1 (de) Rechenschaltung fuer die diskrete fouriertransformation.
FI843221A (fi) Lh/rh antagonister.
NO814475L (no) Panelingselement.
IT8320412A0 (it) Dispositivo di connessione.
NL177775C (nl) Paneelradiator.
DE3481735D1 (de) Rechnersysteme.
DE3483705D1 (de) Umformer fuer quadratischen mittelwert.
AT374581B (de) Heizkoerper, insbesondere plattenheizkoerper
NL191342C (nl) Computersysteem.
FI840651A (fi) Anordning vid vagnar.
IT8420707V0 (it) Autobus articolato.
IT8520646A0 (it) Autobus.
ATE32050T1 (de) Versorgungsanlage fuer die luft- und raumfahrt.
IT8261970V0 (it) Autoveicolo con furgone.
ATE21667T1 (de) Elastische aufhaengestruktur fuer die schubvorrichtung.
ATE26051T1 (de) Bussystem.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee