DE3278442D1 - Central processing unit for executing instructions of variable length - Google Patents

Central processing unit for executing instructions of variable length

Info

Publication number
DE3278442D1
DE3278442D1 DE8282107598T DE3278442T DE3278442D1 DE 3278442 D1 DE3278442 D1 DE 3278442D1 DE 8282107598 T DE8282107598 T DE 8282107598T DE 3278442 T DE3278442 T DE 3278442T DE 3278442 D1 DE3278442 D1 DE 3278442D1
Authority
DE
Germany
Prior art keywords
processing unit
central processing
variable length
executing instructions
executing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282107598T
Other languages
English (en)
Inventor
Yasushi Fukunaga
Tadaaki Bandoh
Kotaro Hirasawa
Hidekazu Matsumoto
Jushi Ide
Takeshi Katoh
Hiroaki Nakanishi
Tetsuya Kawakami
Ryosei Hiraoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Engineering Co Ltd
Hitachi Ltd
Original Assignee
Hitachi Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP56132717A external-priority patent/JPS5835643A/ja
Priority claimed from JP13271681A external-priority patent/JPS5835642A/ja
Application filed by Hitachi Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Application granted granted Critical
Publication of DE3278442D1 publication Critical patent/DE3278442D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G06F9/30152—Determining start or end of instruction; determining instruction length
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
DE8282107598T 1981-08-26 1982-08-19 Central processing unit for executing instructions of variable length Expired DE3278442D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP56132717A JPS5835643A (ja) 1981-08-26 1981-08-26 不定長命令のエラ−検出を行うデ−タ処理装置
JP13271681A JPS5835642A (ja) 1981-08-26 1981-08-26 不定長命令を扱うデ−タ処理装置

Publications (1)

Publication Number Publication Date
DE3278442D1 true DE3278442D1 (en) 1988-06-09

Family

ID=26467236

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282107598T Expired DE3278442D1 (en) 1981-08-26 1982-08-19 Central processing unit for executing instructions of variable length

Country Status (5)

Country Link
US (1) US4530050A (de)
EP (1) EP0073424B1 (de)
KR (1) KR880000297B1 (de)
CA (1) CA1186801A (de)
DE (1) DE3278442D1 (de)

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JPS58146941A (ja) * 1982-02-26 1983-09-01 Hitachi Ltd マイクロプログラム制御デ−タ処理装置
US4719568A (en) * 1982-12-30 1988-01-12 International Business Machines Corporation Hierarchical memory system including separate cache memories for storing data and instructions
US5206945A (en) * 1985-03-15 1993-04-27 Hitachi, Ltd. Single-chip pipeline processor for fetching/flushing instruction/data caches in response to first/second hit/mishit signal respectively detected in corresponding to their logical addresses
JP2539357B2 (ja) * 1985-03-15 1996-10-02 株式会社日立製作所 デ−タ処理装置
US4829424A (en) * 1985-06-28 1989-05-09 Hewlett-Packard Company Maximal length immediates with fixed sign position
US5349672A (en) * 1986-03-17 1994-09-20 Hitachi, Ltd. Data processor having logical address memories and purge capabilities
JPS62226231A (ja) * 1986-03-27 1987-10-05 Toshiba Corp プロセツサ
JPS62226232A (ja) * 1986-03-28 1987-10-05 Toshiba Corp 分岐先アドレス算出回路
US4785452A (en) * 1986-04-25 1988-11-15 International Business Machines Corporation Error detection using variable field parity checking
US4943915A (en) * 1987-09-29 1990-07-24 Digital Equipment Corporation Apparatus and method for synchronization of a coprocessor unit in a pipelined central processing unit
JP2902402B2 (ja) * 1987-09-30 1999-06-07 三菱電機株式会社 データ処理装置
JP2577023B2 (ja) * 1987-12-28 1997-01-29 株式会社日立製作所 情報処理装置のアドレス拡張制御方式
JPH01241636A (ja) * 1988-03-17 1989-09-26 Internatl Business Mach Corp <Ibm> データ処理システム
JPH0766324B2 (ja) * 1988-03-18 1995-07-19 三菱電機株式会社 データ処理装置
US4974146A (en) * 1988-05-06 1990-11-27 Science Applications International Corporation Array processor
EP0349124B1 (de) * 1988-06-27 1996-10-09 Digital Equipment Corporation Operandenspezifiererverarbeitung
US5101341A (en) * 1988-08-25 1992-03-31 Edgcore Technology, Inc. Pipelined system for reducing instruction access time by accumulating predecoded instruction bits a FIFO
DE69030573D1 (de) * 1989-01-17 1997-05-28 Fujitsu Ltd Ablaufsteuerung zur decodierung von befehlen variabler länge für ein mikroprozessor
US5167026A (en) * 1989-02-03 1992-11-24 Digital Equipment Corporation Simultaneously or sequentially decoding multiple specifiers of a variable length pipeline instruction based on detection of modified value of specifier registers
DE69231011T2 (de) * 1991-02-08 2000-09-28 Fujitsu Ltd Cachespeicher zur Verarbeitung von Befehlsdaten und Datenprozessor mit demselben
JP2970821B2 (ja) * 1991-08-21 1999-11-02 松下電器産業株式会社 データ処理装置
GB2263565B (en) * 1992-01-23 1995-08-30 Intel Corp Microprocessor with apparatus for parallel execution of instructions
SG45269A1 (en) * 1992-02-06 1998-01-16 Intel Corp End bit markers for instruction decode
US5371864A (en) * 1992-04-09 1994-12-06 International Business Machines Corporation Apparatus for concurrent multiple instruction decode in variable length instruction set computer
US6003120A (en) * 1993-12-30 1999-12-14 Intel Corporation Method and apparatus for performing variable length processor write cycles
GB9412434D0 (en) 1994-06-21 1994-08-10 Inmos Ltd Computer instruction compression
US5758116A (en) * 1994-09-30 1998-05-26 Intel Corporation Instruction length decoder for generating output length indicia to identity boundaries between variable length instructions
US5630055A (en) * 1995-05-05 1997-05-13 Digital Equipment Corporation Autonomous pipeline reconfiguration for continuous error correction for fills from tertiary cache or memory
US5958061A (en) * 1996-07-24 1999-09-28 Transmeta Corporation Host microprocessor with apparatus for temporarily holding target processor state
US6370636B1 (en) 1996-07-31 2002-04-09 Hyundai Electronics Industries Co., Ltd. Accessing byte lines from dual memory blocks and aligning for variable length instruction execution
US6199152B1 (en) 1996-08-22 2001-03-06 Transmeta Corporation Translated memory protection apparatus for an advanced microprocessor
US6223275B1 (en) * 1997-06-20 2001-04-24 Sony Corporation Microprocessor with reduced instruction set limiting the address space to upper 2 Mbytes and executing a long type register branch instruction in three intermediate instructions
US6425070B1 (en) * 1998-03-18 2002-07-23 Qualcomm, Inc. Variable length instruction decoder
US6292845B1 (en) 1998-08-26 2001-09-18 Infineon Technologies North America Corp. Processing unit having independent execution units for parallel execution of instructions of different category with instructions having specific bits indicating instruction size and category respectively
US7376814B1 (en) 1999-09-07 2008-05-20 Nxp B.V. Method for forming variable length instructions in a processing system
US6721875B1 (en) * 2000-02-22 2004-04-13 Hewlett-Packard Development Company, L.P. Method and apparatus for implementing a single-syllable IP-relative branch instruction and a long IP-relative branch instruction in a processor which fetches instructions in bundle form
US6968469B1 (en) 2000-06-16 2005-11-22 Transmeta Corporation System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored
US7711926B2 (en) 2001-04-18 2010-05-04 Mips Technologies, Inc. Mapping system and method for instruction set processing
DE10120522A1 (de) * 2001-04-26 2002-11-07 Infineon Technologies Ag Verfahren zum Erkennen einer korrekten Befehls-Einsprung-Adresse bei Verwendung unterschiedlich langer Befehlsworte
US6826681B2 (en) 2001-06-18 2004-11-30 Mips Technologies, Inc. Instruction specified register value saving in allocated caller stack or not yet allocated callee stack
JP2007122626A (ja) * 2005-10-31 2007-05-17 Matsushita Electric Ind Co Ltd マイクロプロセッサ
US8639882B2 (en) * 2011-12-14 2014-01-28 Nvidia Corporation Methods and apparatus for source operand collector caching

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL255604A (de) * 1959-09-08
US3377620A (en) * 1964-04-10 1968-04-09 Mohawk Data Science Corp Variable word length internally programmed information processing system
US3344404A (en) * 1964-09-10 1967-09-26 Honeywell Inc Multiple mode data processing system controlled by information bits or special characters
US4109310A (en) * 1973-08-06 1978-08-22 Xerox Corporation Variable field length addressing system having data byte interchange
JPS5931734B2 (ja) * 1977-10-25 1984-08-03 デイジタル イクイプメント コ−ポレ−シヨン 特別のオペランド指定子を持つた命令を実行する中央処理装置
US4236206A (en) * 1978-10-25 1980-11-25 Digital Equipment Corporation Central processor unit for executing instructions of variable length
US4241399A (en) * 1978-10-25 1980-12-23 Digital Equipment Corporation Calling instructions for a data processing system

Also Published As

Publication number Publication date
EP0073424A3 (en) 1984-05-23
KR840001350A (ko) 1984-04-30
CA1186801A (en) 1985-05-07
US4530050A (en) 1985-07-16
KR880000297B1 (ko) 1988-03-19
EP0073424B1 (de) 1988-05-04
EP0073424A2 (de) 1983-03-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee