DE2451100A1 - PRESENCE VERIFICATION SYSTEM - Google Patents

Description

DipU-.g VV. Dahllce 'October 20, 1974

DipL-inn. H.-j. Lippert Da./kr

Patent attorneys

. 506 Refrath'bei. Cologne,

Ffanicenforster Straße 137 ώ H O I I U U

Xenex Corporation Woburn, Massachusetts / USA

"Attendance Check System"

The invention relates to an attendance verification system, and more particularly a system that uses rays of energy, such as rays of light, to detect the presence of a person or an object within a certain space. The invention also relates to an attendance checking system in combination with a self-check to ensure that the test system is working properly.

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There are many practical uses for systems that automatically detect the presence of an object or person within of a particular room. Such systems are described below referred to as presence checking systems, while in the technical literature and in numerous patents, such systems are often referred to as intrusion verification systems. Attendance checking systems have a wide scope, in large part viewed as a so-called "security system" can be. A security system, such as a burglar alarm, is used to detect unauthorized presence and set up to trigger an alarm if a person or other intruder is in a certain zone which is to be secured against an unauthorized presence or unauthorized intrusion. If an attendance check system is used as a security system, it is set up to protect a person against injury by any to protect dangerous device. It is often used in conjunction with industrial machinery to make the machine to stop or give a warning when an object or person is in a dangerous position. In such Use cases, the known presence checking systems are inadequate in various respects. For example, there is a A need for an attendance verification system that is essentially immune to environmental conditions and false signals, and yet is responds to a real signal without errors. Furthermore, because of the utility nature of such systems, there is a need to provide a

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To create self-checking of the system function, so that a failure of the system is communicated so that one can no longer feel relies on the "system.

Attendance checking systems have already been proposed who worked with radiant energy or light rays is used to define a boundary of the room or area, which is to be protected or kept under surveillance. Such systems usually work with one or more Light sources and one or more light sensors so that the Interruption of the light between these is set up to generate a control signal that the presence of an object in the protected area. Such a light beam system is extremely good for machine safety systems suitable because it creates a clearly defined border for the protected area. The machine operator is given complete freedom of movement on the security side of the boundary or barrier, and the security system is controlled by the movement of material and equipment in close proximity of the border is not affected. The smallest Penetrating the border naturally causes the security system to respond. ·

The known photoelectric presence test systems operate with a variety of arrangements of light sources and photodetectors to form a light barrier level or curtain ¹¹

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to accomplish. A linear sequence of multiple light sources and an opposing linear sequence are typical of such systems Sequence of photo detectors, each of which is aligned with one of the light sources. The light sources are simultaneously and repeatedly switched on in a pulsing sequence, and the photodetector output signals are processed in a suitable manner, to determine whether or not any of the photodetectors is illuminated during each pulse interval. One such an arrangement is known from US Pat. No. 3,704,396. A similar arrangement is shown in U.S. Patent No. 3,742,222 known. It is also already known to create a light curtain by switching on sources in a sequence that are arranged in a linear sequence. In particular, these are columns arranged at a distance, each with alternating light sources and photodetectors are equipped, with the light from the source in a column from the opposite Photo detector is received in the other column, which turns on the adjacent source and light to the next receiver in the first column, etc., to the ends of the columns, and then this operation is repeated. With such systems there is a serious problem of cross-connection between the channels, i.e. the paths between a light source and the associated photodetector. Further, the sequence circuitry depends on each light source and each photodetector works to deliver a full work cycle.

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One of the difficulties with presence verification systems that use photodetectors is the effect of changes in the environmental conditions, especially in changes in the ambient light. Various schemes are already available has been proposed in the art to provide some degree of immunity in the system to such ambient light changes. For example, such a scheme distinguishes between ambient light changes and a signal light change on the Based on the time rate of change, and circuitry is provided to provide an output that can vary Signal light change corresponds. Such an arrangement is known from said US Pat. No. 3,704,396. Other known Systems provide for a modulation of the light with a certain frequency and work with a coordinated one Receiver circuit to differentiate between the ambient and signal light changes. This type of system is from the US patent 3 370 284 known.

The need for provision for self-checking in presence checking systems has been mentioned above. the known documents dealing with attendance checking systems show a certain amount of self-checking. For example It is known to provide a self-check by applying the presence checking system to a simulated event subject to object presence to determine whether the System responds properly. A system of this kind is over

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U.S. Patent 3,543,260. A failover function, in contrast to self-checking, is also known for presence checking systems, for example from U.S. Patent 3,242,341.

According to the invention a presence detection system is provided which operates with photodetectors and ice ⁿ effectively continuous light curtain generated to a border to define a protected area. The light curtain is generated with closely spaced light channels without interference or cross-response between the channels. This is achieved by a multiplication arrangement in which successive channels, each having a light source and a photodetector, are activated in a sequence and a light pulse is emitted during the activation of each channel. This enables the system to operate with a high signal-to-noise ratio because adjacent channels are not subject to interference from the activated channel. Furthermore, the array enables the light sources to operate at high energy levels, that is, each source is driven hard but operated on a low power cycle. This also enables the system to operate with a large spacing between the light sources and the photodetector of each channel. In addition, the multiple arrangement is particularly adapted to selectively switch off any desired channel in order to maintain a different spacing between the channels.

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to achieve.

In addition, the invention provides a presence checking system in a photoelectric design, which is determined by ambient light conditions, Ambient temperature changes or changes in response to characteristics of the photodetector elements remains essentially unaffected. This is achieved by using phototransistors as the sensor elements and in that a feedback circuit is provided to control the bias value of the phototransistors and thereby a Maintain immunity to environmental changes and a uniform response to signal inputs. Due to the Multiple arrangement, a 'single feedback circuit is connected to the phototransistors in a successive sequence, and he is able to control the bias for the entire set of phototransistors.

The invention also provides a self-checking system for the presence-checking system to ensure that the operator is not relying on the presence-checking system leaves to be protected if a functional error has actually occurred in the test system. Generally this will be through Selection of test points achieved in the test system that have a known binary state at a certain operating point in the Have duty cycle for each channel if the system is working properly. If the certain binary states at the loading

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If the operating point does not all occur correctly, a puncture error is indicated and the system automatically starts with a suitable alarming of the operator switched off. This self-checking system is particularly beneficial in Connection with the arrangement that allows an individual inspection of each channel during each cycle with the least amount of effort of system components and wiring between the light source side and the photodetector side of the light curtain is led.

Furthermore, the system according to the invention is provided with measures for failure assurance provided.

The invention is explained in more detail below with reference to the drawings. In the drawings are:

1 shows the arrangement of the presence check on a machine,

Fig. 2 is a timing diagram of the electrical waveforms in the system;

Figure 3 is a block diagram showing the overall presence verification system shows, and

4a and 4b show a common representation of certain

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System details.

In the drawings there is shown an embodiment of the invention in an attendance checking system which is particularly useful set up in a machine safety control system is. As the description proceeds, it will be apparent that the invention has numerous other uses can be. It should also be noted that the embodiment of the invention with light emitting diodes works that emit predominantly in the infrared part of the spectrum. It goes without saying that the term "light" Here radiation energy means whether it is visible to the human eye or not.

As shown in Fig. 1, the presence verification system is built according to the invention in a machine 10, for example in a punch, a punching tool or another Hazard point in an area of the machine that is to be protected. With such machine safety control systems if the protected area is to be shielded by a barrier that is defined by the presence checking system, which in the event of entry into the barrier by the hand of the operator or by another object, an immediate one The machine stops. As shown in Fig. 1, the presence verification system 12 is located on the machine and forms a light curtain that extends over an access opening

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extends to the punching point in the machine. The attendance check system has a transmission mast 16, which is seated on one side of the access opening H, furthermore a reception mast 18 the other side. Within the transmission mast 16 are a number of closely spaced light sources in the Form of light-emitting diodes 20, 20b, 20c, etc., which sit in a linear sequence on a circuit board. The mast 18 contains a number of photodetector elements in the form of phototransistors 22a, 22b, 22c, etc., which in their number of of the light-emitting diodes. The light emitting one Diode 20a is seated in such a way that the light beam extends over opening H and onto the sensor element of the phototransistor 22a falls, and thus the diode and the transistor form a set, the one channel for sending and receiving of a beam of light. Accordingly, the light emitting diode 20b and the phototransistor 22b constitute another Set, the light emitting diode 20c and the phototransistor 22c form another set, etc., with the additional a number of light-emitting diodes and phototransistors Form light transmission and reception channels. From Fig. 1 is also can be seen that the light rays from the light emitting Diodes are shown to form a curtain of light across opening 14. It should be noted, however, that only such a ray of light occurs at a time and that the rays are generated in rapid succession, and therefore can,

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in terms of human response or response, the rays of light are considered to be occurring simultaneously. As the description proceeds, however, it becomes apparent that in the electronic circuit of the system the timing and the response time are chosen so that this is not the case simultaneous occurrence of the light rays is an essential characteristic of the operation.

In connection with FIG. 1 it can also be seen that in such a machine safety control system an immediate interruption the operation of the machine must be caused when the operator's hand or other object in the Path of one or more of the separate light beams of the light curtain is located. The electronic circuit to effect such operation is conveniently housed in masts 16 and 18 with some connecting wires extending therebetween.

The presence monitoring system's electronic circuits are shown in the block diagram shown in FIG. The system generally includes a control subsystem and a self-checking subsystem which are interrelated, as can be seen from the following description will be. The control subsystem generally assigns the I ^ senders Diodes 20a, 20b ... and 2On and the phototransistors 22a, 22b ... and 22n on, each phototransistor optically in alignment with a relevant light emitting device

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Diode lies to form a set, with the different Sets form multiple channels, which are designated as channels a, b ... and η. The control subsystem also includes a Transmit channel multiplexer 26 and a receiver channel multiplexer 28, which puncture under the control of a clock 30 in order to successively close the channels a, b ... and η activate. A pulse generator 32 under the control of the clock delivers successive activation pulses for the light emitting Diodes with the activation of the relevant channels, and the signals generated by the phototransistors are successively on Pulse detector means 34 are applied to which analog-to-digital converters 36 and 38 and a missing pulse detector 40 belong. to For control purposes, the output of the missing pulse detector is applied to control relay 44 via a relay drive 42. The control subsystem further comprises a feedback circuit 46 to which a feedback amplifier 48 and an electronic Switches in the form of a field effect transistor 50 belong (controlled by the pulse generator 32), whereby this Circle extends to the control electrodes of the phototransistors. The details of the control subsystem will be described below.

The self-checking subsystem mentioned above has generally comprises a master verifier 50 which receives test signals under control of the pulse generator from selected operating points in the system. The self-verification subsystem

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further comprises a transmit test multiplexer 52 and a receiver test multiplexer 54 which are employed to generate test signals for the main verifier. Furthermore test signals from pulse generator 32 and indirectly from missing pulse detector 40 for input to the master verifier derived. The self-checking subsystem also includes a missing pulse detector 56 which has an input which is connected to the output of the main verifier, and which has another input which is connected to a relay test stage 58 is connected. The output of the missing pulse detector 56 is connected to a relay drive 42 via a lock 58. The details of the self-checking subsystem will be described below.

It may be helpful now to have the control subsystem in its Consider details, particularly in connection with the timing diagram shown in FIG. First of all, it should be noted that the control subsystem through the broadcast channel multiplexer 26 and the receiver channel multiplexer 28 can be put into operation, together with the clock 30 and the pulse generator 32 to activate the channels a, b ... and η in sequence, and during the activation time for each channel the light emitting diode in it is switched on with a pulse. If there is no obstruction in the relevant channel is, the corresponding phototransistor is effective in order to create a corresponding output pulse. This in

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The timing diagram shown in FIG. 2 illustrates the important events during a complete operational sequence for a single channel. Each cycle of this type has a duration T, which in the illustrated embodiment is 400 microseconds. It will be understood that the number of channels to be used in a particular installation will depend on the requirements involved, for example the area to be covered and the spacing between successive beams. The exemplary embodiment according to the invention can be set up for any number of channels, the selected number preferably being a multiple of eight, since the multiple coupler units are commercially available in integrated circuit chips with eight channels per chip. With a channel cycle time T of 400 microseconds, the basic flock frequency is 40 fcH. As shown in the timing diagram, the basic timing signal L is therefore a train of pulses with an interval of 25 microseconds between pulses. The clock 30 has frequency divider circuits which generate clock signals A, B, C, T1 and T2 in themselves, which successively represent a division of the basic clock frequency by two. The clock signals D1 and D2 are identical and, as can be seen from FIG. The multiplexer 26 is responsive to the appearance of the negative portion of the clock signal D1 at the call input 62 to cause the channel switching means to operate

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Connection of input 66 from one channel output to the next channel output. Correspondingly causes the occurrence of the negative part of the clock signal D1 at the input 64 of the multiplexer 28 an advancement of the connection of the input 68 from one channel output to the next channel output through the switching means. For reasons to be described later each of the channels a, b ... and η has an electronic switch in the form of field effect transistors 70a, 70b ... or 7On. In channel a, the field effect transistor with its collector and with its emission electrode is in series between the Output of the phototransistor and the input of a preamplifier 72 switched. The control electrode of the field effect transistor 70a is connected to the channel a output of the multiplexer 28. The field effect transistor 70b is correspondingly with its collector and with its emission electrode in series between the output of the phototransistor 22b and the input of the preamplifier 72 is switched, while the control electrode is connected to the channel output b of the multiplexer 28. Corresponding connections are made for the field effect transistors in the remaining channels.

Referring again to the timing diagram shown in FIG It can be seen that the pulse generator 32 generates a train of drive pulses E, one such pulse during each "channel cycle." occurs. Note in the timing diagram that the

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Pulse E occurs a little after the middle of the cycle. If so assuming that channel multiplexers 26 and 28 have just completed a cycle of operation on channel a does so Clock signal D1 at the channel call inputs 62 and 64 of the multiple coupler a connection of the input 66 to the channel output b in the multiplexer 26 and the channel input 68 to the channel output b of the multiple coupler 28. The channel b activated during its active period, i.e. during cycle time T, with pulse E from pulse generator 32 passing through goes through the input 66 of the multiplexer 26 and through the channel output b and travels through driver amplifier 74 to the input of light emitting diode 20b. At this point it will the channel switch or channel b, i.e. the field effect transistor 70b, closed by the internal bias signal, which comes from the channel multiplexer 28, which due to the clock signal D1 with its input 68 with a channel output b $ is connected for the entire duration of the cycle for channel b. As can be seen from the timing diagram shown in FIG is, the pulse generator 32 generates a chain of pulses G, one such pulse during each channel cycle at one Point occurs late in the cycle. Correspondingly, the channel switch 70b remains closed, but except during the pulse G-, for reasons discussed below.

If the driver pulse 1 occurs during the channel cycle of channel b while there is no obstacle in the light path,

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the phototransistor 22b generates an output pulse corresponding to the pulse E corresponds to, and the output pulse is passed through the preamplifier 72 to the input of the feedback amplifier 48 created. The output of the feedback amplifier is applied to the input 76 of the analog / digital converter 38. (To this Time, i.e. during the drive pulse E, the feedback switch, i.e. the field effect transistor 50, is open and the Feedback circuit 46 is inactive. In the timing diagram is note that a switching pulse H is simultaneous with the driver pulse 1 occurs and has a duration longer than E and is generated by the pulse generator 32.) The operation of the pulse detector means 34, to which reference has already been made briefly, will have to be described in detail below. here it suffices to note that, when the drive pulse 1 applied to the light emitting diode 20b, the Phototransistor 22b to generate an output pulse causes the system to continue normally through the remainder of the cycle of the Channel b is working and the cycle of channel c begins under the control of clock pulse D1. The channel multiplexers 26 and 26 thus run through the channel cycles in a sequence, and a chain of output pulses is applied to input 76 of converter 38 and a corresponding chain of pulses is applied to input 78 of missing pulse detector 40. So long everyone If there are pulses in the pulse train, the missing pulse detector 40 will keep the relay 44 energized and the machine will run Further. However, if there is an obstacle in one of the light transmission channels occurs, for example the hand of an operator,

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the phototransistor of this channel generates no pulse during this channel cycle, and the pulse train at input 78 of the Missing pulse detector 40 has a missing pulse, and detector 40 causes the relay 44 to be de-energized. When the relay is de-energized 44 the machine is stopped immediately. As will be seen below, the engine cannot be restarted until the operator has removed his hand from the light curtain and has reset the control circuit.

It may be helpful to look at the phototransistor circuits in detail, particularly as to the type and Way of creating immunity to changes in environmental conditions, such as light and temperature. As mentioned above, this is provided by the feedback circuit 46 shown generally in FIG. The feedback loop is shown in detail in the diagram shown in Fig. 4a. In this diagram are the phototransistors 22a, 22b and 22n are shown schematically to show the biasing arrangement. The collector of each phototransistor is with a source of positive voltage, and the emission electrode is connected through the channel switching field effect transistor a bus bar and then connected to an input of the preamplifier 72. Voltage limiting diodes 78a, 78b and 78n are connected in parallel to the field effect transistors 70a, 70b and 70n, respectively, in the conventional manner. The control electrode of the phototransistor 22a is through a limiting resistor

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82a to a common connection 84 and then through the feedback switching field effect transistor 50 and a resistor 86 connected to the output of the feedback amplifier 48. So, as can be seen, during the time during the the feedback switching transistor 50 conducts the bias at the control electrode of the phototransistor 22a determined by the output of the feedback amplifier 48. Is accordingly the control electrode of the phototransistor 22b through a resistor 82b, the common connection 84 »the feedback switching transistor 50 and the resistor 86 connected to the output of the amplifier 48. Including the remaining phototransistors 22n are connected to the output of feedback amplifier 48 in the same way. As can be seen, is the channel switching transistor 50 with a capacitor 88 parallel to its collector and with a voltage-limiting diode 82 provided parallel to its emission electrode. As has already been described above in connection with FIG. 3, is the control electrode of transistor 50 with the pulse generator 32 is connected to obtain the feedback switching pulse H. As can be seen from the timing diagram in Fig. 2, During each channel cycle the switching pulse H has a leading edge that coincides with the leading edge of the drive pulse E, and a trailing edge that occurs later than the trailing edge of the driving pulse. H is during the pulse the feedback switch 50 is open, and thus the output of the feedback amplifier is not passed to the during this time

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Bias circuits applied to the phototransistors. While however, every channel cycle before and after the occurrence of the H pulse, the output of the feedback amplifier 48 will pass through the channel switch 50 to the bias circuit for the phototransistor created in the activated channel. For example, if it is assumed that the multiplexer is under clock control has activated the channel b and accordingly the phototransistor 22b through its channel switching transistor 70b to the input of the Preamplifier 72 is connected, the output of which is applied to the input of the feedback amplifier 48, conducts the feedback switching transistor 50 during the portion of the channel cycle before the leading edge of pulse H. The feedback amplifier 48 is in the form of a differential or comparator amplifier. The amplifier 48 has a reference voltage input 94, which is connected to a reference voltage source 96. The signal input 98 of the amplifier 48 is with the Output of preamplifier 72 connected. A feedback resistor 102 is between the output of the feedback amplifier 48 and the reference voltage input 94 switched. In this arrangement, the feedback amplifier 48 functions so that the output is held at a voltage such that the signal voltage applied to the signal input 98 in the same size and polarity as the reference voltage at input 94 is present. The changes accordingly the output of the feedback amplifier 48 through the feedback switch 50 to the control electrode of the phototransistor

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22b applied voltage with changes in the output of the phototransistor 22b as a result of environmental conditions in the absence of a light pulse signal from the light emitting diode 20b. For example, when the ambient light incident on the phototransistor 22b or the ambient temperature increases, increases the output of the phototransistor changes as a result of such a change and the signal voltage input to the feedback amplifier 48 becomes more negative. That leads to an increase der'negative feedback of the amplifier, and the bias voltage applied to the control electrode of the phototransistor 22b is decreased until the signal voltage input to the feedback amplifier 48 again in the size of the reference voltage input will be the same. The storage capacitor 88 is charged to a voltage that corresponds to the output of the feedback amplifier 48 during the interval before the leading edge of the feedback scarf timpulses H corresponds. During the occurrence of the feedback switching pulse H and consequently during the The period at which the feedback switching transistor 50 is open or non-conductive is that at the control electrode of the phototransistor 22b by the voltage on the capacitor 88 and consequently by approximately the value that due to the environmental conditions immediately before the drive pulse E is determined which energizes the light emitting diode 20b to generate the light pulse signal for the phototransistor 22b. In addition to compensating for changes in the ambient light

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and in the ambient temperature also effects the feedback S2 retention 46 that each phototransistor produces an essentially identical response to that which is passed through the other phototransistors is generated even if the phototransistors do not match exactly in their characteristics. In other words, one can get a uniform response from phototransistors that the normal ones Have changes of the same characteristics among the individual transistors in a given set.

Another feature of considerable practical advantage in adapting the presence checking system to a particular application is that of being able to selectively switch off one or more channels of the light curtain. It'll be easier Way achieved in that a simulated output signal from the phototransistor is created in the channel, which is to be switched off. As shown in Fig. 4a, each of the phototransistors 22a, 22b and 22n is cut off by a switch 104a, 104b and 104n, respectively connected to the Ε output of the pulse generator 32 in suitable insulating resistors. So if a certain channel is to be switched off, for example the channel b, the switch 104b is closed by hand, and the drive pulse E is applied to pulse detector means 34 through preamplifier 72 and feedback amplifier 78. Even if so the transmission channel b is disturbed and the light pulse from the light-emitting diode 20b does not reach the phototransistor 22b,

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there is a pulse that simulates the output of the phototransistor 22b and there is no missing pulse that simulates the selected channel corresponds, namely in the chain pulses that are applied to the missing pulse detector 40. The selected channel is effectively switched off. It goes without saying that the selective shutdown of channels in a particular system is advantageous where, for example, maintenance or trial operation is to be made on the machine or where there is a change in the workpiece feed.

It should now be useful to consider in detail the pulse detector means 34 as shown in Figures 4a and 4b. As previously described in connection with FIG. 3, the output of the preamplifier 72 and the output of the feedback amplifier are 48 both pulse chains generated by the successive light pulse signals from the multiplied channels will. If none of the light beams in the light curtain is interrupted by an obstacle, the impulse chains exist equally spaced pulses from preamplifier 72 and feedback amplifier 48 with waveforms that move approximate that of the luminous intensity emission from the respective diodes. When a pulse or several pulses from the pulse trains absent, an intrusion or obstruction is indicated and the control subsystem is controlled by the pulse detector means 34 caused the relay 44 to be de-energized and the machine to come to an immediate standstill. Refer to Fig. 4a

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taking, follows a description of the details of the analog / Digital converter 38. The converter has a differentiator 110, which receives the incoming pulse train from the feedback amplifier 48 and differentiates the pulses. The exit of the differentiator is applied to a comparator 112 which generates an output, which arises at the input, with a certain polarity, and this exceeds one certain amplitude. The differentiator 110 has a Puncture amplifiers with a positive input that is grounded. The pulse train from the output of the feedback amplifier is through a coupling capacitor 114 and a series resistor 116 to the negative input of the amplifier created. The amplifier output is provided through a feedback resistor 118 and a parallel feedback capacitor 120 applied to the negative input of the amplifier. The exit of the differentiator 110 is applied to the comparator 112 as mentioned above. The comparator has a function amplifier and is with a threshold voltage on its Reference input from a reference voltage source 122 is provided. The signal from differentiator 110 is passed through a coupling resistor 124 is applied to an inverting input of the comparator amplifier. This input signal is sent to a Zener diode 126 is applied, which takes effect to pass the positive pulses and the amplitude of the negative pulses to the inverting Limit entrance. The comparator amplifier is also provided with an evaluation input from the pulse generator 32 provided with a pulse signal F (derived from the pulse generator

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32 by an inverter 128, which in Fig. 4t> shown). The pulse signals F and F "are in the timing chart in FIG shown, and as can be seen, the pulse F, which evaluates the comparator 112, a leading edge that with the trailing edge Edge of the driver pulse S coincides, and thus the evaluating pulses from the comparator 112 with the negative input pulses fall at the inverting input of the comparator. Accordingly, it is the output of the comparator 112 by a chain of positive pulses, one pulse occurring for each pulse input to the differentiator 110, provided that such input pulses have a trailing edge that has a rate of time change that exceeds a setpoint. "If the rate of change is less than the target value, that amounts to the differentiated applied to the inverting input of the comparator Signal less than the threshold voltage, and it arises no output pulse. The analog-to-digital converter 38 just described leaves an output pulse only in response on input pulses that coincide with the evaluation pulse F occur (which coincides with the trailing edge of a light signal pulse), and only if the trailing edge Edge of the input pulse has a rate of time change that exceeds the setpoint. Since the light-emitting diodes are extremely have fast rise and cut times, there is little likelihood of a noise pulse or false signal has the required rate of time change and also occurs in the "window" of the evaluation pulse.

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The output of the analog / digital converter 38 is applied to an input of the missing pulse detector 40.

Before describing the details of the missing pulse detector 40, it may be helpful to use the analog / digital converter 36 too consider developing a different input to the misspulse detector. The analog / digital pulse converter 36 is for the purpose of Development of a test signal provided that the functionality of the channel switching field effect transistors 70a, 70b, etc. indicates. Now back to the timing diagram in FIG. 2 and to the pulse generator Referring to that shown in Fig. 3, it can be seen that the pulse generator sends a pulse G to the end of each Channel cycle generated, namely after the drive pulse S has been applied to the light emitting diode. The impulse G is as shown in Fig. 3 to the input 68 of the receiver channel multiplexer 28 created. Correspondingly, the pulse G is sent through the multiple coupler channel output to the control electrode of the field effect transistor (channel switch) 70a, 70b etc. applied, depending on which is the activated one Channel acts. The pulse G causes the channel switch to open, i.e. it cuts off the field effect transistor for the short duration of the impulse. As a result, the preamplifier 72 creates a train of output pulses, with one pulse occurs during each channel cycle, which is associated with the appearance of the G pulse. This chain of pulses from the preamplifier 72 is connected to the input of the analog / digital converter 36

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created. As shown in Fig. 4a, the transducer 36 has a Functional amplifier having an inverting input connected to the voltage threshold source 122. A The signal input of the amplifier is sent to the output of the preamplifier 72 via a resistor 132 and to a capacitor 134 connected. A Zener diode 136 is connected to the input, to limit the negative voltage input to a target value. This increases the voltage at the signal input Zero when the channel switch (field effect transistor) is opened and it stays at zero until the switch is closed. Thus, the voltage at the inverting input from reference voltage source 122 will cause the amplifier to go positive Square wave output pulse generated during the interval of opening the channel switch. The output of the analog / digital converter 36 is a chain of pulses K, one pulse occurring during each channel cycle, provided that the channel switch working properly.

The missing pulse detector 40 is shown in detail in Figure 4b and, as mentioned above, is for responding to the absence one or more pulses in the chain of output pulses J from analog-to-digital converter 38 set up. As a result, the Missing pulse detector a control signal if one of the light beam channels in the light curtain encounters an obstacle. As in Fig. 4b As shown, the missing pulse detector has a flip-flop circuit 140, the J input of which is connected to the output of the converter 38

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connected to the chain is therefore receiving pulses J. Of the The K input is connected to the output of the converter 38 via an inverter 142. The clock input of the flip-flop circuit 140 is connected to the evaluation pulses f from the pulse generator 32 via an inverter 144. The pure input of the flip-flop circuit receives the timing pulse D1 from the clock 30. Accordingly, the Q output of the flip-flop circuit is a positive one Pulse that corresponds to each signal pulse J and has a leading edge that coincides with it, while a trailing edge Edge coincides with the negative part of the timing pulse D1. The missing pulse detector also has an AND gate circuit 146 which has an input connected to the output of flip-flop 140 and has one Another input that receives the chain of pulses K from the analog-to-digital converter 36 through buffer circuits 148 and 152. If the Signal pulse J is correspondingly present and the channel switch test pulse K is present, the AND gate circuit 146 generates an output pulse. The output of gate 146 is a train of pulses with one pulse in each channel cycle during the Pulse K occurs (and partially overlapping pulse G), the pulse train being continuous, i.e. none missing Has impulse unless one of the light beam channels encounters an obstacle or unless the channel switch does not work. To detect the absence of a pulse G3 from the gate circuit 146, a flip-flp circuit 154 and an identical one Redticlanz flip-flop circuit 156 is provided. These flip-flops are used to generate a high output

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directs when the positive part of the pulse 5 (see Fig. 2) is reached at a time when there is no G-3 pulse. For this purpose, the D input is both flip-flop circuits 154 and 156 are connected to the output of the gate circuit 146 in order to receive the chain of pulses G3. The C inputs of the flip-flop circuits 154 and 156 are supplied with a chain of pulses S from the pulse generator 32, the pulses being supplied by Invertor 158 or 160 can be created. The pure inputs of the flip-flop circuits 154 and 156 are with test points in the Latch 58 is connected, and as will be seen, the test points are high when the start circuit is operating properly works, and consequently the pure inputs do not cause the ζ) 2 and to go up <33 outputs of the flip-flop circuits as long as the start circuit is not defective. For the present purpose Therefore, the pure inputs to the flip-flop circuits 154 and 156 can be disregarded. The §2 and 53 outputs of flip-flops 154 and 156 are low except when a negative pulse is applied to the C inputs of the flip-flops is applied without a positive pulse at the D inputs. So if the signal pulse G-3 is present and overlaps the positive part of S, the outputs §2 and remain I53 low. If a signal pulse G3 is missing, the outputs §2 and §3 high, and they stay high until the startup circuit of Hand, which will be described later. The §2 and §3 outputs are with the stop circuits 60 and 190 connected, which is shown in FIG. If the $ 2- and ^ Hike up 3 outputs, the stop circuits D1 and D2 run

509821/0924 -30-

2451 Ί OU

high, and the multiplexers stop on the channel. The outcome of the Missing pulse detector 40 is applied to the input of the relay drive 42, which will now be described as "".

The relay drive 42 and the relay 44 are shown in detail in Fig. 4b, within the dashed rectangle which is designated 42-44. The relay part of the control subsystem is arranged to exercise control over the machine in which the intrusion detection system is installed. The relay itself, as described here, forms part of the control subsystem and is arranged to control a circuit in the associated machine which stops the machine or allows it to run, depending on the state of relay ¹ . According to the illustration in FIG. 4b, the relay drive has a Noder circuit 164 and an identical redundancy Noder circuit 166. One input of the Noder circuit 164 is connected to the $ 2 output of the missing pulse detector 40, which is low as long as no missing pulse is detected. The other input to Noder circuit 164 is derived from latch circuit 58 on conductor 168 which is low in the absence of a defect. Thus, if there is no missing pulse, as indicated by the low output of the detector 40, and if there is no defect, as indicated by the latch output, the Noder circuit 164 receives low inputs and produces a high output. In the same way, the redundancy Noder circuit 166 receives a low input from the redundancy flip-flop circuit 156 of the missing pulse detector,

- 31 50982 1/0924

and receives a low input from the output of latch 158 on conductor 172 when there is no defect. The !! or circuit 166 accordingly generates a high under these conditions. The relay drive has a transistor amplifier 174, the control electrode of which is connected to the output of the Noder circuit 164 via a resistor 176 and a resistor 178 and a capacitor 180. The transistor amplifier controls the excitation of a control relay R1. For this purpose, the emission electrode is directly earthed and the collector is connected to a voltage source ^{via the winding 182 of the control relay 1.} A protective diode 184 is connected to winding 182. The control relay R1 has relay contacts 182, which is shown in Fig. 4a. The output of the node circuit 166 is connected to the input of a redundancy transistor amplifier 174 'which controls the excitation of a redundancy control relay R2. The transistor amplifier 174 'is identical to the amplifier 174 and corresponding parts have the same reference numerals followed by a prime. Thus, when the output of the Noder circuit 166 is high, the transistor amplifier 174 'conducts fully and the control relay R2 is energized. From the foregoing description, in the context of the control subsystem, it can be seen that if there is no obstruction in any of the light beam channels of the light curtain, there will be no missing pulses in the signal pulse train connected to the missing pulse detector 40 and if the channel switches are functioning properly, is the output of the missing pulse

- 32 -

B09821 / 0924

detector 40 constantly low. Furthermore, if there are no defects indicated by the output signals from the latch 58, the control relays R1 and R2 are energized and the machine continues to run. However, if either an obstacle occurs in the path of one of the light beam channels or one of the channel switches fails or a defect is indicated by the interlock 58, the control relays R1 and R2 are de-energized and the machine is brought to a standstill.

The self-checking subsystem has been briefly described in connection with FIG. There now follows a consideration of the self-verification subsystem in detail, both in conjunction with FIG. 3 and in conjunction with FIGS. 4a and 4b. It is desirable for the purposes of the self-checking subsystem to derive test signals from selected points in the control subsystem so that the aggregate of test signals will indicate whether any defect has occurred in the system. For this purpose the transmit test multiplexer 52 is provided, and with its channel call input it is connected to the clock 30 via a stop switch 190 with the D2 timing signal output. As will be recalled, the timing signal D2 is identical to the timing signal D1, and thus the test multiplexer 52 is operated in synchronism with the channel multiplexer 26. The channel outputs a, b, c etc. of the channel multiplexer 26 are each connected to the channel inputs a ¹ , b ¹ , c 'etc. of the test multiplexer 52. The output 192 of the test multi-

- 33 509821/0 9 24

24511OQ

coupler 52 a chain of pulses E, which, as mentioned above, comes through the channel multiplexer 26 from the pulse generator. The pulses E are the drive pulses for the light-emitting diodes, as already mentioned. The output 192 of the test multiple coupler thus generates a chain of pulses MD which, inverted as shown as MD in the timing diagram in FIG. 2, coincides with the chain of pulses 1, apart from the internal delay of the circuit. The test signal MD is applied from the output 192 of the test multiplexer via a conductor 194 to a flip-flop circuit 196 which generates MD, and this signal in turn is applied to the input of the main tester 50. Similarly, as shown in Figure 3, the receiver test multiplexer 54 is provided for the purpose of developing a test signal for use in the self-verification subsystem. The test multiplexer 54 has its channel call input 198 connected to the clock 30 to receive the D2 timing signal through the stop circuit 190. Correspondingly, the test multiplexer 54 is operated synchronously with the test multiplexer 52, and also synchronously with the channel multiplexers 28 and 26. The channel outputs a, b, c etc. of the channel multiplexer 28 are connected to the channel inputs a ', b', c ¹ etc. of the test multiplexer 54 tied together. The output 20 of the test multiplexer 54 is correspondingly provided with a chain of pulses MD which is generated by the chain of pulses G which are sent from the pulse generator 32 through the channel multiplexer. According to the representation in the shown in Fig. 2

- 34 - '

509821/0924

In the th timing diagram, the MD pulses are synchronous with the pulses G and coincide with them, apart from the inherent time delay of the circuit. The test signal MD is passed through a flip-flop circuit 202 to invert the signal and thus the test signal MD to the input of the Main auditor 50 to be created. Furthermore, as shown in Fig. 3, the drive pulse E from the pulse generator 32 by a Conductor 204 applied to master tester 50 as a test signal. As shown in FIG. 3, there are also three test signals G3, K and Q (P1) derived from missing pulse detector 40 and applied to the input of main tester 50 via conductors 206, 208 and 210, respectively.

The self-checking subsystem with the flip-flop circuits 196 and 202, the master tester 50, the missing pulse detector 56 and the lock 58 is inFig. 4b shown. the Flip-flop stage 196 comprises a flip-flop circuit 214 and a redundancy flip-flop circuit 216, and these are for inverting of the test signal HD, which is applied to the main tester 50. The default input of the flip-flop circuits 214 and 216 is connected to the pulse generator via a conductor 218 in order to receive the chain of pulses P, the occurs immediately after the drive pulse E for the light emitting diodes. During each sewer cycle and in preparation on the next following channel cycle, the flip-flop circuits 214 and 216 are presented so that their Q output is low. The D inputs of flip-flops 214 and

- 35 509821/0924

" ³⁵ " 2451 1 OQ

216 are grounded via a conductor 220, and the C inputs of the Flip-flops receive the MD test signal from the output 192 of the test multiple coupler 52. In this arrangement / generate the Q outputs of flip-flops 214 and 216 do the reverse the C inputs. Corresponding to Ast in connection with FIG. 1, it can be seen that the MD test signal is low when properly operated, until the drive pulse E occurs, and then the test signal MD goes high. Correspondingly, with its coinciding period with the Ε signal, the inversion of the pulse MD is low, i.e. the test pulse MD is during the Cert / tLedrig, during which it is with the E-impulse coincides.

The flip-flop stage 202 has a flip-flop circuit 222 and a redundancy flip-flop circuit 224. These flip-fiop circuits operate in the same way as just described in connection with flip-flops 214 and 216 has been, and therefore the description is not repeated. The C inputs to flip-flops 222 and 224 receive the test signal MD from the test multiplexer 54. If a defect is absent, the Q outputs from flip-flops 222 and 224 are correspondingly during the period low, during which the output coincides with the drive pulse S. The outputs of flip-flops 214 and on conductors 226 and 228 corresponding to MD and are in the absence of a defect low. The

- 36 509821/0924

Outputs of flip-flops 222 and 224 on conductors 230 and 232 represent test signal MD, and are low if none These outputs are applied to the input of the main tester 50 along with the other test signals.

The main tester 50 consists of a combination of Noder circuits and a Nunt circuit, which in such a way and cooperate so that when all of the test signals applied to the master tester are low, the only one Main auditor output is also low. The test signals sought by the points in the control subsystem as. an indication of a defect are either low when there is no defect, during collapse with the driver pulse E, ader, as in the case of test signals MD and MD, the signal is inverted before being sent to the main tester 50, when the signals are always low (a defect or not) during the coincidence with the drive pulse 35. In the main tester, the driver pulse is 1 in the manner of an evaluation signal is used so that a defect check is made during the S pulse in each channel cycle. the Test pulses MD are applied to the inputs 226 and 228 of a Noder circuit 234 in the main tester, and the test signal MD is applied to the inputs of the Noder circuit 234 through conductors 230 and 232. The same input signals are sent to the Redundancy Noder circuit 236 is applied. If all inputs this Noder circuits are accordingly low, the outputs are

-37-5098 21/0924

24511OQ

low. The outputs of the Foder circuits 234 and 236 become applied to inputs of the Nunt circuit 238. The test pulse 1, which serves as an evaluation for the main tester, is sent to a Input of a Noder circuit 240 is applied, and the test signals KJ and G3 from the missing pulse detector 40 are applied to separate inputs the Noder circuit 240 is applied. As from the timing diagram As can be seen from Fig. 2, the test signals K, J and G3 are all normally low, i.e. in the absence of a defect During the occurrence of the evaluation or test pulse S. The same inputs as applied to the Noder circuit 240 are also sent to the redundancy Noder circuit 242 created. If all inputs are low, Noder circuits 240 and 242 produce a low output, and if so any one of the inputs is high, the outputs are high. The outputs of the nodes 242 and 240 are connected to separate ones Inputs of the Nunt circuit 238 and this creates a high output during each of the! that all inputs are low. As long as there is no defect, it is consequently the output of the Nunt circuit 238 and consequently the main tester 50 around a chain of positive pulses. However, when a defect occurs and during the occurrence of the pulse S remains, the chain of output pulses from the main tester 50 stops. The exit from the main auditor 50 is applied to the input of the missing pulse detector 56.

The missing pulse detector 56 is for detecting the absence of one Pulse set up in the output of the main tester 50. - 38 -

609821/0924

2A51100

This is achieved with a re-triggerable monostable multivibrator 250. The Α input of the multivibrator 250 is connected to the output of the main tester 50, and its pure input is connected to the output of the relay test stage 59 via a conductor 252. This output is normal in the absence of a fault in relay ¹ and therefore does not affect the Q output of multivibrator 250. The multivibrator 250 operates upon receipt of a high signal at its A input to produce a low output for as long as the high input is present and then for a specified time interval after the high input ends. This particular time interval is greater than the normal interval between output pulses from master tester 50. Thus, so long as there is no missing pulse in the train of pulses from master tester 50, the Q output of multivibrator 250 is low. However, if there is a missing pulse, the output of multivibrator 250 goes high and remains there until reset. A retriggerable multistable redundancy multivibrator 252 is also provided in the missing pulse detector 56 and is provided with the same input and operates in the same way as the multivibrator 250.

The self-checking subsystem also includes an interlock 58, which is shown in detail in Fig. 4b. The output of the missing pulse detector 56 is connected to the input of the lock 58 applied; in particular, the output of the multivibrator

- 39 509821/0924

250 is applied to an input of a Nunt circuit 260. Of the The other input of the Nunt circuit 260 is connected to the output 262 the start circuit 264 connected. The output of the startup circuit is normally high and stays high during operation high, unless there is a defect in the starting circuit. Accordingly, the Nunt circuit 260 receives a low input from multivibrator 250 and receives a high input from output 262 of the starter circuit under normal operating conditions. Accordingly, the Nunt circuit 260 generates a high output which is applied to the default input of a flip-flop circuit 266 will. The pure input of the flip-flop circuit 266 becomes connected to the output of the starter circuit and is therefore high in normal conditions. With these inputs to the flip-flop circuit 266, the Q output is low, and that output is connected by conductor 172 to an input of Noder circuit 164 in the relay drive circuit 42 is applied. As previously described, this allows input to the helai drive circuit 42 from the latch 58, the relay 'R1 remains energized. if however, the missing pulse detector 56 produces a high output, which happens when a missing pulse indicates a defect, flip-flop circuit 266 produces a high output which causes node circuit 164 to go low and the relay R1 is de-energized to stop the machine. The latch 58 has a redundancy Noder circuit 260 'and a redundancy flip-flop circuit 266 ', which is connected to the Noder circuit 260

- 40 -

509821 / 092A

245110Q

and the flip-flop circuit 266 are identical. The exit the redundancy flip-flop circuit 266 'becomes as above described, through conductor 168 to an input of the Noder circuit 166 is applied in the relay drive circuit 42. The ' Operation of redundancy circuits 260 ', 266 * and 266 is the same as that described in connection with circuits 260, 266 and 164.

The start circuit 264 has a Schmitt trigger circuit, at whose input a signal voltage via a resistor 282 is applied through a capacitor 284. The input voltage is applied to input 286 only when the Machine is switched on by the start switch. The output of the Schmitt trigger circuit 280 is provided by an inverter 288 is applied to the output 262, and also through a redundancy inverter 290 to the output 262 '. If that Power grid is switched on for the first time at input 286 of the Schmitt trigger circuit, its output is initially high, and after switching the trigger, their output goes low. The inverter outputs 262 and 262 are first accordingly low and then switched to high for stable state operation. The operation of the start-up circuit 260 becomes thus used to reset latch 58 so that its output is low. The start circuit 284 or a corresponding one Arrangement can also be used to reset all counters associated with the multiplexers are, to zero, so that the multiplexers are on the first

- 41 609821/0924

To let the channel start. To the start circuit on puncture ability To check, the output of transducer 288 is fed through a conductor 292 to the pure input of multivibrator 154 is applied, and accordingly the output of the inverter 290 is through a conductor 294 to the pure input of the redundancy multivibrator 156 created. If during operation the output the start circuit 264 is low, it is set high, in order to indicate a defect or an incorrect signal, and accordingly the control relays and the machine are de-energized is brought to a standstill.

The self-test subsystem also includes a relay test stage 59 which is shown in detail in Figure 4a. The relay test stage is arranged such that it determines whether the relay contacts 182 of the relay ¹ 1 and the relay contacts of the relay 2 are redundancy-184 'in the same or in corresponding positions. For this purpose, a voltage source is connected via a resistor 296 to the fixed contact 302 of the relay '1 and to the fixed contact 304 of the relay · 2. The other fixed contact of the relay '1 is grounded by a red signal light, and it is also connected to the input network 312 of a comparator 314 and a redundancy comparator 314' via a diode 308 and a resistor 314 '. Correspondingly, the other fixed contact 316 is connected to ground by a green signal light 318, and also via a diode 320 and the resistor 310 to the voltage dividing network 312. The output of the voltage divider

- 42 509821/0924

processing network 312 is connected to an inverting input of the ! Comparators 314 and to the inverting input of the redundancy comparator 314 'created. The other inputs of the! Comparator are connected to a reference voltage source 222. When relay contacts 182 and 184 are in corresponding positions are located, i.e. attack the fixed contacts 302 or 316, (relay energized and machine running), the green light 318 is switched on, and a high or positive voltage is generated by the voltage dividers 312. The inverting Comparator inputs low and an output generated by comparators 314 and 314 '. Of the The output of the comparator 314 goes through an inverter 322 through a conductor 324 to the pure input of the multivibrator 250. Correspondingly, the output of the comparator 314 'is given by a Invertor 322 'and a conductor 324' to the pure input of the Multivibrators 252 applied. A high voltage to the pure input of the multivibrator 250 does not affect its output. However, a low voltage to the pure input sets the ^ output of the multivibrator to high. Daghas the effect of a missing pulse and the interlock output goes high and the relays de-energize and the machine stands still. When operating the relay test stage 59, if the relay contacts 182 and 184 are both in the illustrated Position or both are in the opposite position, the corresponding red or green Signal light switched on, and the output of the relay test stage

- 43 509821/0924

will be high. Accordingly, there is no effect on the operation of the control relays and the machine. However, if the one or the other of the relay contacts 184 or 182 is in the opposite position to the "illustrated", the output of relay test stage 59 is low, and the multivibrators 250 and 252 are raised and latch 58 de-energizes the relays and stops the machine.

The operation of the presence checking system can be summarized as follows will. The control system with the channel multiplexers 26 and 28 operates under the control of the clock 30 and of the pulse generator 32 energizes the light emitting diodes 20a, 20b, etc. in a sequence, one at a time. The ray of light from the diode impinges on the corresponding phototransistors 22a, 22b, etc., provided that there is no obstruction is present in the light beam path. The one generated by the phototransistor Signal pulse is passed through preamplifier 72 and feedback amplifier 48 to pulse detector means 34. Before the drive pulse for the light-emitting diodes occurs, the feedback switch 50 is closed, and the bias value of the phototransistor is adjusted to compensate for changes in ambient light and to create in the ambient temperature. The signal pulses are passed through transducers 36 and 38 and the missing pulse detector 40 processed, the relay drive 42 the.

- 44 6 09 821/0 92 4

Relay 44 de-energized in the absence of a pulse in the signal pulse chain, as is the case with an obstacle in one of the light beam channels "is effected.

The self-checking subsystem works with test signals, derived from selected points in the control subsystem and it causes the machine to stall in the event of a defect. The test multiplexers 52 and 54 generate Test signals which, when low, indicate that each multiplexer is working properly with every other multiplexer is synchronized. The signals MD and MD are applied to the main tester 50. A test signal K that the functional T. indicating the speed of the channel switch is derived from the missing pulse detector 40 and applied to the main tester 50. Furthermore, a test signal Q (P1), which the emergence of the correct light signal pulse is derived from the missing pulse detector 40 and applied to the main tester 50. In addition, the Test signal G3, indicating a correct output from the missing pulse detector, from the missing pulse detector 40 to the main tester 50 created. In addition, the drive pulse signal 1, which is used to turn on the light emitting diode, used as a test signal in the main tester, and it can be viewed as an evaluation for its function. if all test signals are low during the occurrence of pulse S, the main tester output is low and this shows

- 45 609821/0924

correct operation of the control system. ^ enn however any of the test signals is high during the occurrence of pulse E, the main tester output is set high, and the missing pulse detector 56 sets the lock 58 which in turn de-energizes the relays and shuts down the machine. If the interlock is set, the presence detection system cannot be put back into operation. until the defect has been eliminated.

- 46 609821/0924

Claims (3)

- 46 claims 1.) Presence check system, marked by several sets of a light source and a photodetector, the source and photodetector of each set forming a channel and being arranged to allow light from the Source falls on the photodetector in the absence of an obstacle in the duct, pulse generating means for switching on the light sources, Transmission channel multiplexing means having an input connected to the pulse generating means and has several channel outputs, each connected to a different one of the light sources, channel switching means with a channel call input are provided, a clock connected to the channel call input for connecting the light sources in series with the pulse generating means, pulse detector means having an input for connection to one of the photodetectors, receiver channel multiplexing means with multiple channel inputs, each to a different one of the Photodetectors correspond and have channel switching means with a channel call input, the clock with the channel call input is connected in such a way that the photodetectors are connected in sequence to the input of the pulse detector means are in such a way that the multiple coupling means are switched synchronously by the clock and the channels in one Sequence are activated, the pulse generating means are synchronized with the clock, such that a pulse during - 47 509821/0 9 2A the activation interval of each channel for sending a light pulse from the light source to the photodetector of the same Set is generated in such a way that the pulse detector means receive at their input a train of pulses to which an impulse belongs to each of the activated channels in the absence of an obstacle in any of the activated channels Channels, the pulse detector means comprising detector means responsive to a missing pulse in the chain respond to impulses. 2. Presence detection system in photoelectric design, characterized by a light source, means for repeatedly switching on the light source at spaced time intervals, a photodetector which is arranged to receive L ₁ -chtimpuls from the source, and biasing means for changing the electrical output generated by a given light pulse, a feedback amplifier, the input of which is connected to the output of the photodetector and the output of which is connected to the biasing means, the amplifier being arranged to produce an output such that its input is equal to a setpoint value, when its output is connected to the biasing means, and switching means connected to the output of the amplifier for connecting it to the biasing means between the - 48 509821/0 9 24 Time intervals at which the source is switched on, and to separate the same from the biasing means during the time intervals during which the source is switched on, such that the photodetector against changes in environmental conditions is compensated. 3. Presence detection system in photoelectric design, characterized by several light sources and multiple photodetectors in a set arrangement, there being a source and a photodetector in each set, a pulse generator for turning on the Light sources, first multiple coupling means, which between the pulse generator and the light sources are connected, pulse detector means, second multiple coupling means, the are connected between the photodetectors and the pulse detector means, the multiple coupling means so synchronized are that the light sources are turned on by the pulse generator in a sequence and the pulse detector means receiving a train of pulses in a train from the photodetectors, the pulse detector means for detecting the absence of a pulse in the pulse train as an indication of the interruption of the light are set up by one of the light sources, switch-off means which are connected to the output of the detector means, Self-checking means with a binary comparator which is used to compare the binary state of several binary signals - 49 509821/0924 is set up, several selected test points with test points in the pulse detector means, wherein the pulse generator and the multiple coupling means are connected to the input of the comparator, the switch-off means with are connected to the output of the! Comparator. 509821/0924