DE19851703A1 - Electronic structure, e.g. FET, is produced by plotting, spraying, spin coating or spreading of insulating, semiconducting and-or conductive layers onto a substrate - Google Patents
Electronic structure, e.g. FET, is produced by plotting, spraying, spin coating or spreading of insulating, semiconducting and-or conductive layers onto a substrateInfo
- Publication number
- DE19851703A1 DE19851703A1 DE19851703A DE19851703A DE19851703A1 DE 19851703 A1 DE19851703 A1 DE 19851703A1 DE 19851703 A DE19851703 A DE 19851703A DE 19851703 A DE19851703 A DE 19851703A DE 19851703 A1 DE19851703 A1 DE 19851703A1
- Authority
- DE
- Germany
- Prior art keywords
- semiconducting
- substrate
- insulating
- plotting
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
- H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/464—Lateral top-gate IGFETs comprising only a single gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
Abstract
Description
Die Erfindung bezieht sich auf ein Verfahren zur Herstellung von elektronischen Strukturen.The invention relates to a method for producing electronic structures.
Gegenüber herkömmlichen Verfahren zur Herstellung von elektronischen Strukturen, insbesondere integrierten Schaltungen, z. B. mittels Epitaxie-, Ätz- und Temperprozessen basierend auf Silizium-Wafern, ist die Anwendung der Drucktechnologie von Polymermaterialien erheblich schneller und kostengünstiger. Des weiteren ist diese Technologie vielseitiger einsetzbar, da die verwendeten Materialien nicht solch extremen Temperaturen und Drücken ausgesetzt ist wie beispielsweise bei Epitaxie- und Oxidationsverfahren.Compared to conventional processes for the production of electronic structures, in particular integrated circuits, e.g. B. by means of epitaxy, etching and annealing processes based on silicon wafers, is the application of the printing technology of Polymer materials significantly faster and cheaper. Furthermore, this is Technology more versatile because the materials used are not so extreme Exposed to temperatures and pressures such as epitaxial and Oxidation process.
Bisher wurden Polymere zur Herstellung von Schaltkreisstrukturen mittels Siebdruck auf Waferoberflächen gebracht. Dies hatte jedoch den Nachteil, daß die erzielten Schichtdicken für die Herstellung beispielsweise von Transistoren zu groß waren, um gute elektrische Eigenschaften zu erhalten.So far, polymers have been used to manufacture circuit structures using screen printing Brought wafer surfaces. However, this had the disadvantage that the layer thicknesses achieved for the manufacture of transistors, for example, were too large to have good electrical Get properties.
Weiterhin besteht die Möglichkeit, mit Hilfe von Tinten- oder Laserstrahldruckern Polymere auf Waferoberflächen aufzudrucken. Bisher ist es jedoch nicht möglich, strukturierte Schichten in mehreren übereinanderliegenden Ebenen aufzubringen. Dies scheitert an der fehlenden Justagemöglichkeit. Da mehrere Schichten nur aufgebracht werden können, wenn eine genügend große Trocknungszeit der einzelnen Schichten eingehalten wird, ist dies mit Tintenstrahl- oder Laserdruckern nicht möglich. Ist die Trocknungszeit zu gering, kommt es zur Vermischung der Schichten, was eine Unbrauchbarkeit der Struktur zur Folge hätte.There is also the possibility of using polymers using ink or laser beam printers to be printed on wafer surfaces. So far, however, it has not been possible to structured Apply layers in several superimposed levels. This fails because of the lack of adjustment possibility. Since several layers can only be applied if a sufficient drying time of the individual layers is observed, this is with Inkjet or laser printers are not possible. If the drying time is too short, it happens to mix the layers, which would render the structure unusable.
Aufgabe der Erfindung ist es, ein Verfahren zur Herstellung von Schaltkreisstrukturen vorzuschlagen, bei dem die Nachteile des Standes der Technik beseitigt werden und insbesondere Polymere in Form von leitenden, halbleitenden und isolierenden Schichten strukturiert aufgebracht werden, wobei eine Justage der Ebenen möglich ist. Des weiteren ist es Aufgabe der Erfindung, daß das Verfahren derart gestaltet ist, daß Bauelemente und deren Verbindungen auf flexiblen Substraten aufgebracht werden können. Ein komplettes Aufbringen von Schaltkreislayouts in einer oder mehreren Ebenen soll durch erfindungsgemäßes Verfahren möglich sein. Weiterhin ist es Aufgabe der Erfindung, daß Schaltkreise und andere elektronische Bauelemente auch aus anderen Materialien als Silicium hergestellt werden können.The object of the invention is a method for producing circuit structures to propose in which the disadvantages of the prior art are eliminated and in particular polymers in the form of conductive, semiconducting and insulating layers be applied in a structured manner, adjustment of the levels being possible. Furthermore is it is an object of the invention that the method is designed such that components and their Connections can be applied to flexible substrates. A complete one Applying circuit layouts in one or more levels is intended to method according to the invention may be possible. Furthermore, it is an object of the invention that Circuits and other electronic components made of materials other than silicon can be produced.
Erfindungsgemäß wird diese Aufgabe gelöst, indem eine isolierende und/oder halbleitende und/oder leitfähige Schicht entsprechend der zu erzielenden elektronischen Struktur mittels Plotter auf ein Substrat aufgebracht wird. Als Substrate eignen sich sowohl feste als auch flexible Wafer, Glas, Folie oder ähnliche. Form, Größe und Dicke des Substrats spielen dabei eine untergeordnete Rolle. Die aufgebrachten Substanzen liegen dabei in flüssiger oder gelöster Form oder als Suspension vor. Insbesondere werden isolierende und/oder halbleitende und/oder leitfähige Polymere aufgebracht.According to the invention, this object is achieved by an insulating and / or semiconducting and / or conductive layer according to the electronic structure to be achieved by means of Plotter is applied to a substrate. Both solid and are suitable as substrates flexible wafers, glass, foil or similar. The shape, size and thickness of the substrate play a role a subordinate role. The substances applied are in liquid or dissolved form or as a suspension. In particular, isolating and / or semiconducting and / or conductive polymers applied.
Anschließend werden die aufgebrachten Substanzen durch Tempern oder Trocknen verfestigt. Nachfolgend werden, wahlweise mehrfach wiederholt, isolierende und/oder halbleitende und/oder leitfähige Schichten entsprechend der zu erzielenden elektronischen Struktur durch Plotten, Aufsprühen, Aufschleudern oder Aufstreichen aufgebracht und die jeweils aufgebrachte Schicht durch Tempern oder Trocknen verfestigt.The applied substances are then solidified by tempering or drying. Insulating and / or semiconducting are then repeated, optionally several times and / or conductive layers according to the electronic structure to be achieved Plotting, spraying, spin coating or brushing applied and the each applied layer solidified by tempering or drying.
Abschließend wird die aufgebrachte elektronische Struktur mit einer isolierenden Schicht versiegelt und in üblicher Weise kontaktiert und komplettiert.Finally, the applied electronic structure with an insulating layer sealed and contacted and completed in the usual way.
Durch dieses Verfahren werden sowohl elektronische Bauelemente als auch die Verbindungen einzelner Bauelemente in integrierten Schaltungen hergestellt.With this method, both electronic components and the connections individual components in integrated circuits.
Die Merkmale der Erfindung gehen außer aus den Ansprüchen auch aus der Beschreibung und den Zeichnungen hervor. Ausführungsbeispiele der Erfindung werden im folgenden näher erläutert.The features of the invention go beyond the claims also from the description and the drawings. Embodiments of the invention are described in more detail below explained.
Die Zeichnungen zeigen:The drawings show:
Fig. 1 bis 3 schematische Darstellungen schaltungsfähiger Feldeffekttransistoren Figs. 1 to 3 are schematic representations circuit capable field effect transistors
In diesem Ausführungsbeispiel wird die Herstellung eines schaltungsfähigen Feldeffekttransistors beschrieben.In this embodiment, the manufacture of a switchable Field effect transistor described.
Fig. 1 zeigt den schematischen Aufbau eines derartigen Transistors. Zuerst wird ein leitfähiges Polymer durch Plotten auf eine Waferoberfläche 1 aufgetragen und mittels Temperung verfestigt. Diese leitende Schicht stellt den Gate-Kontakt 2 des Feldeffekttransistors dar. Anschließend erfolgt das Plotten einer isolierenden Schicht 3 auf das verfestigte leitfähige Polymer. Auch die isolierende Schicht 3 wird mittels Temperung verfestigt. Danach erfolgt das Plotten einer halbleitenden Schicht 4 auf die verfestigte isolierende Schicht und anschließendes Verfestigen der halbleitenden Schicht mittels Temperprozeß. Nachfolgend wird eine Schicht eines leitfähigen Polymers durch Plotten aufgebracht und durch einen weiteren Temperprozeß verfestigt. Diese Schicht beinhaltet den Source-Kontakt 5 und den Drain-Kontakt 6. Fig. 1 shows the schematic structure of such a transistor. First, a conductive polymer is applied to a wafer surface 1 by plotting and solidified by tempering. This conductive layer represents the gate contact 2 of the field effect transistor. Subsequently, an insulating layer 3 is plotted on the solidified conductive polymer. The insulating layer 3 is also solidified by means of tempering. This is followed by plotting a semiconducting layer 4 on the solidified insulating layer and then solidifying the semiconducting layer by means of an annealing process. Subsequently, a layer of a conductive polymer is applied by plotting and solidified by a further annealing process. This layer contains the source contact 5 and the drain contact 6 .
Zuletzt wird die Struktur mit einer in der Figur nicht dargestellten isolierenden Schicht versiegelt und das Bauelement in üblicher Form kontaktiert.Finally, the structure with an insulating layer, not shown in the figure sealed and contacted the component in the usual form.
In diesem Ausführungsbeispiel wird ebenfalls die Herstellung eines schaltungsfähigen Feldeffekttransistors beschrieben.In this embodiment, the manufacture of a switchable Field effect transistor described.
Wie in Fig. 2 dargestellt, wird zuerst ein leitfähiges Polymer durch Plotten auf eine Waferoberfläche 1 aufgetragen und mittels Temperung verfestigt. Diese leitende Schicht stellt den Gate-Kontakt 2 des Feldeffekttransistors dar. Anschließend erfolgt das Plotten einer isolierenden Schicht 3 auf das verfestigte leitfähige Polymer. Auch die isolierende Schicht 3 wird mittels Temperung verfestigt. Nachfolgend wird eine Schicht eines leitfähigen Polymers durch Plotten aufgebracht und durch einen weiteren Temperprozeß verfestigt. Diese Schicht beinhaltet den Source-Kontakt 5 und den Drain-Kontakt 6.As shown in FIG. 2, a conductive polymer is first applied to a wafer surface 1 by plotting and solidified by means of tempering. This conductive layer represents the gate contact 2 of the field effect transistor. Subsequently, an insulating layer 3 is plotted on the solidified conductive polymer. The insulating layer 3 is also solidified by means of tempering. Subsequently, a layer of a conductive polymer is applied by plotting and solidified by a further annealing process. This layer contains the source contact 5 and the drain contact 6 .
Danach erfolgt das Plotten einer halbleitenden Schicht 4 auf die verfestigte isolierende Schicht 3 und auf die den Source-Kontakt 5 und den Drain-Kontakt 6 beinhaltende Schicht eines leitfähigen Polymers und anschließendes Verfestigen der halbleitenden Schicht 4 mittels Temperprozeß.This is followed by plotting a semiconducting layer 4 on the solidified insulating layer 3 and on the layer of a conductive polymer containing the source contact 5 and the drain contact 6 , and then solidifying the semiconducting layer 4 by means of an annealing process.
Zuletzt wird die Struktur mit einer in der Figur nicht dargestellten isolierenden Schicht versiegelt und das Bauelement in üblicher Weise komplettiert. Finally, the structure with an insulating layer, not shown in the figure sealed and the component completed in the usual way.
Fig. 3 zeigt schematisch den Aufbau eines weiteren schaltungsfähigen Feldeffekttransistors. Zuerst wird ein leitfähiges Polymer durch Plotten auf eine Waferoberfläche 1 aufgetragen und mittels Temperung verfestigt. Diese Schicht beinhaltet den Source-Kontakt 5 und den Drain- Kontakt 6. Danach erfolgt das Plotten einer halbleitenden Schicht 4 auf die verfestigte leitfähige Polymer-Schicht und auf die Waferoberfläche 1 und anschließendes Verfestigen der halbleitenden Schicht 4 mittels Temperprozeß. Fig. 3 shows schematically the structure of a further switchable field effect transistor. First, a conductive polymer is applied to a wafer surface 1 by plotting and solidified by tempering. This layer contains the source contact 5 and the drain contact 6 . This is followed by plotting a semiconducting layer 4 on the solidified conductive polymer layer and on the wafer surface 1 and then solidifying the semiconducting layer 4 by means of an annealing process.
Danach erfolgt das Plotten einer isolierenden Schicht 3. Auch die isolierende Schicht 3 wird mittels Temperung verfestigt.Then an insulating layer 3 is plotted. The insulating layer 3 is also solidified by means of tempering.
Nachfolgend wird eine Schicht eines leitfähigen Polymers durch Plotten aufgebracht und durch einen weiteren Temperprozeß verfestigt. Diese leitende Schicht stellt den Gate- Kontakt 2 des Feldeffekttransistors dar.Subsequently, a layer of a conductive polymer is applied by plotting and solidified by a further annealing process. This conductive layer represents the gate contact 2 of the field effect transistor.
Zuletzt wird die Struktur mit einer isolierenden Schicht versiegelt und das Bauelement in üblicher Weise kontaktiert und komplettiert.Finally, the structure is sealed with an insulating layer and the component in contacted and completed in the usual way.
In der vorliegenden Erfindung wurde anhand konkreter Ausführungsbeispiele ein Verfahren zur Herstellung von elektronischen Strukturen erläutert. Es sei aber vermerkt, daß die vorliegende Erfindung nicht auf die Einzelheiten der Beschreibung in den Ausführungsbeispielen eingeschränkt ist, da im Rahmen der Patentansprüche Änderungen und Abwandlungen beansprucht werden.In the present invention, a method was based on specific exemplary embodiments for the production of electronic structures explained. However, it should be noted that the present invention does not refer to the details of the description in the Embodiments is limited because changes and within the scope of the claims Variations are claimed.
Claims (6)
- 1. isolierende und/oder halbleitende und/oder leitfähige Schichten nacheinander wahlweise ein- oder mehrfach entsprechend der zu erzielenden elektronischen Struktur durch Plotten, Aufsprühen, Aufschleudern oder Aufstreichen auf ein Substrat aufgebracht und die jeweils aufgebrachte Schicht durch Tempern oder Trocknen verfestigt wird und
- 2. abschließend die aufgebrachte elektronische Struktur mit einer isolierenden Schicht, versiegelt sowie kontaktiert und komplettiert wird.
- 1.insulating and / or semiconducting and / or conductive layers successively optionally one or more times according to the electronic structure to be achieved by plotting, spraying, spin coating or brushing onto a substrate and the respectively applied layer is solidified by tempering or drying and
- 2. finally the applied electronic structure is sealed, sealed, contacted and completed with an insulating layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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DE19851703A DE19851703A1 (en) | 1998-10-30 | 1998-10-30 | Electronic structure, e.g. FET, is produced by plotting, spraying, spin coating or spreading of insulating, semiconducting and-or conductive layers onto a substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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DE19851703A DE19851703A1 (en) | 1998-10-30 | 1998-10-30 | Electronic structure, e.g. FET, is produced by plotting, spraying, spin coating or spreading of insulating, semiconducting and-or conductive layers onto a substrate |
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DE19851703A1 true DE19851703A1 (en) | 2000-05-04 |
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DE19851703A Withdrawn DE19851703A1 (en) | 1998-10-30 | 1998-10-30 | Electronic structure, e.g. FET, is produced by plotting, spraying, spin coating or spreading of insulating, semiconducting and-or conductive layers onto a substrate |
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Cited By (27)
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WO2002005360A1 (en) * | 2000-07-07 | 2002-01-17 | Siemens Aktiengesellschaft | Method for the production and configuration of organic field-effect transistors (ofet) |
DE10038895A1 (en) * | 2000-08-09 | 2002-02-28 | Advanced Photonics Tech Ag | Semi conducting and or electro luminescent device using a sheet construction of an organic type |
WO2002019443A1 (en) * | 2000-09-01 | 2002-03-07 | Siemens Aktiengesellschaft | Organic field effect transistor, method for structuring an ofet and integrated circuit |
WO2002047183A1 (en) * | 2000-12-08 | 2002-06-13 | Siemens Aktiengesellschaft | Organic field-effect transistor, method for structuring an ofet and integrated circuit |
DE10105914C1 (en) * | 2001-02-09 | 2002-10-10 | Siemens Ag | Organic field effect transistor with photo-structured gate dielectric and a method for its production |
DE10255870A1 (en) * | 2002-11-29 | 2004-06-17 | Infineon Technologies Ag | A process for preparation of layers from a layer material on organic semiconductor layers useful in the production of organic field effect transistors with top-contact architecture from conductive polymers |
US6803309B2 (en) | 2002-07-03 | 2004-10-12 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for depositing an adhesion/barrier layer to improve adhesion and contact resistance |
EP1472744A1 (en) * | 2002-01-25 | 2004-11-03 | MOTOROLA INC., A Corporation of the state of Delaware | Organic semiconductor device and method |
US6903958B2 (en) | 2000-09-13 | 2005-06-07 | Siemens Aktiengesellschaft | Method of writing to an organic memory |
US7064345B2 (en) | 2001-12-11 | 2006-06-20 | Siemens Aktiengesellschaft | Organic field effect transistor with off-set threshold voltage and the use thereof |
EP1701387A2 (en) * | 2005-03-09 | 2006-09-13 | Samsung Electronics Co., Ltd. | Organic thin film transistor array panel and manufacturing method thereof |
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EP2006915A2 (en) * | 2006-03-29 | 2008-12-24 | Pioneer Corporation | Organic thin film transistor device and method for manufacturing same |
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