DE102010041613A1 - Circuit device for operating semiconductor light sources, has current-compensated choke switched between switch and rectifier, where leakage inductance of current-compensated choke is used as converter inductance - Google Patents

Abstract

The device has two operating strands, where each strand comprises a rectifier (Re1), an input terminal, an output terminal, a reference potential and a current-compensated choke switched between a switch and the rectifier, where leakage inductance of the current-compensated choke is used as converter inductance. Semiconductor light sources are switched between the rectifier and the reference potential. The leakage inductance of the current-compensated choke is used as resonance inductance of a half bridge transducer.

Description

Technical area

The invention relates to a circuit arrangement for operating at least two semiconductor light sources in at least two operating sections. The circuit arrangement ensures that the same current always flows in the at least two operating sections, regardless of the voltage conditions prevailing in the respective operating section.

background

The invention is based on a circuit arrangement for operating at least two semiconductor light sources according to the preamble of the main claim.

From the Baddela, SM; Zinger, DS "Parallel Connected LEDs Operated at High to Improve Current Sharing", Conference Record of the IEEE Industry Applications Conference, 39th IAS Annual Meeting, 2004, 3-7 Oct. 2004, pp. 1677-1681, Vol. 3 is a balancing of LED currents by means of capacitors in series with rectifiers known. However, here the capacitive reactance of the capacitors is used, which is indeed frequency-dependent. This is disadvantageous because in various applications due to certain conditions, the operating frequency of the semiconductor light sources can not be fixed

The current balancing via current-compensated reactors is known in the art, see, for. B. the EP 1788 850 B1 the applicant. There, a circuit arrangement is disclosed in which a plurality of current-compensated reactors are connected in cascade. For n operating strands, n - 1 current - compensated chokes are required.

From the US 7408308 B2 a circuit arrangement is also known which achieves a current balancing of the operating sections connected to the current-compensated reactors by means of cascade-connected current-compensated reactors.

From the EP 1 286 572 A2 A circuit arrangement for balancing the currents in fluorescent lamps is also known, which uses a current-compensated choke for this purpose.

However, these known circuits have the disadvantage that the current-symmetrizing measures is integrated into an existing circuit, so that additional component costs incurred. This makes the product larger due to the additional components and causes high costs.

task

It is an object of the invention to provide a circuit arrangement for operating at least two semiconductor light sources, which requires less construction volume compared to the circuit arrangements known from the prior art and is less expensive to produce.

Summary

• – einen elektrischen Energiewandler, mit
• – mindestens einem Schalter,
• – einer Wandlerinduktivität und
• – mindestens zwei Betriebssträngen, von denen jeder einen Gleichrichter mit je einem Eingangsanschluss, einem Ausgangsanschluss und einem Bezugspotential aufweist,
• – mindestens eine stromkompensierte Drossel, wobei

die stromkompensierte Drossel zwischen den Schalter und die Gleichrichter geschaltet ist und die Streuinduktivität der stromkompensierten Drossel als Wandlerinduktivität genutzt wird, und wobei die Halbleiterlichtquellen jeweils zwischen den Gleichrichter und dessen Bezugspotenzial geschaltet sind. Durch diese Maßnahme kann die große und teure Wandlerinduktivität eingespart werden, ohne das sich in der Schaltungsanordnung Einschränkungen oder Nachteile ergeben. Gleichzeitig werden die Halbleiterlichtquellen alle mit dem gleichen Strom betrieben, so das eine sehr gute Helligkeitsverteilung über alle betriebenen Halbleiterlichtquellen gegeben ist.The object is achieved according to the invention with a circuit arrangement for operating at least two semiconductor light sources, comprising:

• - an electric energy converter, with
• At least one switch,
• - A Wandlerinduktivität and
• At least two operating trains, each of which has a rectifier, each having an input terminal, an output terminal and a reference potential,
• - At least one current-compensated choke, wherein

the current-compensated choke is connected between the switch and the rectifier, and the leakage inductance of the current-compensated choke is used as the converter inductance, and wherein the semiconductor light sources are respectively connected between the rectifier and its reference potential. By this measure, the large and expensive converter inductance can be saved without resulting in the circuit restrictions or disadvantages. At the same time, the semiconductor light sources all come with the same Power operated, so that a very good brightness distribution over all operated semiconductor light sources is given.

Preferably, the circuit arrangement per operating line to an additional diode, which does not belong to the respective underlying converter topology. This diode belongs to the rectifier, which ensures the necessary reverse voltage that often does not have the semiconductor light sources.

The electrical energy converter can be a down converter. If this is the case, the leakage inductance of the at least one current-compensated choke is preferably used as converter output inductance of the down converter.

For larger systems, the circuitry may preferably include a plurality of common mode chokes and a plurality of rectifiers, the common mode chokes having first and second inputs, first and second outputs, and wherein the first inputs are interconnected and the first outputs each connected to one associated with the rectifier, and wherein the second output of a current-compensated throttle is respectively connected to the second input of the subsequent current-compensated throttle and the second output of the last current-compensated throttle is connected to the second input of the first current-compensated throttle. This interconnection ensures efficient operation of the semiconductor light sources with optimum current balancing of the connected operating strands. Particularly preferably, a current measuring circuit is connected between the second output of the last current-compensated throttle and the second input of the first current-compensated throttle. For the entire arrangement is sufficient, a current measuring circuit, since the other operating lines yes all lead the current to which is regulated in the operating line with the current measuring circuit.

In a further embodiment, the electrical energy converter can also be a uc-converter, and the leakage inductance of the at least one current-compensated choke can be used as converter output inductance.

In a further embodiment, the electrical energy converter can also be a Sepic converter, and the leakage inductance of the at least one current-compensated choke can be used as a converter inductance in the converter circuit.

In a further embodiment, the electrical energy converter can also be a zeta converter, and the leakage inductance of the at least one current-compensated choke can be used as converter output inductance.

In a further embodiment, the electrical energy converter can also be a half-bridge converter, and the leakage inductance of the at least one current-compensated choke can be used as resonance inductance of the half-bridge converter.

Depending on the design of the circuitry, one of the types of transducers discussed above may be the optimal type of transducer for a particular application.

The electrical energy converter is preferably operated in such a way that the currents through the current-compensated reactors periodically return to zero. This is a pure AC operation and optimum symmetrization of the strand currents given.

The semiconductor light sources are preferably organic or non-organic light-emitting diodes. These usually require the same operating currents for the same brightness, which is why the circuit arrangement according to the invention is optimally suited for this type of semiconductor light sources.

In a further preferred embodiment, the electrical energy converter may have a transformer which is connected between the at least one current-compensated choke and the at least one switch. This embodiment may be advantageous if the phase voltages are very different from the input voltage.

The current-compensated choke preferably has a turn ratio of 1: 1. This measure reduces the cost of manufacturing the current-compensated choke, in many cases standard components can be used.

If, in certain arrangements, the phase currents deviate from each other, since z. B. different colored light emitting diodes require different operating currents, the current-compensated choke can also have a turns ratio of unequal 1: 1. Depending on the turns ratio and the strand currents will be different.

A quasi-parallel operation of a plurality of light-emitting diodes and / or a plurality of light-emitting diode strands is proposed by means of a common DC-DC converter, wherein the current intensities of the current flowing through the light-emitting diodes are approximately identical. It only has to be regulated to the current in a light emitting diode or in a string of light emitting diodes. For this purpose, a converter is used which contains one or more current-compensated reactors, wherein the stray inductances of the current-compensated reactors are used.

The current balancing by means of current-compensated reactors described so far is particularly applicable when a periodic current flow is present or is generated, which - as already mentioned above - always returns to zero. With very many switched electronic power circuits, such power flows can be generated. Thus, the previous illustrated power source can be realized by any inverter. Also DC-DC converters, so-called DC / DC converters, are based on various high and / or low-level transducer concepts and can be modified accordingly. In the following, some variants are shown, in particular their embodiments according to the invention, in which the leakage inductances of the current-compensated reactors are used.

Further advantageous developments and refinements of the circuit arrangement according to the invention for operating at least two semiconductor light sources emerge from further dependent claims and from the following description.

Brief description of the drawings

Further advantages, features and details of the invention will become apparent from the following description of exemplary embodiments and with reference to the drawings, in which the same or functionally identical elements are provided with identical reference numerals. Showing:

1 the principle of using a current-compensated inductor Lcm to Symmetrierang the two LED currents Io1 and Io2,

2 the balancing of the two output currents Io1 and Io2 by the current-compensated choke Lcm within wide limits independently of the LED forward voltages Vo1 and Vo2,

3 the symmetry of the two output currents Io1 and Io2 despite very different loads,

4 the automatic bridging of D2 in the open-circuit error case,

5 the balancing of the two output currents Io1 and Io2 by the current-compensated choke Lcm within wide limits independent of the loads by R1 and R2,

6 the elimination of rectification and unbalanced load of the current source discontinuous current flow through the LEDs,

7 the elimination of a rectification and a symmetrical loading of the current source discontinuous current flow through the LEDs,

8a the balancing of several light-emitting diodes or light-emitting diode strands by means of several interconnected current-compensated chokes according to a circuit variant A (tree structure),

8b the symmetrization of several light-emitting diodes or light-emitting diode strands by means of several interconnected current-compensated chokes according to a circuit variant B (ring structure),

8c an embodiment of the circuit variant B without Lcm5,

8d an embodiment of the circuit variant B without Lcm5 with unbalanced doubler circuit as a rectifier and ZVS half-bridge circuit for the realization of the AC power source,

8th an embodiment of the circuit variant B without Lcm5 with unbalanced doubler circuit as a rectifier and Class E converter for the realization of the AC power source, which also uses the stray inductances of the current-compensated reactors as resonance inductances,

8f the symmetrization of several light-emitting diodes or light-emitting diode strands by means of a plurality of interconnected current-compensated chokes according to a circuit variant C (series-parallel structure),

8g the balancing of several light-emitting diodes or light-emitting diode strings by means of several interconnected current-compensated chokes according to a circuit variant C with a particularly advantageous current measuring circuit,

9 an unequal distribution of the light-emitting diode currents in the ratio 3: 5 by corresponding connection of three current-compensated reactors Lcm1 ... Lcm3 with a turn ratio of 1: 1, respectively

10a a choke-down converter with current balancing and two outputs, each having a not belonging to the actual converter topology flow diode, and with inductive coupling of the LED Stromommeßwertes,

10b the choke down converter with current balancing and two outputs after 10a with ohmic determination of the LED current measurement value and comparator Cmp1 for detecting a discontinuous current in the converter inductance L1,

10c a choke-down converter with current balancing and three outputs,

11 the current symmetry at the choke-down converter with current balancing and two outputs,

12 a more detailed representation of the current symmetry,

13 a particularly advantageous embodiment of the inductor-down converter with current balancing and two outputs, which uses the leakage inductance of the current-compensated inductor as a converter inductance,

14 further measurements of the inductor-buck converter with current balancing and two outputs in comparison,

15 the increase of the output currents in the particularly advantageous embodiment of the inductor-down converter with current balancing and two outputs by increasing the input voltage,

16a an up-down converter with two outputs based on a Cuk converter in a variant A1,

16b an up-down converter with two outputs based on a Cuk converter in a variant A2, in which the two leakage inductances of the current-compensated inductor form the converter output inductances,

17a an up-down converter with two outputs based on a Cuk converter in a variant B1, which has only one converter output inductance, but per output a not belonging to the actual converter topology flow diode,

17b a two-output up-down converter based on a Cuk converter in a variant B2 in which the converter output inductance is formed by the leakage inductances of the current-compensated inductor and in which each output has a flow diode not belonging to the actual converter topology,

18a a two-output up-down converter based on a SEPIC converter in a first variant,

18b a two-output up-down converter based on a SEPIC converter in a second variant in which the converter output inductances are formed by the leakage inductances of the common mode choke.

19 a half-bridge inverter with resonant output circuit consisting of Lr, Cr1 and Cr2 realizes an AC source in the arrangement similar to the circuit variant B without Lcm5 8c .

20a a half-bridge inverter with reverse-shorted rectifiers or unbalanced voltage doublers, (identical to 8d !)

20b another illustration of the half-bridge inverter with reverse short-circuiting rectifiers, wherein each current-compensated reactor is replaced by an equivalent circuit consisting of a transformer and two leakage inductances Ls, and wherein the leakage inductances in series to the resonance inductor Lr act,

20c an advantageous embodiment of the half-bridge inverter with backward short-circuiting rectifiers, in which the entirety of the leakage inductances Ls completely take over the function of the resonance inductor Lr, and in which a resonant capacitor is indicated for each rectifier input, in order to further develop the circuit for multiresonant half-bridge converter,

21a a half-bridge inverter with three reverse blocking and three forward blocking rectifiers,

21b another representation of the half-bridge inverter 21a wherein each current compensated reactor is replaced by an equivalent circuit consisting of a transformer and two leakage inductances Ls, and wherein the leakage inductances act in series with the resonance inductor Lr,

21c an advantageous embodiment of the half-bridge inverter 21b in which the entirety of the leakage inductances Ls completely take over the function of the resonance choke Lr, and in which a resonance capacitor is indicated for each rectifier input, in order to further develop the circuit for the multi-resonant half-bridge converter,

21d an advantageous embodiment of the half-bridge inverter 21c in which the entirety of the leakage inductances Ls completely take over the function of the resonance choke Lr, with an additional transformer Tr, which serves for electrical isolation and / or for voltage adjustment,

21e an advantageous embodiment of the half-bridge inverter 21d with primary-side current measurement,

21f an advantageous embodiment of the half-bridge inverter with all reverse blocking rectifiers and the additional transformer Tr, which is used for galvanic isolation and / or voltage adjustment, the transformer having two secondary windings ns1 and ns2, which are poled in opposite directions,

22 a pulse width modulation controller with a fixed-frequency pulse width modulation,

23 a pulse width modulation controller with operation at the gap limit, wherein neither switching frequency nor on or off duration are constant,

24 a controller based on a current-mode control principle,

25 another embodiment of a three-output choke-buck converter with current sense and current zero crossing detection,

26 a choke-up converter with two outputs, in which the current-compensated choke must sit in a position of the converter which is not intended for an inductance, which is why an additional voltage-limiting branch coupled to the converter input inductance is required,

27 a throttle inverse converter with a corresponding monitoring of the demagnetization of the current-compensated chokes,

28a the block diagram of a circuit arrangement for balancing the two load currents I1 and I2 by the self-adjusting DC voltage V0 across the capacitor C0 in two reverse-shorting rectifiers with voltage doubling (circuit type VVD) in series,

28b the block diagram of a circuit arrangement for balancing the two load currents I1 and I2 by the self-adjusting DC voltage V0 across the capacitor C0 in two backward shorting rectifiers with current output (circuit type CD) in series,

28c the situation with type VVD for the case Ii> 0,

28d the situation with type VVD for the case Ii = 0,

28e the situation with type VVD for the case Ii <0,

28f Selected current and voltage curves of the circuit 28a .

28g the schematic diagram of a circuit arrangement for balancing the two load currents I1 and I2 by the self-adjusting DC voltage V0 across the capacitor C0 in the supply voltage path at a backward and a forward blocking rectifier with a simple voltage output (circuit type VD) in parallel,

28h the situation with type VD according to 28k for the case Ii> 0,

28i the situation with type VD according to 28k in case Ii = 0,

28j the situation with type VD according to 28k for the case Ii <0,

28k the schematic diagram of a circuit arrangement for balancing the two load currents I1 and I2 by the self-adjusting DC voltage V0 across the capacitor C0, which is connected between the voltage source and the reference potential, in a reverse and a forward-blocking rectifier with a simple voltage output (circuit type VD) in parallel .

29a a circuit arrangement for balancing the LED currents I11, I12,..., I32 despite different load (circuit type VVDa),

29b a circuit arrangement for balancing the LED currents I11, I12,..., I32 despite different load (circuit type CDa),

29c a circuit arrangement for balancing the LED currents I11, I12,..., I32 despite different load (circuit type VDa),

29d a circuit arrangement for balancing the LED currents I11, I12,..., I32 despite different load with different rectifier pairs (circuit type CDVVDVDa),

30a a circuit arrangement for balancing the LED currents I11, I12,..., I32 despite different load (circuit type VVDb),

30b a circuit arrangement for balancing the LED currents I11, I12,..., I32 despite different load (circuit type CDb),

30c a circuit arrangement for balancing the LED currents I11, I12,..., I32 despite different load (circuit type VDb),

30d a circuit arrangement for balancing the LED currents I11, I12,..., I32 despite different load with different rectifier pairs (circuit type CDVVDVDb),

31 a circuit arrangement for balancing the LED currents I1, I2, I3 and I4 despite different and switched load (circuit type VVDb),

32 a class E converter as a source to power the circuit after 31 .

33 a principal converter arrangement with current-compensated choke Lcm as power distribution network,

34 the possibilities A) to C) as "building blocks" of transducers, wherein by means of two capacitors a direct current through the current-compensated choke Lcm is prevented,

35 the union of possibilities A) to C) 34 in a figure, expanded to the resonance cell, wherein optional resonance capacitors Cr (shown here as an example connected to ground) are shown,

36 the general presentation of the building block according to 35 .

37 the circuit according to the 2 , with marked resonant cell CCC1,

38 a ZVS half-bridge converter that uses the leakage inductances of the current-compensated chokes,

39a the basic structure of the buck converter or buck converter with indicated positions for ZVS-enabling resonant elements,

39b the basic structure of the boost converter or boost converter with indicated positions for ZVS-enabling resonance elements,

39c the basic structure of the Cúk converter with indicated positions for ZVS-enabling resonance elements,

40 a multi-resonant Cúk converter, which uses the current-compensated inductor Lcm1 to balance the two LED currents Io1 and Io2, and which uses the leakage inductance of Lcm1 as a resonance inductance,

41 Voltage and current forms of the multiresonant Cúk converter,

42 a multiresonant inherent current-symmetrizing SEPIC converter,

43 a multiresonant inherent current-symmetrizing zeta converter,

44 an inherently current-symmetric class E converter with hard-switching rectifier diodes,

45 a multi-resonant inherent current-symmetrizing Class E converter,

46 a multi-resonant inherent current-symmetrizing buck converter,

47 a multi-resonant inherent current-balanced boost converter,

48 a multiresonant inherently current-symmetrizing choke inverse converter,

49 a multi-resonant Cúk converter with 4 inherently current-symmetrizing outputs through 3 tree-connected, current-compensated ballasts,

50 a multi-resonant Cúk converter with 3 inherently current-symmetrizing outputs through 3 current-compensated chokes in balanced ring connection,

51 a multiresonant Cúk converter with 2 outputs, whose currents are inherently set by 3 current-compensated reactors in a ratio of 3: 5,

52 a multiresonant inherent current-symmetrizing flyback converter,

53a a multi-resonant inherent current-symmetrizing Cúk converter in insulating form with common plus pole of the outputs,

53b a multiresonant inherent current-symmetrizing CUC converter in completely insulating form,

54a a multiresonant inherent current-symmetrizing zeta converter in insulating form with common negative pole of the outputs,

54b a multiresonant inherently current-symmetrizing zeta converter in completely insulating form,

55a a multi-resonant inherent current-symmetrizing SEPIC converter in completely insulating form with split capacitor.

55a a multi-resonant inherent current-symmetrizing SEPIC converter in completely insulating form with common blocking capacitor.

Preferred embodiment of the invention

1 shows the principle of the invention of the LED current balancing by means of a current-compensated choke, as they are used to attenuate common-mode noise so-called common mode interference in line filter. In contrast to such applications as a filter, however, always two connections of the current-compensated choke are connected to one another here. The AC source supplies the current Ii which is split by the current compensated inductor Lcm into two identical currents Icm1 and Icm2. These are rectified by the rectifiers Re1 and Re2. The resulting DC currents Io1 and Io2 also have the same strength and feed the LEDs D1 and D2. The direct currents Io1 and Io2 are to a very good approximation independent of the forward voltages Vo1 and Vo2 of the diodes used. The voltage at the AC power source Vi adjusts itself according to the impressed current Ii and the rectifier arrangements used, including loads, ie light-emitting diodes.

2 shows a concrete embodiment of the rectifier as unbalanced voltage doubler circuit. Instead of the single-ended voltage doubler circuit, other rectifier circuits, such as a half-wave rectification, a balanced voltage doubler, or a multi-stage voltage multiplier circuit, also referred to as a cascade or Cockroft-Walton circuit, could be used.

It is generally important that the two currents Icm1 and Icm2 should go through zero during each period, so that the core of the current-compensated choke demagnetizes again. Otherwise, after a few periods, the current-compensated choke loses its balancing effect, since the core saturates due to a DC component and then two non-coupled coils, each with an inductance corresponding to the leakage inductance, remain.

3a shows a further embodiment of in 2 shown circuit, with very different loads are present at the two outputs. In contrast to 2 Now, a light emitting diode strand consisting of two light emitting diodes is used at an output, whereas a single light emitting diode at the second output can be temporarily shorted by means of the transistor Q1. By means of the control signal V can be realized via the pulse width modulator PWM dimming of the LED D2.

The power source is realized with a sine wave generator with a frequency of 48 kHz and a series resistance of 50 ohms. Depending on the amplitude of the signal generator, the cases 1 to 3 are as shown in the table below. In cases 1 and 2, the transistor Q1 is turned off (0% duty cycle), whereas in case 3 the transistor is turned on (100% duty cycle). One recognizes the very good symmetrization of the two output currents Io1 and Io2 despite greatly different loading of the two outputs. case Io1 [mA] Io2 [mA] Vo1 [V] Vo2 [V] 1 1.06 1.06 3,051 1,526 2 15.33 15.33 3,410 1,768 3 17.06 17.13 3,429 0 Table 1: Measured values for the circuit according to FIG. 3

In the following, a failure of a light emitting diode in such a circuit arrangement will be considered. If a light-emitting diode fails with a short circuit, then all other light-emitting diodes are still operated by the circuit with rated current, which is to be regarded as "optimum behavior in the event of a fault". If, however, a light-emitting diode fails with an interruption, the voltage across this light-emitting diode rises to a multiple of the forward voltage and, moreover, all the other light-emitting diodes are operated with too low currents. Symmetrization is only partially given. On the other hand, however, the high voltage across the defective light-emitting diode can be regarded as an advantage since this greatly simplifies detection of the defective light-emitting diode and enables automatic bypassing of this light-emitting diode by means of the switch or transistor which is present anyway for dimming. In safety-relevant applications, such as in the automotive sector, it is thus possible to ensure emergency operation in both fault situations - interruption and short-circuit.

In 4 is the section around the diode D2 from an extended circuit according to the 3 shown. If the LED D2 fails due to a break, due to the high voltage across D2 generated by the current-compensated choke, the comparator will flip, resetting the flip-flop reset when the circuit turns on, thus turning Q1 on permanently.

In principle, this type of current balancing not only works for light-emitting diodes, but for any loads, such as in 5 are shown. Any conceivable loads are shown here as R1 and R2. Since balanced loads are assumed, the rectifier circuits Re1 and Re2 including the included smoothing capacitors can be omitted. 6 shows such a circuit with LEDs as a load. The result is a discontinuous current flow through the LEDs - only in the positive half-wave of the power source current flows through the two LEDs. In the negative half-cycle, the two LEDs lock. The reverse voltage corresponds to the open circuit voltage of the non-ideal power source.

In the case of an ideal power source, which has an infinitely high open circuit voltage, the circuit must after 7 be used to prevent destruction of the LEDs due to excessive reverse voltage. Instead of one light-emitting diode in each case two antiparallel-connected LEDs are used at the two outputs of Lcm. Now the power source is charged for both polarities.

The function of the current balancing by the current-compensated choke is both in the case of 6 as well as the 7 given that it is ensured that the two inductor currents go through zero again during a period, that is, a demagnetization of the core of the current-compensated inductor is made possible; so that the above requirement is met. However, the omission of the rectifier circuit is not recommended after this leads due to the high ripple of the LED current to a reduction in the luminous efficacy of the LEDs.

In contrast to the representation in 1 more than two light-emitting diodes or light-emitting diode strands are operated, this is possible with multiple current-compensated chokes. 8a shows a first circuit variant A, 8b shows a second circuit variant B, in which manner the current-compensated reactors can be interconnected to supply a plurality of light-emitting diodes or light-emitting diode strands with the same currents.

Variant B has the advantage over variant A that, on the one hand, the number of outputs, if one requires the same current through all LEDs, need not be a power of 2 (at least if only 1: 1 chokes are to be used and the same Current through all light-emitting diodes demands) and on the other hand all current-compensated chokes must be designed for the same load current.

The current-compensated choke Lcm5 is optional and leads to a "ring closure", which improves the symmetrical distribution of the currents on the outputs. However, this is more theoretically to be seen, since However, this effect in practice, not least because of the already very good balancing but does not significantly affect. Therefore, for cost and efficiency reasons, because additional ohmic resistance causes losses, the choke Lcm5 will not be used in the usual applications. Variant A requires n chokes at n outputs, variant B "without ring closure" requires n - 1 chokes at n outputs.

The 8c shows a concrete embodiment of 8b wherein the current-compensated inductor Lcm5 has been omitted and only simple half-wave rectifiers are used as rectifiers.

The 8d shows a further concretization of the circuit variant B analogous to 8b but without Lcm5, with an unbalanced doubling circuit used as a rectifier and a ZVS half-bridge circuit for realizing the AC power source.

A further embodiment of the circuit variant B according to the 8b , but without Lcm5, shows the 8th , In this case, an unbalanced doubler circuit is used as a rectifier and a class E converter for the realization of the AC power source. In addition, the stray inductances of the current-compensated reactors are used as resonance inductors.

In 8f a variant C is shown, which is already known from the prior art, the DE 10 2006 040 026 and WO 2005/038828 A2 , is known for cold cathode lamps. The variant C has the same advantages as the variant B, but n chokes are required. In the field of cold cathode lamps, it was state of the art to check the function of the circuit arrangement by means of a measuring resistor Rsh arranged in the secondary circuits. This can be done analogously in LED circuits, which is facilitated by the isolation. However, with current-compensated reactors with a transmission ratio of 1: 1 correspondingly high secondary currents Is flow, so that for reasons of power loss only small resistance values will be used for Rsh, which entails the difficulty of small measuring voltages. The arrangement after 8g eliminates this disadvantage as well as the disadvantage that the control of a high-frequency AC voltage has been made available through the use of a current transformer Tr and associated circuitry for the current measurement.

The arrangements according to the 8a . 8b and 8f also allow different large currents through the light-emitting diodes or light-emitting diode strands, but only a division of the light-emitting diode currents in fixed ratios is possible. For example, the current through the light emitting diode D1 and through the light emitting diode D2 in 9 in the ratio 3 to 5. Such an arrangement can in particular for the operation of several light emitting diodes of different types z. B. be advantageous in a lamp, z. B. with a combination of a warm white light source high luminous efficacy by the combination of cold white light emitting diodes and red light emitting diodes, each with high luminous efficacy.

The circuit according to the 10a is based on a choke-down converter consisting of an input capacitor C1, a switching transistor Q1, a step-down inductor L1 and a diode D3 to generate a pulsating direct current through the inductor L1. This current is divided by means of the current-compensated inductor Lcm1 on both rectifiers consisting of D1, C1 and D2, C2 and finally provided at the two outputs of the LEDs D11 and D12. One of the two light-emitting diode currents is detected by means of the current measuring device Im and supplied to the control Crtl, which changes the duty cycle of the transistor Q1 accordingly. Instead of two outputs, analogous to the above circuits, several outputs could be generated. Likewise, instead of individual light-emitting diodes and light-emitting diode strands could be used.

10b shows a further development of the circuit of 10a , wherein the current measurement is effected by means of the shunt Rs. More important, however, is the comparator Cmp1, at the output F ("freewheeling signal"), a low signal is generated as long as the diode D1 conducts. Directing D1 means that the inductor L1 freewheels, ie, the current decreases in L1, because energy stored in L1 is transferred to the capacitors C1 and / or C2. If L1 is de-energized, the current-compensated choke Lcm1 must also be de-energized because of the two diodes D1 and D2. Therefore, the detection of the demagnetization of the current-compensated inductor Lcm1 can take place in that, after the opening of the switch Q1 and the subsequent switching to low of the comparator output F, it is waited at least until F becomes high again.

The 10c shows a three-output throttle down-converter, with only the leakage inductances of the current-compensated chokes being used as the storage chokes of the converter. The current measuring device Imea determines one of the output currents and supplies an input to this output current proportional and GND-related measurement signal. The comparator Cmp1 is used to detect the demagnetization of the current-compensated chokes Lcm1 and Lcm2. The measurement signals Im and F are fed to the control unit, not shown, which in turn generates therefrom the drive signal Dr for the circuit breaker.

The 11 and 12 show measurements of current symmetry on a circuit according to the 10a , Ideally, the ratio Io1 / Io2 = 1 should be independent of the ratio of the two output voltages Vo1 / Vo2.

For the measurement, the control has been overridden and the transistor with a constant duty cycle of 50% and constant frequency driven in order to exclude effects due to the control and the change of the duty cycle, and thus to be able to examine the effect of balancing particularly easy. The switching frequency was varied in three series of measurements between 12, 24 and 48 kHz. The input voltage was kept constant at 10 V and the load at the 2nd output changed, whereas that at the 1st output (at 150 Ohm) remained unchanged. The reactor L1 has a value of 100 μH in this embodiment. The current-compensated choke used is of the type EPCOS B82721-K2701-N20 with an inductance of 2 × 10 mH, a series resistance of 2 × 0.60 ohms and a rated current of 0.7 A.

One recognizes from the 12 in that, with a lower switching frequency, the current symmetry is still ensured even for lower ratios of Vo1 / Vo2 and thus for greater loads. The reason for this is that the converter goes into continuous operation at a lower switching frequency only at a higher load.

Curve 81 proves the function of the arrangement - here the current compensated choke has been replaced by two 0.68 ohm resistors to illustrate which balancing effect is achieved by the series resistance of the common mode choke alone.

13 shows a particularly advantageous embodiment of the converter according to the 10a , The current measurement is realized by evaluating the voltage drop across the shunt Rs. More important, however, is the "saving" of the "actual buck converter choke" L1 - instead, the two already existing leakage inductances Ls1 and Ls2 of the current-compensated choke are used for this purpose. This measure also leads to a better symmetrization of the two output currents as from 14 evident.

The converter according to 13 was operated with current control disabled, as in all the measurements reported here, to show how the balancing of the output currents decreases with increasing output currents. For this purpose, the converter was loaded with R1 = 75 ohms and R2 = 150 ohms and the input voltage increased stepwise. 15 shows the ratio of the two output currents Io1 / Io2 above the mean output current (Io1 + Io2) / 2. It can be seen that up to an average current of 350 mA, the "asymmetry" remains below 5%. This corresponds to half the rated current of 700 mA of the current-compensated choke used.

In the 16 and 17 two embodiments of the invention based on the Cuk converter concept are shown. The in the 16a and 16b The circuits shown use capacitors C31 and C32 to prevent a DC current that would be set by the current-compensated choke due to the different output voltages. The circuits of 17a and 17b use for this purpose the diodes D1 and D2 analogous to the realization in the already described throttle converters.

As in the above-described throttle-down converter, the output-side reactor L2 in the 17a or the chokes L21 and L22 in the 16a be omitted, as in the 16b and 17b is shown, in which case the stray inductances Ls1 and Ls2 of the current-compensated choke take over their task.

In the case of a converter with n outputs are in the realization according to the 16 n capacitors and n diodes in the output circuits necessary (C31, ..., C3n and D31, ..., D3n). In the case of a realization according to the 17 these are 1 capacitor (C3) and n + 1 diodes (D3 and D1, ..., Dn). The former implementation has the better efficiency, since fewer diodes are required in the output, whereas the second requires fewer components.

The 18a and 18b show two embodiments of the invention based on the SEPIC converter concept, wherein in the embodiment of 18b the leakage inductances Ls1 and Ls2 of the current-compensated choke take over the task of the two inductors L10 and L20.

The 19 shows an inventive implementation of an inverter, based on a switch-balanced half-bridge circuit with resonant output circuit consisting of Lr, Cr1 and the optional Cr2, which realizes an AC power source. The half-bridge is zero voltage switching. This AC power source feeds an arrangement similar to that in FIG 8b to 8th disclosed.

The so-called "trapezoidal capacitors" C1 and C2 enable an approximately voltage-free switching off of the transistors Q1 and Q2. The transistors Q1 and Q2 have a fixed, time-invariant duty cycle, so are not driven by a pulse width modulation. This is chosen so that Q1 and Q2 are never conductive at the same time. The duty cycles of the two transistors do not have to be the same size. Thus, Q1 can have a 60% duty cycle and Q2 a 35% duty cycle.

The current control Ctrl uses the voltage drop across the resistor Rs to the desired target current through the light emitting diode D5, and thus set by all light emitting diodes, by changing the switching frequency of the transistors Q1 and Q2. This nominal current could be predetermined, for example, by a higher-level control of a light management system (not shown).

For the sake of clarity was in the 19 to the representation of an input filter (in front of the input capacitor Ci), for the suppression of electromagnetic interference. Also in all subsequent circuits is omitted.

Because of the two capacitors Cr1 and Cr2, the current Ii flowing into the rectifier circuits Re1 to Re5 can not have a DC component. Therefore, only rectifier circuits make sense, which receive a pure alternating current at their input. If such rectifier circuits are used, magnetic saturation of the current-compensated chokes Lcm1 to Lcm4 is reliably prevented. For example, rectifier cells may be used based on the single-ended voltage doubler circuit as described in US Pat 2 are shown. An exemplary embodiment with these reverse conducting rectifier circuits is shown 20a ,

20b is another illustration of the inventive circuit according to 20a wherein each current compensated choke is replaced by an equivalent circuit consisting of a transformer and two stray inductances Ls.

With appropriate dimensioning of the leakage inductances of the current-compensated chokes, the entirety of the leakage inductances Ls can completely take over the function of the resonance choke Lr, as the modified embodiment according to FIGS 20c represents. The effect of the optional resonant capacitor Cr2 is now achieved by the optional resonant capacitors Cr21 to Cr25. After the stray inductances of the current-compensated chokes are present anyway, a more cost-effective and more compact design can be realized in this embodiment.

21a shows a modified variant of the circuit according to 19 respectively. 20a which manages with reverse blocking rectifier circuits. The rectifier circuits are connected so that no DC component is caused in the current Ii, so that the DC current is ensured by the two capacitors Cr1 and Cr2. By way of example, Re1 and Re4 are shown as half-wave rectifiers. Re1 to Re3 and Re4 to Re6 have the same input current direction or polarity of the diodes used. The advantage of this circuit variant is the symmetrical utilization of both half-oscillations provided by the bridge circuit and the property that only n-2 current-compensated chokes are required to provide n outputs and fewer diodes are required for the reverse-blocking rectifier circuits than for the reverse-conducting rectifier circuits In addition, at a higher level of efficiency.

The circuit of 21a However, has the disadvantage that not all light-emitting diodes or light-emitting diode strands with the same connection, z. As the cathode, can be placed on GND or the common reference potential, which means that when using similar light-emitting diodes are cooled differently good. This is a great disadvantage, especially in the case of high-power LEDs. The application of the circuit according to the 21a Therefore, especially for low-power LEDs, z. B. Radial light-emitting diodes, or arrays of these useful. In the case of high-power LEDs, the Use of two different light-emitting diode types remedy, once the cathode and once the anode has a particularly good thermal connection to the light-emitting diode housing used. However, these two different embodiments require different light-emitting diode chip structures, which in the general case, however, have different properties (eg color), which is often undesirable. In the exemplary case of a MAG-GIE concept, however, two different colored light emitting diode types (mint / blue-green and amber / amber-colored) are deliberately used, so that in such an application the circuit appears meaningful. However, the two different LED types also have a different temperature behavior, in particular a color shift with the temperature, so that the ability to set different operating currents in both types of LEDs desirable, but this is for the circuit according to the 21a without considerable effort by a corresponding additional circuit is not possible. It thus remains in the determination that the circuit according to the 21a primarily for low-power LEDs advantageous appears.

The 21b shows another illustration of the circuit according to the 21a wherein each current compensated choke is replaced by an equivalent circuit consisting of a transformer and two stray inductances Ls.

With appropriate dimensioning of the leakage inductances of the current-compensated chokes, the entirety of the leakage inductances Ls can completely take over the function of the resonance choke Lr, as the modified embodiment according to FIGS 21c represents. The effect of the optional resonant capacitor Cr2 is now achieved by the optional resonant capacitors Cr21 to Cr26. After the stray inductances of the current-compensated chokes are present anyway, a more cost-effective and more compact design can be realized in this embodiment.

The 21d shows a further advantageous development analogous to the circuit arrangement according to the 21c , but now with transformer Tr, which is used for galvanic isolation and / or voltage adjustment. If appropriate, the leakage inductance of the transformer together with the entirety of the leakage inductances Ls completely assumes the function of the resonance choke Lr. In order to realize a galvanic isolation, the current measuring signal is transmitted correspondingly from the secondary side to the primary side part of the circuit by means of an opto-coupler circuit Opto.

The cost of galvanically isolated transmission of the current measuring signal according to the 21d not applicable to the circuit According to the 21e because here the primary current of the transformer is measured instead of a light-emitting diode current. Assuming that a transformer is used which is very close in characteristics to that of an ideal transformer, ie the transformer Tr should have a large main inductance and good coupling, the resulting error is negligibly small. For ease of illustration, the optional capacitors Cr21 to Cr26 have not been shown, although they could be used unchanged in this circuit as well.

The 21f shows a further advantageous development analogous to the after 21e , wherein the transformer Tr is designed with two secondary windings ns1 and ns2. This circuit avoids the disadvantage that not all light-emitting diodes or light-emitting diode arrays with the same polarity with respect to the common reference potential, for. B. the heat sink can be performed. Therefore, this circuit is particularly suitable for high-power LEDs.

The illustrated magnetic components can advantageously be integrated in a magnetic component, in particular in a ceramic component which is produced for example in LTCC technology.

The use of the stray inductances is particularly advantageous in the integration of a plurality of functionally different magnetic components in a magnetic component, since in comparison with conventional use of a plurality of discrete components, the integration results in comparatively large stray inductances and can now be used to advantage.

The design of the current-compensated choke is advantageously to be realized so that it has a defined leakage inductance and the current-compensated choke is not saturated even at high currents. For this purpose, constructions are advantageously used, as in the EP 0 275 499 A1 or the DE 36 21 573 A1 are described. For use for lighting purposes, in particular, an embodiment according to the DE 3621573 A1 advantageous.

The DE 36 21 573 solves essentially the same task as the EP 0 275 499 A1 : The realization of a current-compensated choke with large additional leakage inductance for the suppression of symmetrical disturbances is presented. In contrast to EP 0 275 499 A1 will be in the DE 36 21 573 not for each "outside" ladder its own "outer core" used, but only one outer core for all. For this purpose, two air gapless ring cores are used for the current-compensated choke, wherein initially the first core is uniformly wound over the entire circumference in order to obtain a small external magnetic field. Then a second iron powder core of carbonyl iron is placed concentrically over this first ferrite ferrite core. Now, the second winding is wound by both ring cores with the same number of turns and possibly slightly thicker wire for the same copper resistances of the two windings. By choosing the core cross-sections, the nominal inductance of the current-compensated choke and the stray inductance acting against symmetrical disturbances can be adjusted separately.

A first embodiment of the scheme for the converter according to the 10c is the in 22 illustrated pulse width modulation controller. He realizes a fixed-frequency pulse width modulation. This controller consists of the error amplifier Op1 which generates the error signal Vea as a PID controller from the measured output current and the reference signal Vref associated with the reference current. This is compared in the PWM comparator Cmp2 with a ramp voltage. In a conventional pulse width modulation controller, the generated signal P would be supplied to the gate driver Drv of the circuit breaker. By means of the additional logic FWC, however, it is ensured that a demagnetization of the current-compensated chokes has taken place before the Q1 can be switched on again, ie if necessary, the on-time is cut off by the freewheel signal F. If the actual PWM signal P goes low, the RS FlipFlop set by the falling edge. The RS flip-flop "notices" that the circuit is in the demagnetization phase. If the PWM signal were to become high again at this stage, the AND gate would prevent the output Dr from becoming high. Only when the demagnetization signal arrives in the form of a high of the measurement signal F, the FF is reset via the R input. In order to enable safe operation of the circuit, in particular a safe start-up of the circuit, the timer Tmr is provided, the time value of which corresponds to the maximum conceivable demagnetization time. If the FF is set for longer than this time, the output of the timer goes high and automatically resets the flip-flop. If the additional logic FWC intervenes, this leads to the fact that the control loop is opened and the actual controller Op1 runs to the limit, so that P becomes a signal with maximum duty cycle. However, this opening of the control loop and the associated deviation of the required output current from the setpoint is accepted in order to be able to ensure the balancing of the output currents.

Instead of the regulator after 22 , which realizes fixed frequency pulse width modulation, can also be used in 23 shown controller for the circuit after 10c used, which ensures operation at the boundary boundary (Boundary Conduction Mode), where neither switching frequency nor on or off duration are constant. In contrast to the above embodiment, it does not work with a constant switching frequency, but with a variable: As soon as the current through the inductor reaches zero, the transistor is switched on again. The error amplifier and the pulse width comparator are as in 22 realized by means of Op1 and Comp2.

If a demagnetization of the chokes has taken place, the low-high transition of F causes the ramp generator Ramp to start generating a new ramp. This is compared with the error signal from the comparator Cmp2. The higher the error signal is, the longer does P and / or Dr remain in the high state, and consequently Q1 is switched on before Cmp2 tilts to low. A low on Dr results in a demagnetization of the chokes, until at some point the demagnetization is confirmed by a renewed low-high transition of F, which leads to the generation of a new ramp.

In order to enable safe operation of the circuit, in particular a safe start-up of the circuit, the timer Tmr is provided, the time value of which corresponds to the maximum conceivable demagnetization time. If the output is low for longer than this time, a new ramp will be generated and no further wait for a low-high transition of F.

A controller based on a current-mode control principle for switching to 25 provides 24 This controller also realizes a operation at the Boundary Conduction Mode. The control amplifier Op1 generates at its output the signal Vea which is compared with the current current measurement Im2. If the value of Im2 exceeds that of Vea, the high-low transition of P leads to the reset of the flip-flop and thus to the shut-down of Q1. In the subsequent demagnetization phase, F initially remains high, since the current current value is greater than zero. If the demagnetization has taken place, it may (due to a parasitic oscillation, which briefly causes Icm to become negative) possibly multiple flips of the comparator Cmp1, where the high-low transition of F causes the setting of the flip-flop and thus Q1 is turned on again. As with the above circuits also, an additional timer Tmr is provided, which sets after a long period of the flip-flop in the unlocked state, thus ensuring the "start"

25 illustrates another embodiment of a three output choke down converter. Unlike the circuit according to 10c Now the current measurement takes place by means of the shunt Rs at the common feed terminal of the power distribution network instead of at one of the outputs of the circuit. The current measuring device Imea is implemented by a differential amplifier, which supplies a measuring current proportional to the current Icm to be measured and to GND, after the signal Im2 corresponds to the correspondingly amplified and ground-related voltage drop across the shunt Rs. The time average of the voltage drop across Rs corresponds to the time average of the sum of all LED currents. In order to be able to provide the time average of the output currents to the control, the low pass LP is present. As in the circuit according to the 10c the comparator Cmp1 is used to detect the demagnetization of the current-compensated chokes Lcm1 and Lcm2. As a control circuit, the circuits according to the 22 . 23 and 24 come into use

26 shows a choke-up converter with two outputs. The actual boost converter consists of the storage inductor L1, the switching transistor Q1 and the diodes D1 and D2. As with the buck converter described above, even in a boost converter, regulation may be to one of the two output currents or to the current flowing into the feed terminal of the power distribution network. In the circuit considered here, the control takes place on one of the output currents. In addition, a subordinate current control loop in the sense of a "current mode contol" can be used, which uses the switch current - detected by the resistor Rq - for control.

The leakage inductances of the current-compensated choke Ls1 and Ls2, which can be used advantageously in the choke-down converter, are undesirable in the step-up converter because they lead to high voltage peaks when the transistor Q1 is turned off. Ls1 and Ls2 prevent the currents in the output circuits from 0 to the respective half current value of the Throttle current can jump through L1 at the time of turning off the transistor. Therefore, a snubber network should be provided, which limits the switch voltage. This may be implemented dissipatively in the form of an RDC network parallel to Q1, or as an optional terminal circuit for the transistor voltage of Ld and D3 and may be non-dissipative. The illustrated clamp circuit limits the switch voltage immediately after opening Q1 to a value resulting from the gear ratio of the transformer formed by Ld and L1 and the input voltage. Ld and L1 should be magnetically coupled together as well as possible. Assuming that the input voltage is 10V and Ld is twice as many turns as L1, the transistor voltage would be limited to a value of twice the input voltage, hence 20V, since diode D3 will then begin to conduct and the voltage on the transistor stuck.

In contrast to the buck converter, the buck converter has no restriction on continuous and continuous operation, at least as long as the stray inductances are negligibly small. Regardless of the mode of operation, while Q1 is on, the current compensated inductor is demagnetized, so the current through the current compensated inductor becomes zero, and the subsequent blocking of the two diodes D1 and D2 maintains that state until the next time Q1 is turned off.

Therefore, the Boost converter does not require any of the control circuits described above, because even if the converter operates continuously with respect to inductor L1, the topology always ensures that the power distribution network is operated in discontinuous operation and thus always demagnetization of the common mode chokes is given in the network.

As with the buck converter, a corresponding monitoring or control is also required in the case of the inverse-change converter, so that the demagnetization of the current-compensated throttles is reliably ensured. The 27 shows such a converter, which like the above-described up-converter contains an optional clamping circuit for the transistor voltage - consisting of Ld and D3 - contains.

In order to detect the demagnetization of the chokes different circuit sizes are available. Among other things, current measurement of the current through L1 or current measurement of the current flowing into the power distribution network may occur. It can also be checked by means of two voltage measurements that the diodes D1 and D2 block. Also, an additional third winding can be applied to each of the current-compensated chokes and then evaluated that all of these Tensions have become zero. Alternatively, the voltage across the switching transistor can be evaluated. After the initial high value which is determined by the terminal circuit, during the demagnetization phase, the voltage across the switch drops to the sum of the input voltage and the average of the amounts of the two output voltages and then again to the input voltage as soon as all the reactors are demagnetized. This second drop in switch voltage can also be used for detection.

In the execution according to 27 However, if another possibility is used for the detection. For this, the voltage across the inductor Ld will be used, because if it has fallen to zero, all inductors are demagnetized and the switch Q1 can be switched on again from this point on. Analogous to the above control circuits according to the 22 to 24 can be run for the inverter converter corresponding control circuits.

The following figures consider a further variant of the current balancing in several branches. The current balancing is realized by the series connection of a capacitor, an AC or AC voltage source and two oppositely connected, reverse-conducting rectifier circuits, which each include one or more light-emitting diodes connected in series. Each of these circuits provides two LED outputs related to a common potential (eg, ground). Several of these circuit arrangements can be used, if more than two 'LED outputs' are required.

The 28a and 28b show embodiments of such circuits. The two figures show the circuit types VVD and CD. The circuit type VVD is based on a voltage doubling circuit and the circuit type CD is based on a simple current smoothing circuit.

The operation of the circuit according to the 28a illustrate the 28c to 28e , In the following, to simplify the explanation, the assumption is made that all components are ideal, ie in particular the diodes behave as ideal switches.

The source Q works as a power source. If a positive current Ii is supplied by the source Q, then shows 28c the components relevant to the function: The current Ii flows through the diode D11, then splits to C11 and R1, and then flow back to the source via the ground connection M, the diode D22 and the capacitor C0 drawn for ease of understanding. The load R2 is supplied by the capacitor C2 during this time range. The magnitude of the current Ii> 0 only has an effect on the load current I1, but not on I2.

If no current Ii flows through the source Q, so illustrated 28d in that the loads R1 and R2 are supplied with energy by the associated capacitors C1 and C2, respectively. After the capacitor voltages V1 and V2 are positive, divides the respective capacitor voltage across the two diodes D11 and D12 or D21 and D22 and lock all diodes.

The 28e shows correspondingly the relevant components in the case that the source Q provides a negative current. Here the behavior of the two rectifiers is exactly the opposite: For Q, only GR2 is effectively present, whereas GR1 is not visible. The magnitude of the current Ii <0 has only an effect on the load current I2, but not on I1.

Due to the capacitor C0 can flow through the source no DC or Ii can not have a DC component, since the capacitor C0 acts as a blocking capacitor or Symmetrierkondensator. Since the positive portion of the current of Ii ultimately determines the load current I1 (since the positive portion of Ii is blocked by D12, it must flow through D11, and since no direct current can flow through C1, the time average of the positive portion of Ii must equal the time average of I1) and the negative portion of Ii determines the load current I2, the time averages of the load currents I1 and 12 must be equal. Thus, both loads R1 and R2 are operated with the same current (current balancing).

The 28f illustrates exemplary current and voltage characteristics of the circuit 28a For the sake of simplicity, rectangular current profiles were assumed. For illustration, a duty cycle of 2: 1 was assumed.

For the representation of the occurring stresses in the lower half of the figure an ideal smoothing of the load currents was assumed in addition to the assumption of ideal components, which is infinitely large Capacitors C1 and C2 conditionally, so that the output voltages V1 and V2 have no ripple. In addition, it was assumed that no time ranges with Ii = 0 occur. Two different sized loads with R1 = 3 ohms and R2 = 4 ohms are assumed. This results in the output voltages V1 = I1 * R1 = 2 * 3 = 6 V and V2 = I2 * R2 = 2 * 4 = 4 V, as well as the illustrated time profiles of V12, V22, V0 and Vi.

Considering the mesh {mass - D12 - Q - C0 - D22 - mass}, the following mesh equation must be satisfied: V12 (t) = Vi (t) + V0 (t) + V22 (t).

Out 28f shows that it is fulfilled at all times, and therefore also for the dashed chronological mean values (marked with a hyphen).

Advantageously, the AC or AC voltage source is formed by the secondary winding of a transformer, as this is a particularly simple way to produce a potential-free source.

The 28g shows the schematic diagram of a circuit arrangement for Symmetrierang the two load currents I1 and I2 by the self-adjusting DC voltage V0 'across the capacitor C0 in the supply voltage path at a reverse blocking rectifier GR1 and a forward blocking rectifier GR2 with a simple voltage output (circuit type VD) in parallel. The capacitor C0 suppresses a DC component in the supply current Ii. Since Vi is a pure AC voltage source, the sum of the voltage across the AC voltage source Vi and the voltage across the capacitor C0 may include a DC component. This proportion corresponds to the actual voltage difference of the two rectifiers GR1 and GR2. Since one rectifier blocks forward and the other rectifier blocks backwards, each rectifier is supplied with one half-wave of the alternating current Ii. Due to the DC component of the voltages Vi + V0 also a different power in the two operating lines is allowed, so that the current in both strands can be the same size. Would z. B. the current I11 in the first operating line on average be greater than the current I21 in the second line of operation, the capacitor C0 would discharge and the voltage V0 fall, so that the voltage V1 decrease and at the same time the voltage V2 would increase in amount, which counteracts the different current flow and thus symmetrizes the current levels.

28k shows the schematic diagram of a circuit arrangement for balancing the two load currents I1 and I2 by the self-adjusting DC voltage V0 across the capacitor C0, which is connected between the voltage source and the reference potential, in a backward and a forward-blocking rectifier with a simple voltage output (circuit type VD) in parallel. The operation of this circuit arrangement is equal to the operation of the circuit arrangement according to the 28g , Here, only the capacitor C0 is inserted at another position in the current path, but this does not affect the operation.

The 28h shows the phase diagram of 28k for the case Ii> 0, the 28i shows the phase diagram of 28k for the case Ii = 0, and the 28j the phase diagram of the 28k for the case Ii <0. The respective blocking diodes are characterized by a line break, the respective conductive diodes are shown properly. In the case of Ii = 0, the voltage source is characterized by a further line break.

• a) mehrere Transformatoren, die primärseitig in Reihe geschaltet sind, die insbesondere bei stark unterschiedlichen Lasten bzw. Leuchtdioden möglichst ideale Eigenschaften aufweisen,
• b) einen Transformator mit mehreren Sekundärwicklungen, und insbesondere bei stark unterschiedlichen Lasten bzw. Leuchtdioden zusätzliche stromkompensierte Drosseln, die die Sekundärströme untereinander symmetrieren,
• c) eine Kombination aus den Punkten a) und b).

If more than two LED outputs are required, it is advantageously used

• a) a plurality of transformers, which are connected in series on the primary side, which have the most ideal properties, in particular in the case of very different loads or light-emitting diodes,
• b) a transformer having a plurality of secondary windings, and in particular for very different loads or light-emitting diodes additional current-compensated reactors, which balance the secondary currents with each other,
• c) a combination of points a) and b).

The primary side of the transformer is controlled by one of the usual power electronic circuits, such as a half-bridge, full bridge, push-pull or Class E converter. Advantageously, this is a switch-relieved circuit that uses the ZVS or ZCS principle.

An integration of several inductive components (transformers, current-compensated chokes or a combination of such components) in a component appears particularly advantageous due to the possible reduction of the size of the device as well as in the complexity of manufacturing, testing and procurement. In particular, in the circuit type CD, the required inductances (eg L1, L2 in ) are also integrated (eg with the required transformer). An integration of the balancing capacitors (eg C0) with magnetic components in an optionally monolithically integrated component z. For example, in LTCC technology is possible and could, depending on the application and requirements for the product (eg Automotive application) allow further volume and cost reduction.

The rectifier switch can be designed as a synchronous rectifier, in particular, the already existing in the circuit transformers for driving the semiconductor switches of the synchronous rectifier can be used.

The 29a . 29b . 29c and 29d and the 30a . 30b . 30c and 30d show a circuit structure in which in all cases a ZVS-powered half-bridge supplies a plurality of light-emitting diodes or light-emitting diode strands with the same current. Depending on the design, the capacitor Cr2 may be present. In the 29a . 29b . 29c and 29d According to the above list under point a) several transformers are used, whereas the 30a . 30b . 30c and 30d each indicates a circuit according to point b). The circuits after the 29a . 30a are based on the circuit type VVD (analogous to 28a ), whereas the circuits according to 29b . 30b on the circuit type CD (similar to 28b ). The 29c and 30c show circuits that are analogous to the circuit type VD 28k whereas the 29d a hybrid form in which each. Group of two connected to a secondary winding of a transformer Tr1 ... Tr3 rectifier operates according to one of the types of circuit described above, the group of transformer TR1 according to the circuit type CD, the group of transformer TR2 to the circuit type VVD, and the group of transformer TR3 after the circuit type VD. In the 30d the situation is analogous to 29d , only a common transformer with a primary winding and three secondary windings is used, in which the group at the first secondary winding (counted from above) on the circuit type CD, the group on the second secondary winding according to the circuit type VVD, and the group on the third secondary winding works according to the circuit type VD.

In all figures, light-emitting diodes or light-emitting diode strings were shown as the load of the rectifier GR, which lie with the cathode at GND. This need not necessarily be the case - it can also be the anode with appropriate circuit adaptation to GND. This could be particularly advantageous if the housing of the LEDs used are each connected to the anode of the LED chip, since then all the LED housing can be placed on a common electrically connected to ground heat sink, resulting in a particularly good cooling LED leads.

31 shows a circuit arrangement in which a transformer with two secondary windings, according to the point b) in the above list, is used to operate 4 LED outputs. By means of the current-compensated choke Tr12, the balancing of the two secondary currents is ensured. For dimming the LEDs, the electronic switches S11 to S41 are driven with a PWM signal. Table 1 below shows the ratios at 0% or 100% duty cycle of the switches.

The signal source Q was a function generator with f = 50 kHz. The resistors R1 to R4 are for current measurement, but not required for the actual function. The following components were used:
Tr1: Transformer 1: 1: 1, Lp = Ls1 = Ls2 = 1mH, fres = 750kHz, RDC <1R0
Tr12: EPCOS B82721-K2701-N20 current-compensated choke, 2 × 10 mH, 2 × 0R60 typ. RDC
All diodes: SS34 (3 A, 40 V, Schottky)
White LEDs
all capacitors: 10uF, 25V, X7R, TDK
R1 ... R4: 10R, 1%, 0805

32 shows the "front" part of the circuit 31 , but now as a generator, a class E-converter is used. This has the advantage to get along with a single power transistor Q1 and also this is operated with ZVS (zero voltage switching). Contrary to the usual disadvantage of the class E converter to require a very high switch tip voltage with other circuit topologies, this disadvantage is somewhat mitigated here, since the rectifier or the LEDs due to their cause a flattening of the drain oscillation, so that a transistor with a lower maximum allowable drain voltage can be used, 5 as one would expect for a comparable resistive load.

The measured values shown in Table 1 could also be measured analogously with this source. The following components were used:
Q1: IRFR110
DQ: not populated (optional, if a MOSFET is used as Q1, because then the body diode function is taken over when not equipped, mandatory if Q1 is a bipolar transistor or IGBT)
RG: 10R, 1%, 0805
CR: 1 nF, 100V
CS: 10uF, 25V, X7R, TDK

The following figures consider a third variant of the 20 current balancing.

In this embodiment as well, a quasi-parallel operation of a plurality of light-emitting diodes and / or a plurality of LED strings is proposed by means of a DC / DC converter, wherein the current intensities of the current flowing through the light-emitting diodes are approximately identical. It only has to be regulated to the current in a light emitting diode or in a string of light emitting diodes. The converter has a power distribution network which one or more common mode chokes in a basic interconnection according to 1 contains. In order to guarantee the desired functioning of the power distribution network, it is proposed to expand the Stromverteilnetzwerk with capacitors, so that resonant cells result from current-compensated chokes and capacitors, as shown in the 34 to 36 is shown. The additional capacitors prevent a DC flow through the current-compensated chokes, so that the current-compensated chokes are only traversed by alternating current which allows at least in each zero crossing of the current complete demagnetization of the chokes, which is crucial for their operation.

If the currents through all windings of the current-compensated reactors periodically return to zero, this results in the desired good balancing of the light-emitting diode currents, since then the current-compensated reactors in the current distribution network act in the desired manner. The operation of current-compensated chokes is based on the fact that each winding of the choke has a very high impedance. By corresponding current flows in both windings, the generated magnetic fluxes in the core and thus the high impedances cancel each other out. For a good function of a current-compensated inductor high inductance values of the windings are therefore required, which is why usually cores made of high-permeability magnetic material without air gap are used, which cause relatively low saturation currents. In order to avoid saturation of the magnetic core of the current-compensated choke due to a permanent direct current therefore a periodic current freedom of the two windings is realized according to the invention.

The current balancing by means of current-compensated reactors described so far is particularly applicable if a periodic current flow is present or is generated, which - as already mentioned - always returns to zero. With very many switched electronic power circuits, such power flows can be generated. Thus, the AC power source shown in the previous figures can be realized by any inverter. This is followed by rectifiers to provide the LEDs with a DC with the lowest possible ripple.

33 shows such a principal converter arrangement with current-compensated inductor Lcm as a power distribution network which can be regarded as a DC-DC converter. There are a wide variety of types of DC-DC converters, based on high- and / or low-setting converter concepts known that can be modified with Stromverteilnetzwerken for the operation of light emitting diodes.

According to the invention, converter structures are used which do not have a DC current path through the current-compensated choke, ie the arithmetic mean values of the currents Icm1 and Icm2 in FIG 1 are zero due to circuit engineering measures. In particular, at least two capacitors are used in each case in series with one of the three terminals of the current-compensated choke as DC-blocking components. That is, the implementation of the invention has one of in 34 shown possibilities A) to C) as part of the converter.

In the 34 Resonance cells shown contain at least 2 capacitors, can be part of the AC or rectifier and can perform next to the DC-blocking function more functions in the associated AC or rectifier. In a half-bridge inverter, the capacitor may have the role of the resonance capacitor. In rectifiers of the type of unbalanced doubler or cascade circuits, this capacitor is the input capacitor or the first capacitor of the thrust column.

The union of possibilities A) to C) from the 34 is in one 35 , wherein the current-compensated choke is represented by the equivalent circuit of two fixedly coupled (with a coupling factor of one) inductors Lt1 and Lt2 and the two leakage inductances Ls1 and Ls2. As already explained above, one of the two capacitors C1 to C3 can be dispensed with, without the inherent direct current freedom being influenced by the two windings of the current-compensated choke. This DC freedom is not affected by other, freely insertable in the circuit capacitors. That's how it shows 35 still optional capacitors Cr (dashed), which are shown as an example connected to ground. These capacitors are advantageously resonance capacitors, which act together with the leakage inductances Ls1 and Ls2 and can be used, for example, for the switching discharge within the converter.

Further modifications of the resonant cells (also referred to as "building blocks") are permitted, as long as the DC freedom is not impaired. Therefore, in addition to additional capacitors, any components in series with the windings of the current-compensated choke and the capacitors can be switched. In particular, the series connection of the windings of one or more further current-compensated chokes makes sense, if the converter should have more than two outputs. The 36 shows a case relevant to the practice of a very general building block.

The 37 shows the circuit according to the 2 which also contains the resonant cell structure. This was drawn for illustration and labeled CCC1. After the circuits according to the 3 and 5 based on the same circuit principle, these also contain the corresponding configuration.

Other examples of transducers containing such a configuration are in addition to those in FIG 8d specified half-bridge converter and the in 8th specified Class E converter.

The 38 shows a ZVS half-bridge converter that uses the leakage inductances of the current-compensated reactors as resonance inductance.

The following figures consider a further variant of the current balancing of several light-emitting diode strands with multiresonant cell transducers.

The 39a . 39b and 39c show the basic circuits of a buck converter or buck converter ( 39a ), a boost converter or boost converter ( 39b ) and a Cúk converter ( 39c ). The latter, unlike the first two transducers, can produce output voltages whose magnitude can be smaller or larger than its instantaneous input voltage. All three topologies belong to the group of single-switch DC-DC converters. Shown is their respective hard-switching variant, the inverter switches are controlled by known pulse width modulation method. Not shown in each case are the details for controlling the inverter switch Q1 or S1 and the controller structure, which returns certain output variables for controlling the inverter. The current measuring resistor RS is indicated.

Also indicated by dashed lines are those positions (C1, Lcm1, C11) at which the (at least) three resonant elements must be added to modify the above hard-switching fundamental tuplances into their double ZVS multiresonant equivalents. Equivalent because a multi-resonant buck converter can only deep-set, a multiresonant boost converter can only raise and a multi-resonant Cúk converter just can do both. Such circuits are particularly useful when unavoidable stray inductances are present and at the same time high efficiency, high density and good electromagnetic compatibility are required: The stray inductances form the inductive part of a resonant circuit, which is tuned to the operating frequency.

Each current-compensated choke also has an uncompensated Streuanteil, based on this fact, the invention. To the circuit arrangement according to the 39c for further development of light-emitting diode strands, the current-compensated choke is to be inserted where the ck converter, as a prerequisite for the zero-voltage switching, requires an inductance, ie, for example. B. at the location of the inductance Lcm1.

According to the invention, the stray inductances of the at least one current-compensated choke are used to generate resonant circuits which allow the circuit breakers within the converter circuits to be switched-relieved.

It is proposed a quasi-parallel operation of a plurality of light-emitting diodes and / or a plurality of light-emitting diode strands by means of a converter having only one inverter, and wherein all the light-emitting diodes are traversed by the same current. It only has to be regulated to the current in a light emitting diode or in a string of light emitting diodes.

The above-mentioned common inverter consists in principle of only one electronic circuit breaker and at least one storage inductor. The power switch may include an uncontrolled anti-parallel diode (inverse diode), and is driven by a special frequency variable and state dependent PWM. The above-mentioned current-compensated choke is expressly not to be regarded as a storage inductance. Thus, all six known single-switch DC-DC converters come into consideration as basic converter topologies, the Buck, the Boost, the Drosselinvers, the Cúk, the Zeta and the SEPIC converter.

The inventively more rectifier contain as many diodes as light-emitting diode strands are provided. So with N light-emitting diode strings exactly N rectifier diodes can be found. The number of memory inductances mentioned above is also exactly N in buck, boost or throttle inverse topology, in Cúk, SEPIC or zeta topology N + 1. Their inductance values are approximately the same in the considered multi-output converter. In contrast to some special single-switch DC-DC converters, such as those with input or output Ripplestromkompensation, none of these memory inductances must be coupled to one of the other storage inductances in the presented here inherently current-symmetric multi-output converters.

In contrast to the above embodiments, all the transducers presented here work in all their branches in "Double ZVS Multiresonant Conduction Mode". An advantage of this mode of operation is the resonant switching relief of all switching edges of all participating rectifier diodes and the switch-on of the inverter switch. Furthermore, in the case of the three current output converters (see, Cúk and Zeta) for feeding light-emitting diodes, the otherwise customary output filter capacitor can be omitted, which in particular facilitates the controllability of a possible higher-level lighting system.

The resonance cells explained above also play a key role here. At N provided inherent current-symmetrizing outputs, the resonant cell comprises in addition to at least one current-compensated inductor at least N capacitors in series with the terminals of the current-compensated inductor.

According to the invention, the current-compensated choke is always inserted where, in the transition of a hard-switching CCM into a multiresonant double ZVS single-switch converter, the additional resonance inductance is connected. The series capacitors to the left or right thereof are either already present in the intended converter topology, or they are also newly added as N resonant capacitors each parallel to one of the N rectifier diodes. Although not directly apparent, the series connection to the current-compensated choke also remains in this configuration. The capacity of these new N "rectifier capacitors" is about the same. Finally, in parallel to the inverter switch yet another resonant capacitor, the so-called Inverter capacitor, switched. The capacitance ratio between this inverter capacitor and the sum of all N rectifier capacitors is an important design criterion for these multiresonant transducers.

With N rectifier diodes within the considered converter topologies for N current-symmetrizing outputs, at least N storage inductances are always present, as already described above. In addition, always correspondingly many block or filter capacitors are used, which can then charge differently to the different output voltages per branch. Since the respective output voltage is reflected in the blocking voltage of the associated rectifier diode, in addition to the freedom to be able to charge independently for each output branch, the "alternating elasticity" by at least N independent Speicherinduktivitäten the second prerequisite for inherent current balancing in the multiresonant single switch -Gleichspannungswandlern. Since, analogously to the rectifier diodes, the voltages per branch can also be different over these memory inductances, these memory inductances, as already mentioned above, must not be coupled with each other nor with any existing input storage inductance.

This results in switch-relieved converters in which both the switch S and the diodes are switched-relieved, preferably both zero-voltage switched.

This leads to a reduction of the losses, in particular the switching losses, significantly lower electromagnetic interference, and because of the smaller necessary EMC filters to a higher overall efficiency of the considered circuit. Due to the greatly reduced switching losses, these converters can be operated with a higher switching frequency, which in turn leads to a reduction of the size of the energy storage, so the chokes and capacitors and thus allows converter with a smaller volume. In contrast to the pulse width modulated converters which form the basis of the output, the multiresonant transducers are not operated with constant, but with variable frequency to regulate the output power, which in turn contributes to the improvement of their EMC.

The 40 shows a multiresonant CUC converter as described above. The circuit was according to the 39c extended by the resonant elements C1, C11 and C21, which are in parallel with the zero-voltage switched switch S and the diodes D10 and D20. The inductors for the resonant circuits, which accomplish the relieved switching, are designed as a current-compensated choke in the form of the two leakage inductances Ls1 and Ls2. Block capacitors C10 and C20 form a resonant cell with Lcm1. The following table shows an example dimensioning as well as the operating data, which corresponds to the current and voltage curves according to correspond: ci 10 μF L1 500 μH S1, D1 IRFR120N (MOSFET and its body diode) C1 50 nF LCM1 Lt1 = Lt2 = 10 mH, Ls1 = Ls2 = 100 uH C10, C20 10 μF D10, D20 Schottky diode SS36 L10, L20 100 μH C11, C12 8 nF C12, C022 10 μF D11 a white LED, type OSRAM Dragon D21 Series connection two white LEDs, type like D11 Operating data of the Cúk converter: vi 18 v f 100 kHz D 50% Io1 -737 mA io2 -743 mA

According to the known since 1988 theory of single-switch DC-DC converters, the external variables and all current and voltage waveforms inside the so-called converter cell (consisting of S1, D1, C1, Lcm1, D10, C11, D20, C21) of a Cúk converter are approximately identical with those of a Drosselelinvers-, SEPIC or zeta converter, when said converter cell is the same size and S1 is equally driven. Therefore, the separate sizing and simulation of these three other topologies (see the 42 . 43 and 48 ) are waived.

This converter theory also makes it possible, with the same dimensioning of said converter cell and approximately the same time courses, to calculate the external variables of a purely deep-set converter or a purely high-setting converter in this converter cell. The following table shows the corresponding results for the so-called "cell-like" buck and boost converters. The output voltages of the buck converter correspond to those of the Cúk converter, but at higher LED currents and higher input voltage. In the multiresonant step-up converter, the input voltage and the average LED currents are the same as those of the Cúk converter, however, such a step-up converter generates an average of 24 V at its outputs. Operating data Buck multiresonant vi 24V f 100 kHz D 50% Io1 0.98 A io2 0.94 A Operating data boost multiresonant vi 18 v f 100 kHz D 50% Vo average. 24V Io middle. 740 mA

42 shows a multiresonant SEPIC converter with two inherently symmetrizing outputs. The corresponding multiresonant zeta converter shows the 43 , For this purpose, to all switches (ie transistors and diodes) corresponding capacitances to be connected in parallel, so that, together with the stray inductances of the current-compensated choke results in the resonant cell with the corresponding resonant circuits for the switching discharge.

The 44 shows a class E converter with hard-switching rectifier diodes at the output. These were also accomplished by adding appropriate parallel capacitances to a corresponding multi-resonant Class E converter according to the 45 transferred.

Striking is the similarity of this 45 to 40 : The only visible difference is the polarity of the rectifier diodes. In contrast to the Cúk converter, the inverter capacitor C1 and a resonant matching network in front of the rectifier, which is exactly out of resonance here, have always been fixed circuit components in the Class E converter, which means that rectification is achieved from an approximately ideal sinusoidal current, which is natural can happen in both polarities. Is not visible that in the class E converter, the capacitors C10 and C20 have much smaller capacities than in the Cúk converter, since they are supposed to act as resonance elements in the former, in the latter "only" as blocking capacitors.

46 shows the multiresonant, inherently current-symmetrizing buck converter or buck converter, 47 the corresponding boost converter or boost converter, 48 finally, the corresponding throttle invers converter.

49 shows a multi-resonant Cúk converter with 4 inherently current-balanced outputs in tree circuit of the three current-compensated chokes. As shown, the current load is balanced between Lcm1 ... Lcm3 on average, but in any case the two middle output branches "see" more series inductance than the two outer ones. This can be remedied by shorting points C and D and points E and F, respectively, and omitting the two connections between G and C and between H and F. However, it should be noted that Lcm1 is confronted with twice the current load compared to the two downstream current-compensated chokes Lcm2 and Lcm3. In 50 is a multiresonant Cúk transducer with three outputs and symmetrical ring circuit of the three current - compensated chokes, in 51 Finally, a multi-resonant Cúk converter with two outputs and three current-compensated chokes, which are connected so that the currents between output 1 and 2 in the ratio 3: 5 split. It should be noted here that the current loads of the three current-compensated chokes Lcm1, Lcm2 and Lcm3 are set in the ratio 4: 2: 1. The ratio between the capacitances of C11 and C21 must also be 3: 5, that between the capacitances of the blocking capacitors C10 and C20 can be 3: 5, that between the filter inductances L10 and L20 can conversely be 5: 3. Without substantiating this with other figures, it is nevertheless true that such more complex balancing circuits can also be combined with one another, and that they are equally applicable to the other topologies of the 42 to 48 are transferable.

In 52 is the insulating variant of the Drosselelinverswandlers shown, the multi-resonant inherent current-symmetric flyback converter. The 53a and 53b show corresponding Cúk converters that 54a and 54b isolating multiresonant zeta converters and 55 finally the corresponding form of the SEPIC converter, shown with 2 outputs each. It goes without saying that in these topologies each consciously asymmetric outputs and / or more than 2 outputs according to the 49 to 51 possible are. The forward converter, which is often regarded as an isolating step-down converter, deliberately transitory, because it is more of a kind of "quarter bridge" due to its additional diodes, can not isolate the low- and high-boost converter in their basic form. In the other four topologies, the leakage inductances of insulation transformers and current-compensated reactors add up in their effect as resonance inductance. As a result, a fundamental problem of these multi-resonance converters, namely that the "naturally" resulting stray inductances are often too small, is mitigated. For large required mean voltage ratio, the turns ratio in the isolation transformer may differ from 1: 1.

Due to its topological symmetry, the Cúk converter increases 53a and 53b It can only be isolated by splitting its blocking capacitor C10, C20 into a primary-side C9 and into the secondary-side C'10, C'20 and by inserting a transformer T1 precisely at this newly formed node. Therefore, only in Cúk converter in its insulating form, the two components C9 and T1 newly added. However, only T1 is subject to pure AC. Theoretically SEPIC & Zeta could be isolated as well. With the SEPIC, however, a circle of transformer secondary winding, block C and storage coil would then emerge. In terms of their effect, such a circuit "degenerates" into a 2-coil storage coil and into a recombined block-C on the primary side. In the Zeta this happens analogously, only reversed on the primary and secondary side. Therefore, in the 54 and 55 only these simplified topologies are shown, and the isolation transformers carry the names of the storage coils of the source topologies from which they originated.

In principle, there are three options for each of the four topologies to isolate, each viewed from the input: If the current-compensated choke is the first, an independent isolation transformer is required per output; the flyback and SEPIC converters according to the 52 and 55 are shown like this. If the current-compensated choke is shown only after the isolation line, as shown, for example, by the Cúk and the Zeta, a common isolation transformer with a common secondary potential with a secondary winding in accordance with the 53a and 54a , with complete isolation, each with one independent secondary winding per output according to 53b and 54b ,

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• EP 1788850 B1 [0004]
• US 7408308 B2 [0005]
• EP 1286572 A2 [0006]
• DE 102006040026 [0137]
• WO 2005/038828 A2 [0137]
• EP 0275499 A1 [0168, 0169, 0169]
• DE 3621573 A1 [0168, 0168]
• DE 3621573 [0169, 0169]

Cited non-patent literature

• Baddela, SM; Zinger, DS "Parallel Connected LEDs Operated at High to Improve Current Sharing", Conference Record of the IEEE Industry Applications Conference, 39th IAS Annual Meeting, 2004, 3-7 Oct. 2004, pp. 1677-1681, Vol. 3 [0003]

Claims (15)

Circuit arrangement for operating at least two semiconductor light sources (D11, D21), comprising: - an electric energy converter, with At least one switch (Q1), - A Wandlerinduktivität and At least two operating trains, each of which has a rectifier (D1 / C1, D2 / C2) each having an input terminal, an output terminal and a reference potential, - At least one current-compensated inductor Lcm1, wherein the current compensated inductor (Lcm1) is connected between the switch (S1) and the rectifiers (D1 / C1, D2 / C2) and the stray inductance of the current compensated inductor (Lcm1) is used as the transducer inductance, and wherein the semiconductor light sources (D11, D21) respectively between the rectifier (D1 / C1, D2 / C2) and its reference potential are switched. Circuit arrangement according to claim 1, characterized in that it has an additional diode per operating line, which does not belong to the respective underlying converter topology. Circuit arrangement according to claim 1 or 2, characterized in that the electrical energy converter is a down converter Circuit arrangement according to claim 3, characterized in that the leakage inductance of the at least one current-compensated choke (Lcm1) is used as Wandlerausgangsinduktivität the down converter Circuit arrangement according to one of claims 1 to 4, characterized in that it comprises a plurality of current-compensated chokes (Lcm1 ... Lcm5) and a plurality of rectifiers (Re1 ... Re5), wherein the current-compensated chokes (Lcm1 ... Lcm5) a first and a second input and a first and a second output, and wherein the first inputs are connected to each other, and the first outputs are each connected to an associated rectifier, and wherein the second output of a current-compensated inductor (Lcm1 ... Lcm5) each with is connected to the second input of the subsequent common-mode choke (Lcm1 ... Lcm5) and the second output of the last common-mode choke (Lcm5) is connected to the second input of the first common-mode choke Lcm1). Circuit arrangement according to claim 5, characterized in that a current measuring circuit (Rsh, Tr) is connected between the second output of the last current-compensated choke (Lcm5) and the second input of the first current-compensated choke (Lcm1). Circuit arrangement according to claim 1 or 2, characterized in that the electrical energy converter is a uc-converter, and the leakage inductance of the at least one current-compensated inductor (Lcm) is used as a converter output inductance. Circuit arrangement according to claim 1 or 2, characterized in that the electrical energy converter is a Sepic converter, and the leakage inductance of the at least one current-compensated inductor (Lcm) is used as a converter inductance in the converter circuit. Circuit arrangement according to claim 1 or 2, characterized in that the electrical energy converter is a zeta converter, and the leakage inductance of the at least one current-compensated inductor (Lcm) is used as a converter output inductance. Circuit arrangement according to claim 1, characterized in that the electrical energy converter is a half-bridge converter, and the leakage inductance of the at least one current-compensated choke (Lcm) is used as resonance inductance of the half-bridge converter. Circuit arrangement according to one of the preceding claims 1 to 9, characterized in that the electrical energy converter is operated such that the currents through the current-compensated chokes (Lcm1 ... Lcm5) periodically go back to zero. Circuit arrangement according to one of the preceding claims 1 to 11, characterized in that the semiconductor light sources (D11, D21) are organic or non-organic light-emitting diodes. Circuit arrangement according to one of the preceding claims 1 to 12, characterized in that the electrical energy converter has a transformer (Tr), which is connected between the at least one current-compensated choke and the at least one switch. Circuit arrangement according to one of the preceding claims 1 to 13, characterized in that the current-compensated choke has a turns ratio of 1: 1. Circuit arrangement according to one of the preceding claims 1 to 13, characterized in that the current-compensated choke has a turns ratio of unequal 1: 1.

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