CN1465009A - Non-volatile cache integrated with mass storage device - Google Patents
Non-volatile cache integrated with mass storage device Download PDFInfo
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- CN1465009A CN1465009A CN01814277A CN01814277A CN1465009A CN 1465009 A CN1465009 A CN 1465009A CN 01814277 A CN01814277 A CN 01814277A CN 01814277 A CN01814277 A CN 01814277A CN 1465009 A CN1465009 A CN 1465009A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/21—Employing a record carrier using a specific recording technology
- G06F2212/214—Solid state disk
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/31—Providing disk cache in a specific location of a storage system
- G06F2212/313—In storage device
Abstract
Apparatus and methods relating to a non-volatile mass storage device including a non-volatile cache.
Description
Invention field
Embodiments of the invention relate to data-carrier store.More particularly, embodiments of the invention relate to the have non-volatile cache mass storage device of (hereinafter to be referred as Cache).
Background of invention
Computing machine both can also can be stored data in volatile memory in non-volatile mass storage device.The illustration of volatile memory includes but not limited to, dynamic RAM (DRAM), static RAM (SRAM), Rambus dynamic RAM (RDRAM) etc.The illustration of non-volatile mass storage device includes but not limited to, hard disk drive, 3.5 inches disks, 5.25 inches floppy disks, ZIP
@Dish (for example, by Roy, the iomega corp of Utah makes), Jaz
@Dish (for example, make by iomega corp), LS-120 Superdisk (super disk) (for example, by Oakdale, the Imation company of Minnesota makes), rewritable digital universal disc (DVD-RAM), disk read/write (CD-RW), high capacity magnetic memory apparatus, high capacity light storage device, high capacity magneto optical storage devices, holographic memory device etc.The illustration that is stored in the data in the computing machine nonvolatile memory comprises computer instruction (for example, operating system, one or more application programs etc.) and the data of being visited by computer instruction.
When the volatile memory power down, the data that are stored in the volatile memory can be lost usually.(for example, owing to reasons such as power failures, when computer power supply is disconnected) can not lose the data that are stored in wherein usually such as non-volatile mass storage device such as hard disk drives when the non-volatile mass storage device power down.Yet, compare with volatile memory, the access time of nonvolatile memory recovery and storage data is obviously long usually.The every storage cell of nonvolatile memory (for example every megabyte, every GB etc.) is usually also than cheap such as some volatile memory such as DRAM, SRAM, RDRAM.
Except volatile memory and nonvolatile memory, computing machine generally includes can be according to the processor of instruction and data executable operations.Because the memory access time of volatile memory is far smaller than non-volatile mass storage device usually faster, so will can be copied to volatile memory (for example, DRAM primary memory, SRAM Cache etc.) faster from slower non-volatile mass storage device (for example hard disk drive etc.) by the instruction and data that processor is operated.When reducing memory access time, can improve processor performance and computing power.
Because the memory access time of non-volatile mass storage device (for example disc driver) usually than volatile memory (for example, DRAM primary memory, SRAM Cache etc.) memory access time long, so non-volatile mass storage device often is a performance bottleneck.Known disc driver (for example comprises the volatile cache device, DRAM Cache, SRAM Cache), but these volatile cache devices are the part in the main memory address space of the microcontroller of disc driver normally, so it is byte addressing.In view of foregoing, can recognize that existence can improve the primary demand of the method and apparatus of computer system performance.
Summary of drawings
Fig. 1 shows the diagram according to the computer system of the embodiment of the invention.
Fig. 2 shows the tissue diagram according to the non-volatile cache device of the embodiment of the invention.
Fig. 3 shows the method according to the embodiment of the invention.
Fig. 4 shows the method according to the embodiment of the invention.
Describe in detail
According to embodiments of the invention, non-volatile mass storage device comprises the non-volatile cache device.The non-volatile cache device can be stored the high capacity primary storage medium that are written into non-volatile mass storage device maybe can be from the information that wherein reads.Aspect data read, to compare with access time from the high capacity primary storage medium reading of data of non-volatile mass storage device, the access time of non-volatile cache device is less.When reading the data that are stored in the non-volatile mass storage device from the non-volatile cache device rather than from the high capacity primary storage medium of non-volatile mass storage device, the computer system that combines the embodiment of the invention can improve system performance.
Fig. 1 shows the diagram according to the computer system (" computing machine ") of the embodiment of the invention.Computing machine 110 can comprise processor 120, and this processor is coupled to storer 130, and term " coupling " comprises direct connection, connection indirectly, direct communication, indirect communication etc.Processor 120 can be the Pentium that the Intel Company of for example California Santa Clara makes
@III processor, special IC (ASIC), microcontroller etc.Storer 130 comprises the device such as storing digital information such as DRAM, RDRAM, SRAM, ROM (read-only memory) (ROM), short-access storages.In another embodiment, system bus can provide communication path between processor 120 and system unit.System bus can be the peripheral component interconnect (pci) bus, EISA bus (EISA) etc.
In one embodiment, chipset can be coupled to processor 120 and other such as storer 130, mass storage device 140, is connected in the system unit of peripheral components on the expansion bus etc. and manages interaction between them.The term chipset comprises the group of being made up of one or more integrated circuit (IC) chip, serves as hub (or core) and transmit data between processor and other system unit.The illustration of chipset comprises 820 and the 810E chipset that Intel Company makes.Chipset can be the single integrated circuit chip or can comprise two or more integrated circuit (IC) chip.Chipset can comprise memory controlling hub.In comprising the embodiment of pci bus, memory controlling hub can be carried out the function that is called as " north bridge function ".Chipset can comprise the i/o controller hub.In comprising the embodiment of pci bus, the i/o controller hub can be carried out the function that is called as " south bridge function ".
The illustration of mass storage device 140 comprises hard disk drive, ZIP
@Driver, Jaz
@Driver, CD-RW driver, DVD-RAM driver, LS-120 Superdisk driver, magnetic memory apparatus, light storage device, magneto optical storage devices, holographic memory device etc.The illustration of hard disk drive is the Cheetah 18XL hard disk drive that the Seagate technology company of California Scotts Valley makes.
In one embodiment, mass storage device 140 is hard disk drives, and high capacity primary storage medium 148 comprise one or more disc.Every disc can have one or more recordable disc faces, and each recordable disc face can carry out read/write by a special read/write head.Each card can be divided into a plurality of line marks; And each line mark can be divided into a plurality of physical sectors.When hard disk drive had a plurality of recordable disc face, the set that is positioned at all line marks at same radius place on all recordable disc faces was called cylinder.The position of each physical sector of hard disk drive can be specified by the physical address of specifying cylinder, magnetic head (card) and physical sector.
In another embodiment, when processor during from the hard disk drive request msg, this asks the physical address of specific data not and the logical address of specific data.The logical address of hard disc data can comprise logical sector address, LBA (Logical Block Addressing) etc.When hard disk drive is formatted, the hdd controller of hard disk drive all physics set of sectors can be compiled for logic sector (for example, distribute a logical sector address etc. for each physical sector), and mapping algorithm can be mapped as each logical sector address a specific physical address.When the read sent to hard disk drive was specified logical sector address, this hard disk drive can be considered to (can sector addressing) towards the sector.Hdd controller also can be mapped as specific LBA (Logical Block Addressing) with the physical sector set.When the read sent to hard disk drive was specified a LBA (Logical Block Addressing), that this hard disk drive can be considered to was block-oriented (can piece addressing).
The non-volatile cache device 149 cacheable data that are stored in usually in the high capacity primary storage medium 148.Non-volatile cache device 149 is cacheable to be read from high capacity primary storage medium 148 and to its data that write.Compare with the access time of high capacity primary storage medium 148, non-volatile cache device 149 can have the access time faster.Therefore, and compare, from mass storage device 140 reading of data with write data and can finish quickly from high capacity primary storage medium 148 read/write data.In one embodiment, compare, to the data read/write needs electric weight still less of non-volatile cache device 149 with data read/write.Can realize writing back algorithm (that is, writing back to high capacity primary storage medium 148) to improve cache performance from non-volatile cache device 149.In another embodiment, realize write through cache.
Non-volatile cache device 149 can be for example short-access storage, battery backup DRAM, battery backup SRAM, atomic force probe storer, magnetic RAM, ferroelectric RAM, holographic memory, memory array etc.In one embodiment, reading from non-volatile cache device 149 can be that destructiveness reads.Non-volatile cache device 149 can be block-oriented Cache, wherein data accessed in logical block (for example write, read etc.).For example, when mass storage device 140 receives request of data (for example, write the request of data of data etc. to mass storage device 140 from the request of data of mass storage device 140 reading of data on communication path 135, from communication path 135), request of data can be included as the address of LBA (Logical Block Addressing), logical sector address etc.In one embodiment of the invention, each data that are stored in the non-volatile cache device 149 enters the mouth all corresponding to the data in the logical address that is stored in high capacity primary storage medium 148.
In one embodiment, wherein mass storage device 140 is hard disk drives, because do not need preheating time from non-volatile cache device 149 read/write data, this preheating time be follow from hard disc driver disc Writing/Reading data take place (for example, the rotation disc is until operating rate, place W head etc.), so non-volatile cache device 149 can improve system performance.For example, hard disc driver disc when reading log-on message (for example, operating system data, device driver, application data etc.) from non-volatile cache device 149, can reduce the required time of computing machine 110 start-up systems relatively.Also can reduce the stand-by period of the keystroke that the user experienced of computing machine 110/click the mouse.
In one embodiment, the Cache supervisory instruction can be managed from the data of non-volatile cache device 149 read/writes.The Cache supervisory instruction can be stored in the storer 143, can be part of mass storage device driver etc.The Cache supervisory instruction can determine that what data can be by high-speed cache, and what data can be evicted from Cache, and what data can be written back to high capacity primary storage medium, when takes place that data write back etc.The Cache supervisory instruction can determine that also what data can be pre-fetched in the non-volatile cache device 149.Can use known Cache management algorithm to make the decision of high-speed cache management, for example whether some data should be cached in the non-volatile cache device 149.For example, when the Cache management algorithm determines that the data that read from high capacity device 140 are little (for example in the possibility of being read again in the recent period, data are the part of MP3 audio file, the part of wav file, the part of avi file, the part of stream data file etc.), these data do not need by high-speed cache so.In addition, when from non-volatile cache device 149 when high capacity primary storage medium 148 write datas are favourable, the Cache supervisory instruction can be utilized such as least recently used (LRU) algorithm, what data is alternate algorithm etc. determine to write back at random.
In one embodiment, the mass storage device driver of mass storage device 140 can be typical mass storage device driver (for example, and the Cache supervisory instruction can be stored in the storer 143 ATAPI.SYS in the WIN98 environment etc.).In such an embodiment, the existence of non-volatile cache device can be transparent for operating system.In another embodiment, the Cache supervisory instruction can be the part of the Cache management logic parts of mass storage device controller 141.
Can handle by high capacity primary storage medium ECC logical block 145 from the data that high capacity primary storage medium 148 read, and can handle by non-volatile cache device ECC logical block 146 from the data that non-volatile cache device 149 reads.Each high capacity primary storage medium ECC logical block 145 and non-volatile cache device ECC logical block 146 can detect mistake and correct these mistakes when data are sent to communication path 135 at bit or many bit-level.
Fig. 2 shows according to one embodiment of present invention, the tissue of non-volatile cache device diagram.Non-volatile cache device 200 (for example, the non-volatile cache device 149 of Fig. 1) can be stored a plurality of high-speed cache inlets 205.Each high-speed cache inlet 205 can comprise table entry territory 210 and data inlet 220.Data inlet 220 can comprise active domain 222, revise territory 224, address field 226, data field 228 and ECC territory 229.
The table entry territory 210 of high-speed cache inlet 205 can be corresponding to the enter the mouth mark/index information of each data inlet 220 of 205 of high-speed cache.A plurality of table entries territory 210 can comprise cache directory table 215, and addressable cache directory is to determine whether one group of specific data appear in the non-volatile cache device in the mass storage device (for example, the logical block of the disk sector of hard disk drive, hard disk drive etc.).In one embodiment, but the address (for example, logical sector address, LBA (Logical Block Addressing) etc.) of the data inlet 220 of the table entry territory 210 storage caches inlet 205 of high-speed cache inlet 205.In order to determine whether one group of specific data appear in the non-volatile cache device in the mass storage device, for example available known searching algorithm search cache directory table 215.Perhaps, available hashing algorithm sorts cache directory.At mass storage device is among the embodiment of hard disk drive, and the existence of the disk sector of asking can be by comparing the sevtor address of request disk and the sevtor address that is stored in the cache directory table 215 to determine in the non-volatile cache device.In one embodiment, the non-volatile cache device can be the total correlation Cache.In another embodiment, the non-volatile cache device can be one group of associated cache.
In one embodiment, be stored in each high-speed cache inlet 205 logical blocks in the non-volatile cache device of mass storage device corresponding to mass storage device.In another embodiment, be stored in each high-speed cache inlet 205 sectors (for example, physical sector, logic sector) in the non-volatile cache device of mass storage device corresponding to mass storage device.
In one embodiment, 2000000 high-speed cache inlets 205 are arranged in the non-volatile cache device, 2000000 table entries are arranged in cache directory table 215.In this embodiment, each table entry length of cache directory table 215 can be that nybble is long, and cache directory table 215 can use eight megabyte of nonvolatile memory.By comprising the disk sector more than in each high-speed cache inlet, can reduce the size (and then improving average high-speed cache access speed) of cache directory table 215.
In one embodiment, the data inlet 220 of high-speed cache inlet 205 can have active domain 222, revise territory 224, address field 226, data field 228 and ECC territory 229.When high-speed cache inlet 205 comprises valid data, active domain 222 (for example can be set to " effectively ", in logical one and the logical zero one etc.), and when high-speed cache inlet 205 does not comprise valid data, active domain 222 can be set to engineering noise (for example, another in logical one or the logical zero etc.).For example, when evicting data from when being cached in the non-volatile cache device to allow other data from the non-volatile cache device, the active domain of being evicted from the data inlet can change engineering noise into to represent these high-speed caches no longer data of storage cache that enter the mouth from " effectively ".If the data in the high-speed cache inlet 205 are different with data of corresponding positions on the high capacity primary storage medium that are stored in mass storage device, then revise territory 224 and can be set to " revising ".For example, and with reference to Fig. 1 and 2, when the data corresponding to the logical address of mass storage device 140 are written back to mass storage device 140 and are stored in the non-volatile cache device 149, and those data have been modified after reading from high capacity primary storage medium 140, and the modification territory 224 of non-volatile cache inlet 205 can be set as " revising " and is different from corresponding to the data that are stored in that logical address on the high capacity primary storage medium 148 corresponding to the data trnascription that is stored in that logical address in the non-volatile cache device 149 with expression so.Modification territory 224 can be called as " dirty bit " and can be eliminated when data are successfully write back high capacity primary storage medium 148 and are retained in non-volatile cache device 149.
But the data of data field 228 storage caches inlet 205.At mass storage device is among the embodiment of hard disk drive, and data field 228 can comprise data disk sector (for example, 512 bytes), logical blocks of data etc.ECC territory 229 can be the data storage error correcting code of high-speed cache inlet 205.In one embodiment, each logical block of data is related with an error correcting code.
Fig. 3 shows the method according to the embodiment of the invention.In one embodiment of the invention, mass storage device receives request of data (for example, the request of from processor 120, from the requests of operating systems of computing machine 110, come the request of the application carried out on the comfortable computing machine 110 etc.) (frame 310).Determine whether institute's request msg is stored in the non-volatile cache device of mass storage device (frame 320).In one embodiment, request of data comprises the address, and this address is used to produce cache hit or cache-miss is represented.In another embodiment, cache directory comprises the address that is cached at the data in the non-volatile cache device, and can be cached in the expression in the non-volatile cache device according to the address generation institute request msg of cache directory and institute's request msg.When institute's request msg is stored in the non-volatile cache device, reading of data from the non-volatile cache device (frame 330), can check and correction (frame 335) the data streams read execution error, and can send these data (frame 340) from mass storage device.When institute's request msg is not stored in the non-volatile cache device, can from the high capacity primary storage medium of mass storage device, read these data (frame 360), can check and correct (frame 365) to the data streams read execution error, can send data (frame 370) from mass storage device, and these data can be write non-volatile cache device (frame 375).
Fig. 4 shows the method according to the embodiment of the invention.Be received in the request (frame 410) of storage data in the non-volatile mass storage device.For example, just can order word processing program to preserve file the user of word processing program inediting file.As another illustration, word processing program can comprise the automatic hold function of regularly preserving file.As another illustration, but the data storage of operating system demanded storage in primary memory (for example DRAM) (for example, so that discharge for other data primary memory space etc.) in hard disk drive or other nonvolatile memory.Can make decision whether with data storage (frame 420) in the non-volatile cache device.When make decision with data storage in the non-volatile cache device, then these data can be stored in (frame 430) in the non-volatile cache device.In one embodiment, the storage data comprise the cache directory table (frame 440) that upgrades the non-volatile cache device in the non-volatile cache device, when making decision not with data storage in the non-volatile cache device time, then these data can be stored in the high capacity primary storage medium of non-volatile mass storage device (frame 450).
According to one embodiment of present invention, the instruction that is fit to be carried out to carry out a method by processor is stored on the computer-readable media.Computer-readable media can be the device of storing digital information.For example, computer-readable media is included in the ROM of storing software known in the art and/or firmware (for example microcode).Computer-readable media can be by the processor access that is fit to carry out the instruction that is fit to be performed.Term " is fit to be performed " expression and is included under its current form (for example machine code) and is ready to be carried out by processor, or needs further operation (for example, edit, decipher or provide access code etc.) so that it is ready to any instruction of being carried out by processor.
According to the method and apparatus of the embodiment of the invention advantageously high-speed cache from the mass storage device of non-volatile cache device, read or to its data that write.Even when the external power source of non-volatile cache device and mass storage device is disconnected, the non-volatile cache device also can keep its data.Embodiments of the invention can reduce the system performance that reads or also therefore improve to its access time that writes data the system with mass storage device from mass storage device.
The embodiment of data storing method and device in the non-volatile cache device of mass storage device has been described.In order to explain, a large amount of specific detail have been enumerated to provide in more than describing to thorough of the present invention.Yet person of skill in the art will appreciate that there are not these specific detail, the present invention also can be put to be carried out.In other illustration, shown construction and device with the block scheme form.And those skilled in the art can recognize easily that the particular order of introduction and manner of execution is illustrative, and can expect that this order can be changed and still be in the spirit and scope of the present invention.
In above detailed description, apparatus and method according to the embodiment of the invention have been described with reference to particular exemplary embodiment.Therefore, this instructions and accompanying drawing will be regarded as illustrative and nonrestrictive.
Claims (19)
1. data storage device, described device comprises non-volatile mass storage device, described non-volatile mass storage device comprises the non-volatile cache device.
2. device as claimed in claim 1 is characterized in that described non-volatile mass storage device is that block-oriented and described non-volatile cache device is block-oriented.
3. device as claimed in claim 1 is characterized in that described non-volatile mass storage device is towards the sector towards the non-volatile cache device sector and described.
4. device as claimed in claim 1 is characterized in that described non-volatile mass storage device is a hard disk drive.
5. device as claimed in claim 1, it is characterized in that described non-volatile mass storage device comprises the high capacity primary storage medium with first non-volatile storage medium, described non-volatile cache device comprises second non-volatile storage medium, and described first non-volatile storage medium is and the dissimilar non-volatile storage medium of described second non-volatile storage medium.
6. device as claimed in claim 5, but it is characterized in that described high capacity primary storage medium comprise having the disc of recording surface with the storage data.
7. device as claimed in claim 5 is characterized in that also comprising:
The first error correction logic parts are to handle the data that read from described high capacity primary storage medium; And
The second error correction logic parts are to handle the data that read from described non-volatile cache device.
8. device as claimed in claim 1 is characterized in that described non-volatile cache device comprises Nonvolatile storage array.
9. computer system, it comprises:
Processor;
Storer with described processor coupling; And
With the non-volatile mass storage device of described processor coupling, described non-volatile mass storage device has:
High capacity primary storage medium, and
Non-volatile cache device with described high capacity primary storage medium coupling.
10. computer system as claimed in claim 9, it is characterized in that described high capacity primary storage medium comprise first non-volatile storage medium, described non-volatile cache device comprises second non-volatile storage medium, and described first non-volatile storage medium is and the dissimilar non-volatile storage medium of described second non-volatile storage medium.
11. computer system as claimed in claim 9 is characterized in that described non-volatile mass storage device is that block-oriented and described non-volatile cache device is block-oriented.
12. computer system as claimed in claim 9 is characterized in that described non-volatile mass storage device is towards the sector towards the non-volatile cache device sector and described.
13. computer system as claimed in claim 9, but it is characterized in that described first non-volatile storage medium is from by writing down magnetic media recording light medium and can writing down the recordable media of selecting the group that magneto-optical media forms.
14. computer system as claimed in claim 9 is characterized in that described second non-volatile storage medium is the medium of selecting from the group that battery-powered dynamic RAM, battery powered static RAM, short-access storage, atom-probe memory, ferroelectric memory and holographic memory are formed.
15. the method for a processes data requests, described method comprises:
Reception is to being stored in the request of first group of data in the non-volatile mass storage device;
Determine that described first group of data storage is in the non-volatile cache device of described non-volatile mass storage device;
Read described first group of data from described non-volatile cache device; And
Send described first group of data.
16. method as claimed in claim 15 is characterized in that:
Reading described first group of data from described non-volatile cache device comprises the subclass of described first group of data is carried out error correction; And
Transmission is read described data from described non-volatile cache device and is comprised the described error correction subclass that sends described first group of data.
17. method as claimed in claim 16 is characterized in that also comprising:
Reception is to being stored in the request of second group of data in the described non-volatile mass storage device;
Determine that described second group of data are not stored in the non-volatile cache device of described non-volatile mass storage device;
Read described second group of data from the high capacity primary storage medium of described non-volatile mass storage device;
Described second group of data are write described non-volatile cache device; And
Send described second group of data.
18. method as claimed in claim 15 is characterized in that the described request to first group of data is block-oriented request.
19. method as claimed in claim 15 is characterized in that described request to first group of data is the request towards the sector.
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|---|---|---|---|
| US60201100A | 2000-06-23 | 2000-06-23 | |
| US09/602,011 | 2000-06-23 |
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|---|---|
| CN1465009A true CN1465009A (en) | 2003-12-31 |
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| CN01814277A Pending CN1465009A (en) | 2000-06-23 | 2001-06-01 | Non-volatile cache integrated with mass storage device |
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| JP (1) | JP2004502237A (en) |
| CN (1) | CN1465009A (en) |
| AU (1) | AU2001266657A1 (en) |
| DE (1) | DE10196383T1 (en) |
| GB (1) | GB2380031B (en) |
| TW (1) | TW576966B (en) |
| WO (1) | WO2002001364A2 (en) |
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2001
- 2001-04-09 TW TW090108446A patent/TW576966B/en not_active IP Right Cessation
- 2001-06-01 AU AU2001266657A patent/AU2001266657A1/en not_active Abandoned
- 2001-06-01 JP JP2002506433A patent/JP2004502237A/en active Pending
- 2001-06-01 CN CN01814277A patent/CN1465009A/en active Pending
- 2001-06-01 WO PCT/US2001/017845 patent/WO2002001364A2/en active Application Filing
- 2001-06-01 GB GB0228874A patent/GB2380031B/en not_active Expired - Fee Related
- 2001-06-01 DE DE10196383T patent/DE10196383T1/en not_active Ceased
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| CN101504629B (en) * | 2004-03-08 | 2012-04-11 | 桑迪士克股份有限公司 | Flash controller cache architecture |
| US8041904B2 (en) | 2004-05-03 | 2011-10-18 | Microsoft Corporation | Non-volatile memory cache performance improvement |
| US10216637B2 (en) | 2004-05-03 | 2019-02-26 | Microsoft Technology Licensing, Llc | Non-volatile memory cache performance improvement |
| US8255645B2 (en) | 2004-05-03 | 2012-08-28 | Microsoft Corporation | Non-volatile memory cache performance improvement |
| US9405693B2 (en) | 2004-05-03 | 2016-08-02 | Microsoft Technology Licensing, Llc | Non-volatile memory cache performance improvement |
| US8909861B2 (en) | 2004-10-21 | 2014-12-09 | Microsoft Corporation | Using external memory devices to improve system performance |
| US9690496B2 (en) | 2004-10-21 | 2017-06-27 | Microsoft Technology Licensing, Llc | Using external memory devices to improve system performance |
| US9317209B2 (en) | 2004-10-21 | 2016-04-19 | Microsoft Technology Licensing, Llc | Using external memory devices to improve system performance |
| US11334484B2 (en) | 2005-12-16 | 2022-05-17 | Microsoft Technology Licensing, Llc | Optimizing write and wear performance for a memory |
| US9529716B2 (en) | 2005-12-16 | 2016-12-27 | Microsoft Technology Licensing, Llc | Optimizing write and wear performance for a memory |
| US8631203B2 (en) | 2007-12-10 | 2014-01-14 | Microsoft Corporation | Management of external memory functioning as virtual cache |
| US10387313B2 (en) | 2008-09-15 | 2019-08-20 | Microsoft Technology Licensing, Llc | Method and system for ensuring reliability of cache data and metadata subsequent to a reboot |
| US9032151B2 (en) | 2008-09-15 | 2015-05-12 | Microsoft Technology Licensing, Llc | Method and system for ensuring reliability of cache data and metadata subsequent to a reboot |
| US8489815B2 (en) | 2008-09-15 | 2013-07-16 | Microsoft Corporation | Managing cache data and metadata |
| US9361183B2 (en) | 2008-09-19 | 2016-06-07 | Microsoft Technology Licensing, Llc | Aggregation of write traffic to a data store |
| US9448890B2 (en) | 2008-09-19 | 2016-09-20 | Microsoft Technology Licensing, Llc | Aggregation of write traffic to a data store |
| US10509730B2 (en) | 2008-09-19 | 2019-12-17 | Microsoft Technology Licensing, Llc | Aggregation of write traffic to a data store |
| CN102521147B (en) * | 2011-11-17 | 2015-03-25 | 曙光信息产业(北京)有限公司 | Management method by using rapid non-volatile medium as cache |
| CN102521147A (en) * | 2011-11-17 | 2012-06-27 | 曙光信息产业(北京)有限公司 | Management method by using rapid non-volatile medium as cache |
| CN107533528A (en) * | 2015-05-22 | 2018-01-02 | 惠普发展公司有限责任合伙企业 | Data channel is distributed |
| US10642771B2 (en) | 2015-05-22 | 2020-05-05 | Hewlett-Packard Development Company, L.P. | Data channel allocation |
| CN107533528B (en) * | 2015-05-22 | 2020-12-04 | 惠普发展公司有限责任合伙企业 | Data channel allocation |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2380031B (en) | 2004-09-29 |
| JP2004502237A (en) | 2004-01-22 |
| DE10196383T1 (en) | 2003-07-03 |
| GB2380031A (en) | 2003-03-26 |
| WO2002001364A3 (en) | 2002-04-04 |
| WO2002001364A2 (en) | 2002-01-03 |
| TW576966B (en) | 2004-02-21 |
| AU2001266657A1 (en) | 2002-01-08 |
| GB0228874D0 (en) | 2003-01-15 |
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