CN103714027B - A kind of data transmission method of direct memory access controller and device - Google Patents
A kind of data transmission method of direct memory access controller and device Download PDFInfo
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- CN103714027B CN103714027B CN201410012698.9A CN201410012698A CN103714027B CN 103714027 B CN103714027 B CN 103714027B CN 201410012698 A CN201410012698 A CN 201410012698A CN 103714027 B CN103714027 B CN 103714027B
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Abstract
A kind of data transmission method of direct memory access dma controller and device, when multiple described system sends request read command by arbitration mechanism to system to equipment DMA engine, system is sent to reception message distribution module to the first message of equipment or read operation order by be sent, described reception message distribution module resolves the request identifier of described first message or read operation order, according to this request mark, described first message or read operation order is distributed to corresponding system to equipment DMA engine; Multiple equipment sends request write order by arbitration mechanism to system to system DMA engine, write operation order is sent to and receives message distribution module by system, the equipment that is sent to again is to system DMA engine, and then equipment sends described second message to system to system DMA engine by arbitration mechanism.Adopt multi-set parallel DMA engine to work simultaneously, the efficiency that dma device receives and sends data can be significantly improved, elevator system performance.
Description
Technical field
The present invention relates to Computer System Design field and integrated circuit (IC) design field, be specifically related to a kind of data transmission method and device of direct memory access controller.
Background technology
Along with the develop rapidly of computer technology and integrated circuit technique, high performance computer system more and more becomes the needs of socio-economic development.The data transfer bandwidth of computer system reaches tens of GB/s, and data processing and the analysis ability of simultaneous computer system attachment equipment are also more and more higher, and this brings challenges with regard to the transmittability for data.Need raising system to the transmitted data amount of equipment on the one hand, namely improve the utilization factor of system data transmission bandwidth as much as possible, need on the other hand to avoid data to transmit as much as possible and the CPU computational resource of consumption.This just needs to adopt advanced DMA(DirectMemoryAccess, direct memory access (DMA)) transmission technology, DMA(DirectMemoryAccess, direct memory access (DMA)) refer to and a kind of data transfer operation of high speed allow direct read/write data between external unit and storer.
DMA transmission technology both effectively can improve data transmission efficiency, can avoid again the consumption to CPU computational resource.
But single DMA engine transfer efficiency is low, the transmission bandwidth utilization factor of data handling system is not high, have impact on system performance.
Summary of the invention
The technical problem to be solved in the present invention overcomes the low deficiency of single DMA engine transfer efficiency, adopts multi-set parallel DMA engine to work simultaneously, can significantly improve the efficiency that dma device receives and sends data, elevator system performance.
A data transmission method for direct memory access dma controller, is applied to the dma controller comprising multiple DMA engine, and described DMA engine comprises system to equipment DMA engine and equipment to system DMA engine, and described method comprises:
When multiple described system sends request read command by arbitration mechanism to system to equipment DMA engine, system is sent to reception message distribution module to the first message of equipment or read operation order by be sent, described reception message distribution module resolves the request identifier of described first message or read operation order, according to this request mark, described first message or read operation order is distributed to corresponding system to equipment DMA engine; Described system is transmitted to relevant device after equipment DMA engine obtains described first message;
When multiple described equipment works to system DMA engine simultaneously, the second message of system of giving to be sent is sent to each equipment to system DMA engine by equipment, multiple equipment sends request write order by arbitration mechanism to system to system DMA engine, after system receives described request write order, write operation order is sent to and receives message distribution module, described reception message distribution module resolves the request identifier of described write operation order, according to described identifier, described write operation order is distributed to corresponding equipment to system DMA engine; After equipment receives described write operation order to system DMA engine, send described second message to system by arbitration mechanism.
Alternatively, describedly send the second message by arbitration mechanism and comprise to the step of system:
Prioritization arbitration is carried out to the second message that equipment described in each sends to system DMA engine; Prioritization arbitration is carried out again to described second message through arbitration;
The described step sending request write order to system by arbitration mechanism comprises:
Prioritization arbitration is carried out to the request write order that equipment described in each sends to system DMA engine; Prioritization arbitration is carried out again to the described request write order through arbitration;
The described step sending request read command by arbitration mechanism comprises:
Prioritization arbitration is carried out to the request read command that system described in each sends to equipment DMA engine, prioritization arbitration is carried out again to the described order through arbitration.
Alternatively, also comprise: generate interrupt request according to internal interrupt and/or external interrupt, priority arbitration is carried out to interrupt request, generate after arbitration and interrupt message, send to arbitration mechanism again to carry out prioritization arbitration together with described second message described interruption message, after arbitration, described interruption message is sent to system.
Alternatively, also comprise before described system obtains the step of described first message to equipment DMA engine: described system initiates descriptor information to equipment DMA engine, described descriptor information is write the first descriptor register, when the read operation order of the band descriptor information that the system of receiving returns, described system carries out the step of described first message of described acquisition from system according to described descriptor information to equipment DMA engine.
Alternatively, also comprise before described second message of transmission is to the step of system: described equipment initiates descriptor information to system DMA engine, described descriptor information is write the second descriptor register, when the write operation order of the band descriptor information that the system of receiving returns, described equipment carries out sending described second message data message to the step of system to system DMA according to described descriptor information.
A data transmission device for direct memory access controller, comprising: receive message distribution module, arbitration modules, multiple DMA engine module;
Described multiple DMA engine module comprises multiple system to equipment DMA engine module, multiple equipment to system DMA engine modules;
Described system is used for sending request read command by arbitration modules to system to equipment DMA engine module; Receiving system is by the first message of receiving message distribution module and sending over or read operation order; Give during the first message of equipment be transmitted to relevant device when acquisition system is to be sent;
Described reception message distribution module is used for from system acceptance to be sent to the first message of equipment or read operation order, resolve the request identifier of described first message or read operation order, according to this request mark, described first message or read operation order are distributed to corresponding system to equipment DMA engine module;
Described reception message distribution module is also sent to the write operation order of equipment to system DMA engine modules for receiving system, resolve the request identifier of described write operation order, according to described identifier, described write operation order is distributed to corresponding equipment to system DMA engine modules;
Described equipment is used for sending request write order by arbitration modules to system to system DMA engine modules; Described equipment also for after receiving described write operation order, sends described second message to system by arbitration modules to system DMA engine modules.
Described arbitration modules is used for carrying out priority arbitration to the request read command that system is sent to system to equipment DMA engine module; Described arbitration modules is also for being sent to the request write order of system to equipment to system DMA engine modules or the second message carries out priority arbitration.
Alternatively, described arbitration modules comprises one instance arbitration module, secondary arbitration modules;
Described one instance arbitration module is used for the second message of sending to system DMA engine modules equipment described in each or asks write order to carry out prioritization arbitration;
Described secondary arbitration modules is used for carrying out again prioritization arbitration to through described second message of one instance arbitration or described request write order;
Described one instance arbitration module is used for carrying out prioritization arbitration to the request read command that system described in each sends to equipment DMA engine module,
Described secondary arbitration modules is used for carrying out again prioritization arbitration to through sending request read command described in one instance arbitration;
Described secondary arbitration modules is also for carrying out again prioritization arbitration to described interruption message.
Alternatively, also comprise interrupt arbitrage module, interrupt generation module; Described interruption generation module generates interrupt request according to internal interrupt and/or external interrupt, and described interrupt arbitrage module carries out prioritization arbitration to the interrupt request that described interruption generation module generates, and generates and interrupt message after prioritization arbitration,
Described interruption message is sent to secondary arbitration modules and participates in prioritization arbitrate together with described second message by described interrupt arbitrage module, and described interruption message is sent to system after the arbitration of secondary arbitration modules prioritization.
Alternatively, also comprise the first descriptor register, system to equipment DMA engine module also for obtain described first message step before, described system initiates descriptor information to equipment DMA engine module, described descriptor information is write the first descriptor register, when the read operation order of the band descriptor information that the system of receiving returns, described system obtains described first message according to described descriptor information from system to equipment DMA engine module.
Alternatively, also comprise the second descriptor register, described equipment to system DMA engine modules also for sent by arbitration modules described second message to system before, initiate descriptor information, by described second descriptor register of described descriptor information write, when the write operation order of the band descriptor information that the system of receiving returns, carry out the described operation described second message being sent to system.
The present invention organizes DMA engine in the design of chip internal dma module more, makes its concurrent working.During from system acceptance the first message, be responsible for resolving the request identifier ID receiving message by receiving message distribution module, and the distribution completed to each DMA engine, when sending the second message to system, control inner transmission message collisions by the one instance arbitration of each DMA engine inside, control by secondary arbitration modules the conflict that multiple DMA engine sends message.Same, interrupt request is produced by each DMA engine inside, and then carries out arbitration control by interrupt arbitrage module, and message is interrupted in generation, sends to arbitration modules to carry out arbitration and controls.The multistage arbitration control of transmission message of many groups DMA engine and interrupt arbitrage control the collision problem that effectively prevent magnanimity message transmissions, therefore in high bandwidth transfer systems, or in large data handling system, there is vast potential for future development, there is very high technological value.
Accompanying drawing explanation
Fig. 1 is that system carries out operational flowchart when receiving data manipulation to equipment DMA engine module;
Fig. 2 is that equipment carries out operational flowchart when sending data manipulation to system DMA engine modules;
Fig. 3 is the installation drawing that multiple parallel DMA engine module works simultaneously.
Embodiment
Below in conjunction with drawings and Examples, technical scheme of the present invention is described in detail.
It should be noted that, if do not conflicted, each feature in the embodiment of the present invention and embodiment can be combined with each other, all within protection scope of the present invention.In addition, although show logical order in flow charts, in some cases, can be different from the step shown or described by order execution herein.
Before elaboration embodiment, first set forth several implication.
First message refers to the message being sent to device orientation from system;
Second message refers to the message being sent to system orientation from equipment.
DMA engine module comprises system to equipment DMA engine module and equipment to system DMA engine modules, and DMA engine module receives data and refers to transmit data from system to device orientation, and DMA engine module sends data and refers to transmit data from equipment to system orientation.
Embodiment one
Composition graphs 1 and Fig. 3 set forth operating process when system carries out reception data manipulation to equipment DMA engine module.
A data transmission method for direct memory access dma controller, is applied to the dma controller comprising multiple DMA engine, and described DMA engine comprises system to equipment DMA engine and equipment to system DMA engine, and described method comprises:
When multiple described system sends request read command by arbitration mechanism to system to equipment DMA engine, system is sent to reception message distribution module to the first message of equipment or read operation order by be sent, described reception message distribution module resolves the request identifier of described first message or read operation order, according to this request mark, described first message or read operation order is distributed to corresponding system to equipment DMA engine; Described system is transmitted to relevant device after equipment DMA engine obtains described first message;
The described step sending request read command by arbitration mechanism comprises:
Prioritization arbitration is carried out to the request read command that system described in each sends to equipment DMA engine, prioritization arbitration is carried out again to the described order through arbitration.
As can be seen from Figure 3 multiple system works to equipment DMA engine simultaneously.
First request read command is initiated by system to equipment DMA engine, send multiple request read command to compete conflict in order to avoid same system to equipment simultaneously, and set up arbitration mechanism, after one instance arbitration, the request read command that priority is high can preferentially be passed through, and the request read command that priority is low can delayedly send.
The request read command that priority is high carries out secondary arbitration again after one instance arbitration, after secondary arbitration, enter into system.Secondary arbitration set up the request read command mainly sent in order to avoid different systems to equipment DMA engine to system still to have after one instance arbitration to send simultaneously and compete conflict.
Also comprise before described system obtains the step of described first message to equipment DMA engine: described system initiates descriptor information to equipment DMA engine, described descriptor information is write the first descriptor register, when the read operation order of the band descriptor information that the system of receiving returns, described system carries out the step of described first message of described acquisition from system according to described descriptor information to equipment DMA engine.
After system receives request read command, system sends the read operation response command of the first message and band data, the read operation order namely with descriptor information.First read operation order with descriptor information and the first message arrive message distribution module, read operation order or the first message and system have relation one to one to equipment DMA engine module, distinguished by request identifier ID, described reception message distribution module resolves the request identifier ID of described read operation order or the first message, the read operation order of band descriptor information and the first message are distributed to receiving end, receiving end is connected to equipment DMA engine module with system
Descriptor register is also had to equipment DMA engine inside modules in system, the read operation order of the first message or band descriptor information enters into the descriptor register of system to equipment DMA engine inside modules by the register interface of receiving end, system initiates descriptor information to equipment DMA engine module, described descriptor information is write the first descriptor register, when described first descriptor register receives the read operation order of the band descriptor information that system returns, transmission first message is sent to system to equipment DMA engine module by the first descriptor register.
First descriptor register also can in the outside of system to equipment DMA engine module.
First message is transmitted to equipment by system to equipment DMA after being sent to system to equipment DMA engine module.
Owing to having had arbitration mechanism and message distribution mechanism, multiple system can initiate read operation request to equipment DMA engine simultaneously, therefore greatly can improve the efficiency of system data transmission.
Embodiment two
Composition graphs 2 and Fig. 3 illustrated devices carry out operating process when sending data manipulation to system DMA engine modules.
A data transmission method for direct memory access dma controller, is applied to the dma controller comprising multiple DMA engine, and described DMA engine comprises system to equipment DMA engine and equipment to system DMA engine, and described method comprises:
When multiple described equipment works to system DMA engine simultaneously, the second message of system of giving to be sent is sent to each equipment to system DMA engine by equipment, multiple equipment sends request write order by arbitration mechanism to system to system DMA engine, after system receives described request write order, write operation order is sent to and receives message distribution module, described reception message distribution module resolves the request identifier of described write operation order, according to described identifier, described write operation order is distributed to corresponding equipment to system DMA engine; After equipment receives described write operation order to system DMA engine, send described second message to system by arbitration mechanism.
Alternatively, describedly send the second message by arbitration mechanism and comprise to the step of system:
Prioritization arbitration is carried out to the second message that equipment described in each sends to system DMA engine; Prioritization arbitration is carried out again to described second message through arbitration;
The described step sending request write order to system by arbitration mechanism comprises:
Prioritization arbitration is carried out to the request write order that equipment described in each sends to system DMA engine; Prioritization arbitration is carried out again to the described request write order through arbitration.
First, when equipment carries out sending data manipulation to system orientation to system DMA engine, first initiate write operation requests by equipment to system DMA, equipment sends request write order to system DMA to one instance arbitration module.
One instance arbitration carries out priority arbitration, high can preferentially the sending of priority, the delayed transmission that priority is low to request write order.
The request write order that priority is high carries out secondary arbitration again after one instance arbitration, carries out priority arbitration again, after secondary arbitration, enter into system.
Secondary arbitration set up the request write order mainly sent in order to avoid different equipment to system DMA to system still to have after one instance arbitration to send simultaneously and compete conflict.
Alternatively, also comprise: generate interrupt request according to internal interrupt and/or external interrupt, priority arbitration is carried out to interrupt request, generate after arbitration and interrupt message, send to arbitration mechanism again to carry out prioritization arbitration together with described second message described interruption message, after arbitration, described interruption message is sent to system.
Internal interrupt refers to the interruption that system produces to equipment DMA engine, equipment to system DMA engine, one instance arbitration mechanism, system, when creating multiple interrupt request, multiple interrupt request just creates competition and sends conflict, now just need to carry out priority arbitration to interrupt request, what priority was high preferentially can be sent to system, low can delayedly the sending of priority.
The arbitration of interrupt priority level can be realized by interrupt priority level arbitration, also also can generate and interrupt message, the interrupt request that priority is high generates interrupts message, described interruption message is sent to that secondary arbitration mechanism and equipment are to be sent participates in priority arbitration together with the second message of system, after secondary arbitration, be sent to system.
Alternatively, also comprise before described second message of transmission is to the step of system: described equipment initiates descriptor information to system DMA engine, described descriptor information is write the second descriptor register, when the write operation order of the band descriptor information that the system of receiving returns, described equipment carries out sending described second message data message to the step of system to system DMA according to described descriptor information.
After system receives request write order, the write operation response command of system transmit band data, the write operation order namely with descriptor information.First write operation order with descriptor information arrives message distribution module, write operation order and equipment have relation one to one to system DMA engine modules, distinguished by request identifier ID, described reception message distribution module resolves the request identifier ID of described read operation order, described write operation order is distributed to receiving end, receiving end is connected to system DMA engine modules with equipment
Second descriptor register can in equipment to system DMA engine or at equipment to system DMA engine outer;
Write operation order with descriptor information enters into second descriptor register of equipment to system DMA engine modules inside by the register interface of receiving end, equipment initiates descriptor information to system DMA engine modules, by described descriptor information write descriptor register, the second message is sent to system to system DMA engine according to descriptor information by equipment.
Second descriptor register also can be outside to system DMA engine modules at equipment.
Owing to having had arbitration mechanism and message distribution mechanism, multiple equipment can initiate write operation requests to system DMA engine simultaneously, therefore greatly can improve the efficiency of system data transmission.
When only there being a DMA engine job, the two priority classes of its internal interrupt and external interrupt completes at interruption generation module.
Composition graphs 3 sets forth the embodiment of device claim.
A data transmission device for direct memory access controller, comprising: receive message distribution module, arbitration modules, multiple DMA engine module;
Described multiple DMA engine module comprises multiple system to equipment DMA engine module, multiple equipment to system DMA engine modules;
Described system is used for sending request read command by arbitration modules to system to equipment DMA engine module; Receiving system is by the first message of receiving message distribution module and sending over or read operation order; Give during the first message of equipment be transmitted to relevant device when acquisition system is to be sent;
Described reception message distribution module is used for from system acceptance to be sent to the first message of equipment or read operation order, resolve the request identifier of described first message or read operation order, according to this request mark, described first message or read operation order are distributed to corresponding system to equipment DMA engine module;
Described reception message distribution module is also sent to the write operation order of equipment to system DMA engine modules for receiving system, resolve the request identifier of described write operation order, according to described identifier, described write operation order is distributed to corresponding equipment to system DMA engine modules;
Described equipment is used for sending request write order by arbitration modules to system to system DMA engine modules; Described equipment also for after receiving described write operation order, sends described second message to system by arbitration modules to system DMA engine modules.
Described arbitration modules is used for carrying out priority arbitration to the request read command that system is sent to system to equipment DMA engine module; Described arbitration modules is also for being sent to the request write order of system to equipment to system DMA engine modules or the second message carries out priority arbitration.
Alternatively, described arbitration modules comprises one instance arbitration module, secondary arbitration modules;
Described one instance arbitration module is used for the second message of sending to system DMA engine modules equipment described in each or asks write order to carry out prioritization arbitration;
Described secondary arbitration modules is used for carrying out again prioritization arbitration to through described second message of one instance arbitration or described request write order;
Such as, equipment receives to system DMA engine modules the second message A and the second message B that equipment sends simultaneously, both messages generate competition conflict, one instance arbitration module carries out priority arbitration to described second message A and B, if the priority of A is higher than the priority of B, the message A that priority is high is preferentially sent to secondary arbitration modules.Secondary arbitration modules have received again the message C that another equipment is sent to system DMA engine modules while have received message A, then now need to carry out prioritization arbitration to message A and C, if the priority of A is higher than the priority of C, then message A is preferentially sent in system by the second arbitration modules.
Described one instance arbitration module is used for carrying out prioritization arbitration to the request read command that system described in each sends to equipment DMA engine module,
Described secondary arbitration modules is used for carrying out again prioritization arbitration to through sending request read command described in one instance arbitration;
Described secondary arbitration modules is also for carrying out again prioritization arbitration to described interruption message;
Alternatively, also comprise interrupt arbitrage module, interrupt generation module; Described interruption generation module generates interrupt request according to internal interrupt and/or external interrupt, described interrupt arbitrage module carries out prioritization arbitration to the interrupt request that described interruption generation module generates, generate after prioritization arbitration and interrupt message, described interruption message is sent to secondary arbitration modules and participates in prioritization arbitrate together with described second message by described interrupt arbitrage module, and described interruption message is sent to system after the arbitration of secondary arbitration modules prioritization.
System, to equipment DMA engine module, equipment to system engine module, one instance arbitration module, system, can occur to interrupt or interrupt request.
The interrupt request of system is by receiving message distribution module, receiving end, being transferred to interrupt register, and the interrupt request of system is sent to interruption generation module by interrupt register.
Interrupt generation module and also can receive outside interrupt request and production interrupt request message.
When to produce multiple interrupt request message simultaneously, just need to carry out prioritization arbitration to interrupt request message, interrupt arbitrage module carries out prioritization arbitration to interrupt request, and the interrupt request that priority is high has been generated interruption message,
Such as, external interrupt request A, system has an interrupt request B to equipment dma module, generate external interrupt request A and the system interrupt request B to equipment DMA engine module interrupting generation module simultaneously, because A and B occurs simultaneously, interrupt arbitrage module is then needed to carry out prioritization, if A is preferential, then interrupt arbitrage module first generates the interrupt request message of A, interrupt request message A is sent to the second arbitration modules, the second message being sent to system orientation with equipment carries out prioritization arbitration, if the priority of interrupt request message A is greater than the priority of the second message C, then interrupt request message A is preferentially sent in system and goes.
Alternatively, also comprise the first descriptor register, system to equipment DMA engine module also for obtain described first message step before, described system initiates descriptor information to equipment DMA engine module, described descriptor information is write the first descriptor register, when the read operation order of the band descriptor information that the system of receiving returns, described system obtains described first message according to described descriptor information from system to equipment DMA engine module.
First descriptor register can also can in system to outside equipment DMA engine module in system to equipment DMA engine module.
Alternatively, also comprise the second descriptor register, described equipment to system DMA engine modules also for sent by arbitration modules described second message to system before, initiate descriptor information, by described second descriptor register of described descriptor information write, when the write operation order of the band descriptor information that the system of receiving returns, carry out the described operation described second message being sent to system.
Second descriptor register can also can at equipment to outside system DMA engine modules in equipment to system DMA engine modules.
The present invention takes into full account the feature of computer system data transmission bandwidth and accessory device Data Management Analysis ability, adopt the DMA engine technology of multi-set parallel, coordinate corresponding multistage arbitration control technology, to the DMA engine of system both direction, multi-set parallel work is realized to equipment and equipment respectively to system, improve the transmission bandwidth utilization factor of data handling system with this, thus reach the object of elevator system performance.
The all or part of step that one of ordinary skill in the art will appreciate that in said method is carried out instruction related hardware by program and is completed, and described program can be stored in computer-readable recording medium, as ROM (read-only memory), disk or CD etc.Alternatively, all or part of step of above-described embodiment also can use one or more integrated circuit to realize.Correspondingly, each module/unit in above-described embodiment can adopt the form of hardware to realize, and the form of software function module also can be adopted to realize.The present invention is not restricted to the combination of the hardware and software of any particular form.
Certainly; the present invention also can have other various embodiments; when not deviating from the present invention's spirit and essence thereof; those of ordinary skill in the art are when making various corresponding change and distortion according to the present invention, but these change accordingly and are out of shape the protection domain that all should belong to claim of the present invention.
Claims (10)
1. a data transmission method for direct memory access dma controller, is characterized in that, is applied to the dma controller comprising multiple DMA engine, and described DMA engine comprises system to equipment DMA engine and equipment to system DMA engine, and described method comprises:
When multiple described system sends request read command by arbitration mechanism to system to equipment DMA engine, system is sent to reception message distribution module to the first message of equipment or read operation order by be sent, described reception message distribution module resolves the request identifier of described first message or read operation order, according to this request mark, described first message or read operation order is distributed to corresponding system to equipment DMA engine; Described system is transmitted to relevant device after equipment DMA engine obtains described first message;
When multiple described equipment works to system DMA engine simultaneously, the second message of system of giving to be sent is sent to each equipment to system DMA engine by equipment, multiple equipment sends request write order by arbitration mechanism to system to system DMA engine, after system receives described request write order, write operation order is sent to and receives message distribution module, described reception message distribution module resolves the request identifier of described write operation order, according to described identifier, described write operation order is distributed to corresponding equipment to system DMA engine; After equipment receives described write operation order to system DMA engine, send described second message to system by arbitration mechanism.
2. method according to claim 1, is characterized in that, describedly sends the second message by arbitration mechanism and comprises to the step of system:
Prioritization arbitration is carried out to the second message that equipment described in each sends to system DMA engine; Prioritization arbitration is carried out again to described second message through arbitration;
The described step sending request write order to system by arbitration mechanism comprises:
Prioritization arbitration is carried out to the request write order that equipment described in each sends to system DMA engine; Prioritization arbitration is carried out again to the described request write order through arbitration;
The described step sending request read command by arbitration mechanism comprises:
Prioritization arbitration is carried out to the request read command that system described in each sends to equipment DMA engine, prioritization arbitration is carried out again to the described order through arbitration.
3. method according to claim 2, it is characterized in that: also comprise: generate interrupt request according to internal interrupt and/or external interrupt, priority arbitration is carried out to interrupt request, generate after arbitration and interrupt message, send to arbitration mechanism again to carry out prioritization arbitration together with described second message described interruption message, after arbitration, described interruption message is sent to system.
4. method according to claim 1, it is characterized in that, also comprise before described system obtains the step of described first message to equipment DMA engine: described system initiates descriptor information to equipment DMA engine, described descriptor information is write the first descriptor register, when the read operation order of the band descriptor information that the system of receiving returns, described system carries out the step of described first message of described acquisition from system according to described descriptor information to equipment DMA engine.
5. method according to claim 1, it is characterized in that, also comprise before described second message of transmission is to the step of system: described equipment initiates descriptor information to system DMA engine, described descriptor information is write the second descriptor register, when the write operation order of the band descriptor information that the system of receiving returns, described equipment carries out sending described second message data message to the step of system to system DMA according to described descriptor information.
6. a data transmission device for direct memory access controller, is characterized in that, comprising: receive message distribution module, arbitration modules, multiple DMA engine module;
Described multiple DMA engine module comprises multiple system to equipment DMA engine module, multiple equipment to system DMA engine modules;
Described system is used for sending request read command by arbitration modules to system to equipment DMA engine module; Receiving system is by the first message of receiving message distribution module and sending over or read operation order; Give during the first message of equipment be transmitted to relevant device when acquisition system is to be sent;
Described reception message distribution module is used for from system acceptance to be sent to the first message of equipment or read operation order, resolve the request identifier of described first message or read operation order, according to this request mark, described first message or read operation order are distributed to corresponding system to equipment DMA engine module;
Described reception message distribution module is also sent to the write operation order of equipment to system DMA engine modules for receiving system, resolve the request identifier of described write operation order, according to described identifier, described write operation order is distributed to corresponding equipment to system DMA engine modules;
Described equipment is used for sending request write order by arbitration modules to system to system DMA engine modules; Described equipment also for after receiving described write operation order, sends second message to system by arbitration modules to system DMA engine modules;
Described arbitration modules is used for carrying out priority arbitration to the request read command that system is sent to system to equipment DMA engine module; Described arbitration modules is also for being sent to the request write order of system to equipment to system DMA engine modules or the second message carries out priority arbitration.
7. device according to claim 6, is characterized in that, described arbitration modules comprises one instance arbitration module, secondary arbitration modules;
Described one instance arbitration module is used for the second message of sending to system DMA engine modules equipment described in each or asks write order to carry out prioritization arbitration;
Described secondary arbitration modules is used for carrying out again prioritization arbitration to through described second message of one instance arbitration or described request write order;
Described one instance arbitration module is used for carrying out prioritization arbitration to the request read command that system described in each sends to equipment DMA engine module,
Described secondary arbitration modules is used for carrying out again prioritization arbitration to through sending request read command described in one instance arbitration;
Described secondary arbitration modules is also for carrying out again prioritization arbitration to interruption message.
8. device according to claim 7, is characterized in that, also comprises interrupt arbitrage module, interrupts generation module; Described interruption generation module generates interrupt request according to internal interrupt and/or external interrupt, described interrupt arbitrage module carries out prioritization arbitration to the interrupt request that described interruption generation module generates, generate after prioritization arbitration and interrupt message, described interruption message is sent to secondary arbitration modules and participates in prioritization arbitrate together with described second message by described interrupt arbitrage module, and described interruption message is sent to system after the arbitration of secondary arbitration modules prioritization.
9. device according to claim 6, it is characterized in that, also comprise the first descriptor register, system to equipment DMA engine module also for obtain described first message step before, described system initiates descriptor information to equipment DMA engine module, described descriptor information is write the first descriptor register, when the read operation order of the band descriptor information that the system of receiving returns, described system obtains described first message according to described descriptor information from system to equipment DMA engine module.
10. device according to claim 6, it is characterized in that, also comprise the second descriptor register, described equipment to system DMA engine modules also for sent by arbitration modules described second message to system before, initiate descriptor information, by described second descriptor register of described descriptor information write, when the write operation order of the band descriptor information that the system of receiving returns, carry out the described operation described second message being sent to system.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410012698.9A CN103714027B (en) | 2014-01-10 | 2014-01-10 | A kind of data transmission method of direct memory access controller and device |
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| CN201410012698.9A CN103714027B (en) | 2014-01-10 | 2014-01-10 | A kind of data transmission method of direct memory access controller and device |
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| CN104298628B (en) * | 2014-09-30 | 2017-12-29 | 中国电子科技集团公司第三十八研究所 | A kind of data storage arbitration circuit and referee method for concurrently accessing |
| CN105573933B (en) * | 2014-10-17 | 2018-10-09 | 瑞昱半导体股份有限公司 | Processor and the method for accessing memory |
| CN105991472A (en) * | 2015-03-03 | 2016-10-05 | 中兴通讯股份有限公司 | Message moving method and device |
| CN109359069A (en) * | 2018-09-25 | 2019-02-19 | 济南浪潮高新科技投资发展有限公司 | A kind of data transmission method and device |
| US20210064368A1 (en) * | 2019-08-28 | 2021-03-04 | Micron Technology, Inc. | Command tracking |
| CN111401541A (en) * | 2020-03-10 | 2020-07-10 | 湖南国科微电子股份有限公司 | Data transmission control method and device |
| CN112199309B (en) * | 2020-10-10 | 2022-03-15 | 北京泽石科技有限公司 | Data reading method and device based on DMA engine and data transmission system |
| CN112749112B (en) * | 2020-12-31 | 2021-12-24 | 无锡众星微系统技术有限公司 | Hardware flow structure |
| CN113742267B (en) * | 2021-09-07 | 2023-10-27 | 中国科学院计算技术研究所 | DMA communication system and method for RDMA communication equipment |
| CN114443529B (en) * | 2022-04-02 | 2022-07-05 | 苏州浪潮智能科技有限公司 | Direct memory access architecture, system, method, electronic device and medium |
| CN115658571B (en) * | 2022-11-16 | 2023-02-28 | 浪潮电子信息产业股份有限公司 | Data transmission method, device, electronic equipment and medium |
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