CN103324580A - Data writing method, memory controller and memory storage device - Google Patents

Data writing method, memory controller and memory storage device Download PDF

Info

Publication number
CN103324580A
CN103324580A CN2012100792961A CN201210079296A CN103324580A CN 103324580 A CN103324580 A CN 103324580A CN 2012100792961 A CN2012100792961 A CN 2012100792961A CN 201210079296 A CN201210079296 A CN 201210079296A CN 103324580 A CN103324580 A CN 103324580A
Authority
CN
China
Prior art keywords
physical page
group
page group
physical
distance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2012100792961A
Other languages
Chinese (zh)
Other versions
CN103324580B (en
Inventor
詹清文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Phison Electronics Corp
Original Assignee
Phison Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Phison Electronics Corp filed Critical Phison Electronics Corp
Priority to CN201210079296.1A priority Critical patent/CN103324580B/en
Publication of CN103324580A publication Critical patent/CN103324580A/en
Application granted granted Critical
Publication of CN103324580B publication Critical patent/CN103324580B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The invention provides a data writing method, a memory controller and a memory storage device. The data writing method is used for writing data into a physical area block of a rewritable nonvolatile memory module and comprises the following steps: setting dangerous distance of each physical page corresponding to the physical area block; setting a safety writing mark to be in the starting state to respond a safety writing instruction; judging whether the safety writing mark is set to be in the starting state when the writing instruction and update data of the writing instruction are received; writing the update data to a preset physical page of the physical area block if the safety writing mark is not set to be in the starting state; writing the update data to a safe physical page of the physical area block and resetting the safety writing mark to be in the forbidden state if the safety writing mark is set to be in the starting state, wherein the distance between the safe physical page and the preset physical page is equal to the dangerous distance corresponding to the preset physical page.

Description

Method for writing data, Memory Controller and memorizer memory devices
Technical field
The present invention relates to a kind of method for writing data, particularly relate to Memory Controller and memorizer memory devices for the method for writing data that can rewrite the formula non-volatile memory module and use the method.
Background technology
Digital camera, mobile phone and MP3 are very rapid in growth over the years, so that the consumer is to the also rapidly increase of demand of Storage Media.Because characteristics such as can rewriteeing formula nonvolatile memory (rewritablenon-volatile memory) and have that data are non-volatile, power saving, volume are little, machinery-free structure, read or write speed are fast, be suitable for most portable type electronic product, for example mobile computer.Solid state hard disc is exactly a kind of with the storage device of flash memory as Storage Media.Therefore, the flash memory industry becomes a ring quite popular in the electronic industry in recent years.
Along with the development of semiconductor process techniques, multi-level cell memory (Multi Level Cell, MLC) is used widely with non-(NAND) flash memory module.Because MLC NAND flash memory physical characteristics, electric charge can may be affected by more unstable and contiguous physical page when the physical page (physical page) of programming part.For example, take 4 rank NAND flash memory module as example, each physical blocks has a plurality of physical pages and these physical pages can be divided into a plurality of lower physical pages and a plurality of upper physical page of corresponding these lower physical pages respectively, and physical page can lower physical page of correspondence one of them on.That is to say, the storage unit that is positioned on the identical word line can consist of a physical page group, and this physical page group comprises a lower physical page and a upper physical page.The speed that data write to lower physical page writes to the speed of upper physical page greater than data, therefore, lower physical page also is called the rapid physical page and upper physical page also is called at a slow speed physical page.Particularly, in when, misprogrammed occuring during the physical page in programming, be stored in corresponding on this data in lower physical page of physical page also may lose.Therefore, with respect to single-order storage unit (Single LevelCell, SLC) NAND flash memory module, though MLC NAND flash memory module capacity is larger, store fiduciary level relatively poor.
Particularly, in some applications, the fiduciary level of data must be guaranteed.For example, in the application with the storage volume of amplification smart card with smart card and MLC NAND flash memory module, when causing the document that is stored in other addresses also to lose if smart card upgrades failure to a document, to cause the reliability of smart card to be under suspicion, and can't be trusted by the user.
Therefore, the method for writing data that needs development can increase the fiduciary level of MLC NAND flash memory module is arranged.
Summary of the invention
The invention provides a kind of method for writing data and Memory Controller, it can promote data writing effectively to the fiduciary level that can rewrite the formula non-volatile memory module.
The invention provides a kind of memorizer memory devices, it is storage data reliably.
The base this, the present invention's one exemplary embodiment proposes a kind of method for writing data, be used for data are write to the physical blocks that can rewrite the formula non-volatile memory module, this physical blocks has a plurality of physical page groups, each physical page group has a plurality of physical pages, the physical page of each physical page group comprises the upper physical page of a lower physical page and, and data writing is to the speed of the lower physical page speed faster than the supreme physical page of data writing.The notebook data wiring method comprises the risk distance of each physical page of setting corresponding each physical page group.In addition, the notebook data wiring method comprises that also receiving safety writes instruction and safety is write sign and be set as starting state, writes safely instruction to respond this.The notebook data wiring method also comprises that reception writes instruction and writes the more new data of instruction with corresponding this; Identify the predetermined physical page among the physical page of these physical page groups; And judge that above-mentioned safety writes sign and whether is set to starting state.The notebook data wiring method also comprises, if writing, above-mentioned safety indicates when being set to starting state, new data is more write in the safe physical page among the physical page of this physical blocks, write instruction to respond this, and above-mentioned safety is write sign be reset to illegal state, wherein above-mentioned safe physical page and the distance between the predetermined physical page equal the risk distance of corresponding this predetermined physical page in this physical blocks.The notebook data wiring method also comprises, if this writes safely when sign is non-to be set to starting state, more new data writes in this predetermined physical page, writes instruction to respond this.
In one embodiment of this invention, above-mentioned physical page group comprises the first physical page group, the second physical page group, the 3rd physical page group, the 4th physical page group, the 5th physical page group, the 6th physical page group and the 7th physical page group, in addition, the step of the risk distance of each physical page of corresponding each the physical page group of above-mentioned setting comprises: the risk distance of the lower physical page of the first physical page group is set as the distance between the lower physical page of the lower physical page of the first physical page group and the first physical page group; The risk distance of the upper physical page of the first physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and the first physical page group; The risk distance of the lower physical page of the second physical page group is set as the distance between the lower physical page of the lower physical page of the second physical page group and the second physical page group; The risk distance of the upper physical page of the second physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and the second physical page group; The risk distance of the lower physical page of the 3rd physical page group is set as the distance between the lower physical page of the lower physical page of the 3rd physical page group and the 3rd physical page group; The risk distance of the upper physical page of the 3rd physical page group is set as the distance between the upper physical page of the lower physical page of the 7th physical page group and the 3rd physical page group; The risk distance of the lower physical page of the 4th physical page group is set as the distance between the lower physical page of the lower physical page of the 4th physical page group and the 4th physical page group; And the risk distance of the upper physical page of the 4th physical page group is set as distance between the upper physical page of the lower physical page of the 7th physical page group and the 4th physical page group.
In one embodiment of this invention, above-mentioned physical page group comprises the 5th physical page group, the 6th physical page group, the 7th physical page group, the 8th physical page group and the 9th physical page group.And the step of the risk distance of each physical page of corresponding each the physical page group of above-mentioned setting comprises: the risk distance of the lower physical page of the 5th physical page group is set as the distance between the lower physical page of the lower physical page of the 5th physical page group and the 5th physical page group; The risk distance of the upper physical page of the 5th physical page group is set as the distance between the upper physical page of the lower physical page of the 9th physical page group and the 5th physical page group; The risk distance of the lower physical page of the 6th physical page group is set as the distance between the lower physical page of the lower physical page of the 7th physical page group and the 6th physical page group; And the risk distance of the upper physical page of the 6th physical page group is set as distance between the upper physical page of the lower physical page of the 9th physical page group and the 6th physical page group.
In one embodiment of this invention, above-mentioned physical page group comprises the first physical page group, the second physical page group, the 3rd physical page group and the 4th physical page group.And the step of the risk distance of each physical page of corresponding each the physical page group of above-mentioned setting comprises: the risk distance of the lower physical page of the first physical page group is set as 0; The risk distance of the upper physical page of the first physical page group is set as 2; The risk distance of the lower physical page of the second physical page group is set as 0; The risk distance of the upper physical page of the second physical page group is set as 1; The risk distance of the lower physical page of the 3rd physical page group is set as 0; The risk distance of the upper physical page of the 3rd physical page group is set as 2; The risk distance of the lower physical page of the 4th physical page group is set as 0; And the risk distance of the upper physical page of the 4th physical page group is set as 1.
In one embodiment of this invention, above-mentioned physical page group also comprises the 5th physical page group and the 6th physical page group.And the step of the risk distance of each physical page of corresponding each the physical page group of above-mentioned setting comprises: the risk distance of the lower physical page of the 5th physical page group is set as 0; The risk distance of the upper physical page of the 5th physical page group is set as 2; The risk distance of the lower physical page of the 6th physical page group is set as 3; And the risk distance of the upper physical page of the 6th physical page group is set as 1.
In one embodiment of this invention, above-mentioned method for writing data also comprises: set up the risk distance table, and record the risk distance of each physical page of corresponding each physical page group in the risk distance table.
In addition, another exemplary embodiment of the present invention proposes a kind of Memory Controller, be used for control and can rewrite the formula non-volatile memory module, wherein this can rewrite the formula non-volatile memory module and has a plurality of physical blocks, each physical blocks has a plurality of physical page groups, each physical page group has a plurality of physical pages, the physical page of each physical page group comprises the upper physical page of a lower physical page and, and data writing is to the speed of the lower physical page speed faster than the supreme physical page of data writing.This Memory Controller comprises host interface, memory interface and memory management circuitry.Host interface is in order to be electrically connected to host computer system.Memory interface can rewrite the formula non-volatile memory module in order to be electrically connected to.Memory management circuitry is electrically connected to host interface and memory interface, and in order to the risk distance of each physical page of the physical page group of setting corresponding these physical blocks.In addition, memory management circuitry receives to write safely instruction and safety is write sign and is set as starting state, writes safely instruction to respond this.In addition, memory management circuitry receives and to write instruction and write the more new data of instruction with corresponding this, and identifies a predetermined physical page among the physical page of physical page group of a target physical block among these physical blocks.Moreover memory management circuitry judges that safety writes sign and whether is set to starting state.If writing, safety indicates when being set to starting state, memory management circuitry will be more new data write in the safe physical page among the physical page of physical page group of this target physical block, write instruction to respond this, and safety is write sign be reset to illegal state, wherein above-mentioned safe physical page and the distance between the predetermined physical page equal the risk distance of the corresponding predetermined physical page in this target physical block.If it is non-when being set to starting state that safety writes sign, memory management circuitry with this more new data write in the predetermined physical page, write instruction to respond this.
In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the first physical page group, the second physical page group, the 3rd physical page group, the 4th physical page group, the 5th physical page group, the 6th physical page group and the 7th physical page group.And above-mentioned memory management circuitry is set as the risk distance of the lower physical page of the first physical page group the distance between the lower physical page of the lower physical page of the first physical page group and the first physical page group; The risk distance of the upper physical page of the first physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and the first physical page group; The risk distance of the lower physical page of the second physical page group is set as the distance between the lower physical page of the lower physical page of the second physical page group and the second physical page group; The risk distance of the upper physical page of the second physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and the second physical page group; The risk distance of the lower physical page of the 3rd physical page group is set as the distance between the lower physical page of the lower physical page of the 3rd physical page group and the 3rd physical page group; The risk distance of the upper physical page of the 3rd physical page group is set as the distance between the upper physical page of the lower physical page of the 7th physical page group and the 3rd physical page group; The risk distance of the lower physical page of the 4th physical page group is set as the distance between the lower physical page of the lower physical page of the 4th physical page group and the 4th physical page group; And the risk distance of the upper physical page of the 4th physical page group is set as distance between the upper physical page of the lower physical page of the 7th physical page group and the 4th physical page group.
In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the 5th physical page group, the 6th physical page group, the 7th physical page group, the 8th physical page group and the 9th physical page group.And above-mentioned memory management circuitry is set as the risk distance of the lower physical page of the 5th physical page group the distance between the lower physical page of the lower physical page of the 5th physical page group and the 5th physical page group; The risk distance of the upper physical page of the 5th physical page group is set as the distance between the upper physical page of the lower physical page of the 9th physical page group and the 5th physical page group; The risk distance of the lower physical page of the 6th physical page group is set as the distance between the lower physical page of the lower physical page of the 7th physical page group and the 6th physical page group; And the risk distance of the upper physical page of the 6th physical page group is set as distance between the upper physical page of the lower physical page of the 9th physical page group and the 6th physical page group.
In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the first physical page group, the second physical page group, the 3rd physical page group and the 4th physical page group.And, above-mentioned memory management circuitry is set as 0 with the risk distance of the lower physical page of the first physical page group, the risk distance of the upper physical page of the first physical page group is set as 2, the risk distance of the lower physical page of the second physical page group is set as 0, the risk distance of the upper physical page of the second physical page group is set as 1, the risk distance of the lower physical page of the 3rd physical page group is set as 0, the risk distance of the upper physical page of the 3rd physical page group is set as 2, the risk distance of the lower physical page of the 4th physical page group is set as 0, and the risk distance of the upper physical page of the 4th physical page group is set as 1.
In one embodiment of this invention, the physical page group of above-mentioned target physical block also comprises the 5th physical page group and the 6th physical page group.And, above-mentioned memory management circuitry is set as 0 with the risk distance of the lower physical page of the 5th physical page group, the risk distance of the upper physical page of the 5th physical page group is set as 2, the risk distance of the lower physical page of the 6th physical page group is set as 3, and the risk distance of the upper physical page of the 6th physical page group is set as 1.
In one embodiment of this invention, above-mentioned memory management circuitry is also in order to setting up the risk distance table, and in the risk distance table risk distance of each physical page of the physical page group of corresponding these physical blocks of record.
Moreover another exemplary embodiment of the present invention proposes a kind of memorizer memory devices, and it comprises can rewrite the formula non-volatile memory module, in order to connector and the Memory Controller that is electrically connected to host computer system.Can rewrite the formula non-volatile memory module and have a plurality of physical blocks, wherein each physical blocks has a plurality of physical page groups, each physical page group has a plurality of physical pages, the physical page of each physical page group comprises the upper physical page of a lower physical page and, and data writing is to the speed of the lower physical page speed faster than the supreme physical page of data writing.Memory Controller is electrically connected to and can rewrites formula non-volatile memory module and connector, in order to the risk distance of each physical page of the physical page group of setting corresponding these physical blocks.In addition, Memory Controller receives to write safely instruction and safety is write sign and is set as starting state, writes safely instruction to respond this.In addition, Memory Controller receives and to write instruction and write the more new data of instruction with corresponding this, and identifies a predetermined physical page among the physical page of physical page group of a target physical block among these physical blocks.Moreover Memory Controller judges that safety writes sign and whether is set to starting state.If writing, safety indicates when being set to starting state, Memory Controller will be more new data write in the safe physical page among the physical page of physical page group of this target physical block, write instruction to respond this, and safety is write sign be reset to illegal state, wherein above-mentioned safe physical page and the distance between the predetermined physical page equal the risk distance of the corresponding predetermined physical page in this target physical block.If it is non-when being set to starting state that safety writes sign, Memory Controller with this more new data write in the predetermined physical page, write instruction to respond this.
In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the first physical page group, the second physical page group, the 3rd physical page group, the 4th physical page group, the 5th physical page group, the 6th physical page group and the 7th physical page group.And above-mentioned Memory Controller is set as the risk distance of the lower physical page of the first physical page group the distance between the lower physical page of the lower physical page of the first physical page group and the first physical page group; The risk distance of the upper physical page of the first physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and the first physical page group; The risk distance of the lower physical page of the second physical page group is set as the distance between the lower physical page of the lower physical page of the second physical page group and the second physical page group; The risk distance of the upper physical page of the second physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and the second physical page group; The risk distance of the lower physical page of the 3rd physical page group is set as the distance between the lower physical page of the lower physical page of the 3rd physical page group and the 3rd physical page group; The risk distance of the upper physical page of the 3rd physical page group is set as the distance between the upper physical page of the lower physical page of the 7th physical page group and the 3rd physical page group; The risk distance of the lower physical page of the 4th physical page group is set as the distance between the lower physical page of the lower physical page of the 4th physical page group and the 4th physical page group; And the risk distance of the upper physical page of the 4th physical page group is set as distance between the upper physical page of the lower physical page of the 7th physical page group and the 4th physical page group.
In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the 5th physical page group, the 6th physical page group, the 7th physical page group, the 8th physical page group and the 9th physical page group.And above-mentioned Memory Controller is set as the risk distance of the lower physical page of the 5th physical page group the distance between the lower physical page of the lower physical page of the 5th physical page group and the 5th physical page group; The risk distance of the upper physical page of the 5th physical page group is set as the distance between the upper physical page of the lower physical page of the 9th physical page group and the 5th physical page group; The risk distance of the lower physical page of the 6th physical page group is set as the distance between the lower physical page of the lower physical page of the 7th physical page group and the 6th physical page group; And the risk distance of the upper physical page of the 6th physical page group is set as distance between the upper physical page of the lower physical page of the 9th physical page group and the 6th physical page group.
In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the first physical page group, the second physical page group, the 3rd physical page group and the 4th physical page group.And, above-mentioned Memory Controller is set as 0 with the risk distance of the lower physical page of the first physical page group, the risk distance of the upper physical page of the first physical page group is set as 2, the risk distance of the lower physical page of the second physical page group is set as 0, the risk distance of the upper physical page of the second physical page group is set as 1, the risk distance of the lower physical page of the 3rd physical page group is set as 0, the risk distance of the upper physical page of the 3rd physical page group is set as 2, the risk distance of the lower physical page of the 4th physical page group is set as 0, and the risk distance of the upper physical page of the 4th physical page group is set as 1.
In one embodiment of this invention, the physical page group of above-mentioned target physical block also comprises the 5th physical page group and the 6th physical page group.And, above-mentioned Memory Controller is set as 0 with the risk distance of the lower physical page of the 5th physical page group, the risk distance of the upper physical page of the 5th physical page group is set as 2, the risk distance of the lower physical page of the 6th physical page group is set as 3, and the risk distance of the upper physical page of the 6th physical page group is set as 1.
In one embodiment of this invention, above-mentioned Memory Controller is also in order to setting up the risk distance table, and in the risk distance table risk distance of each physical page of the physical page group of corresponding these physical blocks of record.
Based on above-mentioned, the method for writing data of exemplary embodiment of the present invention, Memory Controller and memorizer memory devices be writing of executing data reliably, avoids thus because of the misprogrammed lost data.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and be described with reference to the accompanying drawings as follows.
Description of drawings
Figure 1A is that exemplary embodiment illustrates the host computer system of using storage device according to the present invention.
Figure 1B is the schematic diagram of the first exemplary embodiment illustrates according to the present invention computing machine, input/output device and memorizer memory devices.
Fig. 1 C is another exemplary embodiment illustrates according to the present invention host computer system and the schematic diagram of memorizer memory devices.
Fig. 2 is the summary calcspar that illustrates the memorizer memory devices shown in Figure 1A.
Fig. 3 is the summary calcspar of the Memory Controller that illustrates according to an exemplary embodiment.
Fig. 4 A and Fig. 4 B are the schematic diagram that can rewrite the physical blocks of formula non-volatile memory module according to a management that exemplary embodiment illustrates.
Fig. 5~Fig. 7 writes the more example of new data according to what an exemplary embodiment illustrated with the muon physics block.
Fig. 8 is the example schematic of the chaotic physical blocks data writing of use that illustrates according to the first exemplary embodiment.
Fig. 9 A is the schematic diagram that illustrates the two-stage process of MLC NAND type flash memory module according to the embodiment of the invention.
Fig. 9 B is the example schematic of the physical page of the physical blocks that illustrates according to an exemplary embodiment.
Figure 10 is the example schematic of risk distance table of the physical page of the physical blocks of correspondence that illustrates according to this exemplary embodiment.
Figure 11 is the process flow diagram of the setting risk distance that illustrates of the method for writing data according to this exemplary embodiment.
Figure 12 is the process flow diagram that execution that the method for writing data according to this exemplary embodiment illustrates writes instruction.
Description of drawings
1000: host computer system
1100: computing machine
1102: microprocessor
1104: random access memory
1106: input/output device
1108: system bus
1110: data transmission interface
1112: the in-building type storage device
1112a: application program
1202: mouse
1204: keyboard
1206: display
1208: printer
1212: portable disk
1214: storage card
1216: solid state hard disc
1310: digital camera
The 1312:SD card
The 1314:MMC card
1316: memory stick
The 1318:CF card
1320: embedded storage device
100: memorizer memory devices
102: connector
104: Memory Controller
106: can rewrite the formula non-volatile memory module
302: memory management circuitry
304: host interface
306: memory interface
308: memory buffer
310: electric power management circuit
312: bug check and correcting circuit
502: the data field
504: idle district
506: system region
508: replace the district
410 (0)~410 (N): physical blocks
610 (0)~610 (H): logical blocks
710 (0)~710 (K): logic access address
900 (0)~900 (63): the physical page group
2000: the risk distance table
S1101, S1102: the step of setting the risk distance of physical page
S1201, S1203, S1205, S1207, S1209, S1211, S1213, S1215: carry out the step that writes instruction
Embodiment
Generally speaking, memorizer memory devices (also claim, memory storage system) comprises and can rewrite formula non-volatile memory module and controller (also title, control circuit).Usually memorizer memory devices is to use with host computer system, so that host computer system can write to data memorizer memory devices or reading out data from memorizer memory devices.
Figure 1A is that exemplary embodiment illustrates the host computer system of using memorizer memory devices according to the present invention.
Please refer to Figure 1A, host computer system 1000 generally comprises computing machine 1100 and I/O (input/output, I/O) device 1106.Computing machine 1100 comprises microprocessor 1102, random access memory (random access memory, RAM) 1104, system bus 1108, data transmission interface 1110 and in-building type storage device 1112.Input/output device 1106 comprises mouse 1202, keyboard 1204, the display 1206 and printer 1208 such as Figure 1B.It must be appreciated, the unrestricted input/output device 1106 of the device shown in Figure 1B, input/output device 1106 can also comprise other devices.
In embodiments of the present invention, memorizer memory devices 100 is to be electrically connected by data transmission interface 1110 other elements with host computer system 1000.Data can be write to memorizer memory devices 100 or reading out data from memorizer memory devices 100 by microprocessor 1102, random access memory 1104, input/output device 1106 with the running that is installed on the application program 1112a in the in-building type storage device 1112.For example, memorizer memory devices 100 can be the rewritten formula non-volatile memory storage device of portable disk 1212, storage card 1214 or solid state hard disc (Solid State Drive, SSD) 1216 etc. as shown in Figure 1B.
Generally speaking, host computer system 1000 can be any system that can cooperate with memorizer memory devices 100 with storage data substantially.Although in this exemplary embodiment, host computer system 1000 is to explain with computer system, yet host computer system 1000 can be the systems such as digital camera, video camera, communicator, reproducing apparatus for phonotape or video signal player in another exemplary embodiment of the present invention.For example, be digital camera (video camera) 1310 o'clock in host computer system, can rewrite formula non-volatile memory storage device and then be its employed SD card 1312, mmc card 1314, memory stick (memory stick) 1316, CF card 1318 or embedded storage device 1320 (shown in Fig. 1 C).Embedded storage device 1320 comprises embedded multi-media card (Embedded MMC, eMMC).It is worth mentioning that, embedded multi-media card is directly to be electrically connected on the substrate of host computer system.
Fig. 2 is the summary calcspar that illustrates the memorizer memory devices shown in Figure 1A.
Please refer to Fig. 2, memorizer memory devices 100 comprises connector 102, Memory Controller 104 and can rewrite formula non-volatile memory module 106.
In this exemplary embodiment, connector 102 is to be compatible to secure digital (Secure Digital, SD) interface standard.Yet, it must be appreciated, the invention is not restricted to this, connector 102 can also be to meet Institute of Electrical and Electric Engineers (Institute of Electrical and Electronic Engineers, IEEE) 1394 standards, parallel advanced annex (Parallel Advanced Technology Attachment, PATA) standard, high-speed peripheral component connecting interface (Peripheral Component InterconnectExpress, PCI Express) standard, universal serial bus (Universal Serial Bus, USB) standard, advanced annex (the Serial Advanced Technology Attachment of sequence, SATA) standard, memory stick (Memory Stick, MS) interface standard, Multi Media Card (Multi Media Card, MMC) interface standard, compact flash (Compact Flash, CF) interface standard, integrated driving electrical interface (Integrated Device Electronics, IDE) standard or other standards that is fit to.
Memory Controller 104 is in order to carrying out a plurality of logic gates or the steering order with hardware pattern or firmware pattern implementation, and carries out the runnings such as writing, read, wipe and merge of data in can rewriteeing formula non-volatile memory module 106 according to the instruction of host computer system 1000.
Can rewrite formula non-volatile memory module 106 is to be electrically connected to Memory Controller 104, and has the data that a plurality of physical blocks are write to store host computer system 1000.In this exemplary embodiment, each physical blocks has respectively a plurality of physical pages, and the physical page that wherein belongs to same physical blocks can be write independently and side by side be wiped.
In more detail, physical blocks is the least unit of wiping.That is each physical blocks contains the storage unit that is wiped free of in the lump of minimal amount.Physical page is the minimum unit of programming.That is, physical page is the minimum unit of new data more.Yet, it must be appreciated, in another exemplary embodiment of the present invention, more the least unit of new data can also be physical sector or other sizes.Each physical page generally includes data bit district and redundant digit district.The data bit district is in order to storing user's data, and the redundant digit district is in order to the data (for example, bug check and correcting code) of stocking system.
In this exemplary embodiment, can rewrite formula non-volatile memory module 106 and be multi-level cell memory (Multi Level Cell, MLC) NAND flash memory module.Yet, the invention is not restricted to this, also Complex Order storage unit (Trinary Level Cell, TLC) NAND type flash memory module or other have the memory module of identical characteristics can to rewrite formula non-volatile memory module 106.
Fig. 3 is the summary calcspar of the Memory Controller that illustrates according to an exemplary embodiment.It must be appreciated, the Memory Controller that Fig. 3 illustrates only is an example, the invention is not restricted to this.
Please refer to Fig. 3, Memory Controller 104 comprises memory management circuitry 302, host interface 304, memory interface 306, memory buffer 308, electric power management circuit 310, bug check and correcting circuit 312.
Memory management circuitry 302 is in order to the overall operation of control store controller 104.Specifically, memory management circuitry 302 has a plurality of steering orders, and when memorizer memory devices 100 running, these steering orders can be performed to carry out the runnings such as writing, read and wipe of data.
In this exemplary embodiment, the steering order of memory management circuitry 302 is to come implementation with the firmware pattern.For example, memory management circuitry 302 has microprocessor unit (not illustrating) and ROM (read-only memory) (not illustrating), and these steering orders are to be burned onto in this ROM (read-only memory).When memorizer memory devices 100 running, these steering orders can be carried out to carry out by microprocessor unit the runnings such as writing, read and wipe of data.
In another exemplary embodiment of the present invention, the steering order of memory management circuitry 302 can also the procedure code pattern be stored in the specific region (for example, being exclusively used in the system region of storage system data in the memory module) that can rewrite formula non-volatile memory module 106.In addition, memory management circuitry 302 has microprocessor unit (not illustrating), ROM (read-only memory) (not illustrating) and random access memory (not illustrating).Particularly, this ROM (read-only memory) has the code of driving, and when Memory Controller 104 was enabled, microprocessor unit can be carried out first this and drive the code section and will be stored in the random access memory that the steering order that can rewrite in the formula non-volatile memory module 106 is loaded into memory management circuitry 302.Afterwards, microprocessor unit can turn round these steering orders to carry out the runnings such as writing, read and wipe of data.
In addition, in another exemplary embodiment of the present invention, the steering order of memory management circuitry 302 can also a hardware pattern be come implementation.For example, memory management circuitry 302 comprises that microcontroller, Memory Management Unit, storer write unit, storer reading unit, memory erase unit and data processing unit.It is to be electrically connected to microcontroller that Memory Management Unit, storer write unit, storer reading unit, memory erase unit and data processing unit.Wherein, Memory Management Unit can rewrite the physical blocks of formula non-volatile memory module 106 in order to management; Storer writes the unit in order to assign and write instruction and can rewrite in the formula non-volatile memory module 106 so that data are write to rewriteeing formula non-volatile memory module 106; The storer reading unit is in order to assign reading command with reading out data from can rewrite formula non-volatile memory module 106 to rewriteeing formula non-volatile memory module 106; The memory erase unit is in order to assign erasing instruction so that data are wiped to rewriteeing formula non-volatile memory module 106 from can rewrite formula non-volatile memory module 106; And data processing unit wants to write to the data that can rewrite formula non-volatile memory module 106 and the data that read in order to processing from can rewrite formula non-volatile memory module 106.
Host interface 304 is instruction and the data that are electrically connected to memory management circuitry 302 and transmit in order to reception and identification host computer system 1000.In this exemplary embodiment, host interface 304 is to be compatible to the SD standard.Yet, it must be appreciated to the invention is not restricted to this, host interface 304 can also be to be compatible to PATA standard, IEEE 1394 standards, PCI Express standard, USB standard, SATA standard, MS standard, MMC standard, CF standard, IDE standard or other data transmission standards that is fit to.
Memory interface 306 is to be electrically connected to memory management circuitry 302 and can to rewrite formula non-volatile memory module 106 in order to access.That is to say, want to write to the data that can rewrite formula non-volatile memory module 106 and can be converted to via memory interface 306 and can rewrite 106 receptible forms of formula non-volatile memory module.
Memory buffer 308 is to be electrically connected to memory management circuitry 302 and in order to deposit the data and instruction that comes from host computer system 1000 or to come from the data that can rewrite formula non-volatile memory module 106.For example, memory buffer 302 can be static RAM, dynamic RAM etc.
Electric power management circuit 310 is to be electrically connected to memory management circuitry 302 and in order to the power supply of control store storage device 100.
Bug check and correcting circuit 312 are to be electrically connected to memory management circuitry 302 and in order to carry out an error-correcting routine to guarantee the correctness of data.Specifically, when host interface 304 receives main frame and writes instruction from host computer system 1000, bug check and correcting circuit can produce corresponding bug check and correcting code (ErrorChecking and Correcting Code for the data writing (also being called more new data) that corresponding this main frame writes instruction, ECC Code), and memory management circuitry 302 can with this more new data write to corresponding error-correcting code and can rewrite in the formula non-volatile memory module 106.Afterwards, when memory management circuitry 302 can read error-correcting code corresponding to these data during reading out data simultaneously from can rewrite formula non-volatile memory module 106, and bug check and correcting circuit 312 can be according to the data execution error correction program of this error-correcting code to reading.
Fig. 4 A and Fig. 4 B are the schematic diagram that can rewrite the physical blocks of formula non-volatile memory module according to a management that exemplary embodiment illustrates.
Please refer to Fig. 4 A, can rewrite formula non-volatile memory module 106 and have physical blocks 410 (0)~410 (N), and the memory management circuitry 302 of Memory Controller 104 can logically be grouped into physical blocks 410 (0)~410 (N) (or being assigned to) data field (data area) 502, idle district (sparearea) 504, system region (system area) 506 and replace district (replacement area) 508.
The physical blocks that belongs in logic data field 502 and idle district 504 is the data that come from host computer system 1000 in order to storage.Specifically, the physical blocks of data field 502 (also being called the data physical blocks) is to be regarded as the physical blocks of storage data, and the physical blocks (also being called idle physical blocks) in idle district 504 is the physical blocks that write new data.For example, when receiving from host computer system 1000 when writing instruction with the data wanting to write, memory management circuitry 302 can be from idle district 504 the extracts physical block, data that arrangement is wanted to write and data are write in the physical blocks of extracting.Again for example, when to a certain logical blocks executing data consolidation procedure, memory management circuitry 302 can be from idle district 504 the extracts physical block as the new data physical blocks of corresponding this logical blocks, from can rewrite formula non-volatile memory module 106, read the valid data that belong to this logical blocks, put these valid data in order, valid data after the arrangement are write in the new data physical blocks, and this logical blocks is remapped to the new data physical blocks.Particularly, after finishing the data consolidation procedure, the data physical blocks that memory management circuitry 302 can store invalid data again related (or recovery) to idle district 504, with as the usefulness that writes new data next time.For example, memory management circuitry 302 can be associated to idle district 504 o'clock in physical blocks and this physical blocks is carried out be wiped running or when physical blocks is extracted from idle district 504 this physical blocks carried out and wipe running, manages block so that the physical blocks of extracting from idle district 504 is the empty that can be used for data writing.
The physical blocks that belongs in logic system region 506 is in order to the register system data.For example, system data comprises physical page number about manufacturer and the model that can rewrite the formula non-volatile memory module, the physical blocks number that can rewrite the formula non-volatile memory module, each physical blocks etc.
Belonging in logic the physical blocks that replaces in the district 508 is to replace program for bad physical blocks, with replacing damaged physical blocks.Specifically, if when replacing the physical blocks damage that still has normal physical blocks and data field 502 in the district 508, memory management circuitry 302 can be extracted the physical blocks that normal physical blocks is changed damage from replace district 508.
Based on above-mentioned, in the running of memorizer memory devices 100, data field 502, idle district 504, system region 506 can dynamically change with the physical blocks that replaces district 508.For example, the physical blocks in order to the storage data of rotating can belong to data field 502 or idle district 504 with changing.
It is worth mentioning that, in this exemplary embodiment, memory management circuitry 302 is to manage take each physical blocks as unit.Yet, the invention is not restricted to this, in another exemplary embodiment, memory management circuitry 302 also can be grouped into physical blocks a plurality of physical locations, and manages take physical location as unit.For example, each physical location can be comprised of at least one physical blocks in same memory chip (die) or the different memory chip.
Please refer to Fig. 4 B, memory management circuitry 302 can configuration logic blocks 610 (0)~610 (H) with the physical blocks in mapping (enum) data district 502, wherein each logical blocks has a plurality of logical page (LPAGE)s and these logical page (LPAGE)s are the physical pages of data physical blocks corresponding to mapping.For example, when memorizer memory devices 100 was formatted, logical blocks 610 (0)~610 (H) is the physical blocks 410 (0)~410 (F-1) in mapping (enum) data district 502 initially.
In exemplary embodiment of the present invention, memory management circuitry 302 meeting service logic block-physical blocks mapping tables (logical block-physical block mapping table) are with the mapping relations between the physical blocks of record logical blocks 610 (0)~610 (H) and data field 502.In addition, host computer system 1000 is to come access data take the logic access address as unit.For example, a logic access address is a logic sector (Sector).When host computer system 1000 access data, memory management circuitry 302 can convert the logic access address 710 (0)~710 (K) of corresponding stored device storage device 100 to the address in the corresponding logical page (LPAGE).For example, when host computer system 1000 is wanted a certain logic of access access address, memory management circuitry 302 can be converted to the logic access address of 1000 accesses of host computer system the multi-dimensional address that logical blocks, logical page (LPAGE) and logic skew (offset) with correspondence are consisted of, and by logical blocks-physical blocks mapping table access data in the physical page of correspondence.At this, skew is a logic (or physics) address that is positioned in the logical page (LPAGE) (or physical page), it is to define the therewith distance between the start address of logical page (LPAGE) (or physical page) of logic (or physics) address for this reason, and wherein this logic (or physics) address also is called logic (physics) offset address.
Fig. 5~Fig. 7 writes the more example of new data according to what an exemplary embodiment illustrated with the muon physics block.
Please be simultaneously with reference to Fig. 5~Fig. 7, for example, to map under the mapping status of physical blocks 410 (0) in logical blocks 610 (0), write instruction and want data writing when belonging to the logical page (LPAGE) of logical blocks 610 (0) when Memory Controller 104 receives from host computer system 1000, memory management circuitry 302 can be to map to physical blocks 410 (0) and extracts physical block 410 (F) physical blocks 410 (0) of rotating from idle district 504 according to logical blocks-physical blocks mapping table recognition logic block 610 (0) at present.Yet when new data write to physical blocks 410 (F), Memory Controller 104 can not moved all valid data in the physical blocks 410 (0) to physical blocks 410 (F) at once and wipe physical blocks 410 (0).Specifically, memory management circuitry 302 can read from physical blocks 410 (0) wants to write physical page valid data before (namely, the 0th physical page of physical blocks 410 (0) and the data in the 1st physical page), write in the 0th physical page of physical blocks 410 (F) and the 1st physical page (as shown in Figure 5) wanting to write valid data before the physical page in the physical blocks 410 (0), and new data is write in the 2nd~4 physical page of physical blocks 410 (F) (as shown in Figure 6).At this moment, memory management circuitry 302 is namely finished the running that writes.Because the valid data in the physical blocks 410 (0) might be in next operation (for example, write instruction) in become invalidly, therefore at once the valid data in the physical blocks 410 (0) are moved to physical blocks 410 (F) and may be caused meaningless moving.In addition, data must write to the physical page in the physical blocks in order, that is, physical page needs sequentially to be programmed according to its numbering.For example, if when only the programming of the 2nd physical page not being programmed to the 0th and 1 physical page, afterwards, the 0th and 1 physical page then can't be programmed again.Therefore, memory management circuitry 302 only can be moved first and want to write physical page valid data before (namely, be stored in data in the 0th physical page of physical blocks 410 (0) and the 1st physical page), and wouldn't move all the other valid data (that is, being stored in data in the 5th~K physical page of physical blocks 410 (0)).
In this exemplary embodiment, the running of temporarily keeping these transient state relations is called unlatching (open) mother and child blocks, and the original physical block (for example, above-mentioned physical blocks 410 (0)) is called parent substance reason block and is called the muon physics block in order to the physical blocks (for example, above-mentioned and physical blocks 410 (F)) of replacing parent substance reason block.
Afterwards, in the time the data of physical blocks 410 (0) and physical blocks 410 (F) need to being merged (merge), memory management circuitry 302 can be whole and to a physical blocks with the data of physical blocks 410 (F) with physical blocks 410 (0), promotes thus the service efficiency of physical blocks.At this, the running that merges mother and child blocks is called the data consolidation procedure or closes (close) mother and child blocks.
For example, as shown in Figure 7, when closing mother and child blocks, memory management circuitry 302 can read remaining valid data (namely from physical blocks 410 (0), data in the 5th~K physical page of physical blocks 410 (0)), remaining valid data in the physical blocks 410 (0) are write in the 5th physical page of physical blocks 410 (F)~K physical page, physical blocks 410 (0) is carried out erase operation, the physical blocks 410 (0) after wiping is associated to idle district 504 and physical blocks 410 (F) is associated to data field 502.That is to say, memory management circuitry 302 can remap logical blocks 610 (0) to physical blocks 410 (F) in logical blocks-physical blocks mapping table.
In addition, in this exemplary embodiment, memory management circuitry 302 can be set up idle district's physical blocks table (not illustrating) and record the physical blocks that is associated at present idle district 504.It is worth mentioning that, the number of physical blocks is limited in the idle district 504, base this, during memorizer memory devices 100 runnings, the number of the mother and child blocks group of having opened also can be restricted.Therefore, when memorizer memory devices 100 receive come from host computer system 1000 write instruction the time, reach in limited time if opened the number of mother and child blocks group, memory management circuitry 302 need be closed and just can be carried out this after at least one group of mother and child blocks group of having opened at present and write instruction.
Write more the new data with the muon physics block except above-mentioned, in this exemplary embodiment, memory management circuitry 302 also can be extracted at least one physical blocks as chaotic (Random) physical blocks, to write more new data from idle district 504.
Fig. 8 is the example schematic of the chaotic physical blocks data writing of use that illustrates according to the first exemplary embodiment.
Please refer to Fig. 8, suppose that physical blocks 410 (S-1) is extracted as chaotic physical blocks and under storing state shown in Figure 6 when host computer system 1000 wants to write new data more to the 1st logical page (LPAGE) of logical blocks 610 (0), memory management circuitry 302 can with this more new data write in first empty physical page in the chaotic physical blocks (for example, the 0th physical page of physical blocks 410 (S-1)).
In this exemplary embodiment, when present employed chaotic physical blocks has been fully written, memory management circuitry 302 can be extracted another physical blocks as new chaotic physical blocks again from idle district 504, until reach preset value as the number of the physical blocks of chaotic physical blocks.Specifically, the physical blocks in idle district 504 is limited, therefore, also can be restricted as the number of the physical blocks of chaotic physical blocks.When the number as the physical blocks of chaotic physical blocks reaches preset value, memory management circuitry 302 can be carried out above-mentioned data consolidation procedure, and the chaotic physical blocks that stored data are all invalid data is carried out the physical blocks of wiping running and will wipe and is associated to idle district 504.Thus, when the execution next one write instruction, memory management circuitry 302 just can be extracted empty physical blocks as chaotic physical blocks from idle district 504 again.
It is worth mentioning that, although Fig. 8 is the data with the logical page (LPAGE) that upgrades when host computer system 1000 wishs when being written into the muon physics block, with this more the new data example that can write to chaotic physical blocks explain, but the use-pattern of chaotic physical blocks is not limited to this.For example, in another exemplary embodiment of the present invention, memory management circuitry 302 also can directly directly write to first chaotic physical blocks with the more new data that comes from host computer system 1000, and the valid data that will belong to afterwards, same logical blocks are incorporated into from the empty reason block that idle district 504 extracts.
As mentioned above, can rewrite formula non-volatile memory module 106 and be MLC NAND type flash memory module.Specifically, each storage unit of MLC NAND type flash memory module can store 2 bit data (that is, " 11 ", " 10 ", " 00 " with " 01 ").The base this, can divide into 2 stages to writing of MLC NAND type storage unit flash memory module.Phase one is writing of lower physical page (lower physical page), and subordinate phase is write (shown in Fig. 9 A) of upper physical page (upper physicalpage), wherein descend the writing speed of physical page faster than upper physical page and when lower physical page is not programmed, can't only programme to upper physical page.Therefore, the physical page of each physical blocks of MLC NAND type flash memory module can be divided at a slow speed physical page (that is, upper physical page) and the rapid physical page (that is, lower physical page).Particularly, compared to upper physical page, the storage fiduciary level of lower physical page is higher.Similarly, in TLC NAND type flash memory module, the physical page that storage unit can store 3 bit data and each physical blocks can be divided at a slow speed physical page (namely, upper physical page), the middling speed physical page (namely, middle physical page) with the rapid physical page (that is, lower physical page).At this, the physical page that writing speed is the fastest is called lower physical page, and the slower physical page of other writing speeds is referred to as physical page (that is, upper physical page and middle physical page).
Fig. 9 B is the example schematic of the physical page of the physical blocks that illustrates according to an exemplary embodiment, and it illustrates physical page configuration of the physical blocks of MLC NAND type flash memory module.
Please refer to Fig. 9 B, physical blocks has 127 physical pages and these physical pages can be grouped into the physical page group 900 (0)~900 (63) of sequentially arranging, and wherein each physical page group is comprised of a upper physical page and a lower physical page.For example, physical page group 900 (0) (that is, the first physical page group) is comprised of the 0th physical page and the 4th physical page; Physical page group 900 (1) (that is, the second physical page group) is comprised of the 1st physical page and the 5th physical page; Physical page group 900 (2) (that is, the 3rd physical page group) is comprised of the 2nd physical page and the 8th physical page; Physical page group 900 (3) (that is, the 4th physical page group) is comprised of the 3rd physical page and the 9th physical page; Physical page group 900 (4) (that is, the 5th physical page group) is comprised of the 6th physical page and the 12nd physical page; Physical page group 900 (5) (that is, the 6th physical page group) is comprised of the 7th physical page and the 13rd physical page; Physical page group 900 (6) (that is, the 7th physical page group) is comprised of the 10th physical page and the 16th physical page; Physical page group 900 (7) (that is, the 8th physical page group) is comprised of the 11st physical page and the 17th physical page; Physical page group 900 (8) (that is, the 9th physical page group) is comprised of the 14th physical page and the 20th physical page; ... by that analogy.
It is worth mentioning that, the physical page of a physical page group is comprised of same group of storage unit, and upper physical page is just can be programmed (shown in Fig. 9 A) after lower physical page is finished programming, therefore, if when misprogrammed occurs upper physical page, therefore the data that have been stored on the lower physical page may be lost.
Lose because of the misprogrammed of upper physical page for fear of the data that are stored in lower physical page, in this exemplary embodiment, whenever application program 1112a begins to upgrade to a document or writes fashionable, but memory management circuitry 302 can be according to logical blocks-physical blocks mapping table and physical page mapping information identification next one writing address (hereinafter referred to as the predetermined physical page) thereof, judge the risk distance of corresponding this predetermined physical page, according to this risk distance select another physical page (hereinafter referred to as safe physical page) and more new data write in the safe physical page.Afterwards, belong to the continuing more during new data of same document when application program 1112a continue to transmit, memory management circuitry 302 can continue to write follow-up renewal in the physical page of safe physical page that continues.Specifically, when a document being begun to upgrade or writing fashionablely, memory management circuitry 202 can be skipped the physical page of part and programme according to the risk distance of correspondence, avoids thus losing when misprogrammed occurs the previous document that has stored.
For example, memory management circuitry 202 can be set up the risk distance table to record the risk distance of corresponding each physical page.For example, memory management circuitry 202 can be with the risk distance table record in the physical blocks of system region 506, and memory management circuitry 202 can be loaded into memory buffer 308 with the risk distance table when memorizer memory devices 100 starts, in order to rapidly inquiry.
Figure 10 is the example schematic of risk distance table of the physical page of the physical blocks of correspondence that illustrates according to this exemplary embodiment.
Please refer to Figure 10, risk distance table 2000 comprises physical page number field, safe physical page number field and risk distance field.
The physical page number field is the numbering of record physical page, and safe physical page number field records the safe physical page of the physical page of corresponding physics page number field.For example, when wish is programmed to the 0th physical page, because therefore this physical blocks storage data not, directly can programme to the 0th physical page, and can not affect the data that have been written into because of misprogrammed.Again for example, when wish was programmed to the 4th physical page, owing to the 0th physical page storage data, therefore, superimpose data write to the 6th physical page, just can not affect the data that before have been written into because of misprogrammed.That is to say, when data writing in a corresponding safe physical page of physical page, the data that before had been stored in this physical page physical page before can be guaranteed can not lose because of misprogrammed.It must be appreciated, the corresponding safe physical page of each physical page can be according to different rewritten formula non-volatile memory module and is different, and Figure 10 only is an example.
The risk distance field is the physical page of the corresponding physics page number field of record and the distance between its safe physical page.At this, so-called distance refers to the difference calculated according to the numbering of two physical pages.For example, the risk distance of the lower physical page of the first physical page group can be set to 0; The risk distance of the upper physical page of the first physical page group can be set to 2; The risk distance of the lower physical page of the second physical page group can be set to 0; The risk distance of the upper physical page of the second physical page group can be set to 1; The risk distance of the lower physical page of the 3rd physical page group can be set to 0; The risk distance of the upper physical page of the 3rd physical page group can be set to 2; The risk distance of the lower physical page of the 4th physical page group can be set to 0; The risk distance of the upper physical page of the 4th physical page group can be set to 1; The risk distance of the lower physical page of the 5th physical page group can be set to 0; The risk distance of the upper physical page of the 5th physical page group can be set to 2; The risk distance of the lower physical page of the 6th physical page group can be set to 3; The risk distance of the upper physical page of the 6th physical page group can be set to 1; ... by that analogy.
In this exemplary embodiment, be stored in the document in the memorizer memory devices 100 or write new document to the memorizer memory devices 100 time whenever application program 1112a wish begins to upgrade, application program 1112a can transmit a safety and write instruction to memorizer memory devices 100.Particularly, memory management circuitry 302 can write safely that instruction record in memory buffer 308 that a safety writes sign (flag) and this is write safely according to this and indicate and be set as starting state.For example, memory management circuitry 302 can be set as ' 1 ' with this value that writes safely sign, with the expression starting state, but it must be appreciated, the invention is not restricted to this.Afterwards, when first that receives after safety writes instruction writes instruction and data when (also being called more new data), memory management circuitry 302 can according to risk distance table 2000 skip corresponding risk distance more new data write in the corresponding safe physical page, and this writes safely sign and is set as illegal state (for example, this value that writes safely sign being set as ' 0 ') with institute's record.Afterwards, if do not write and continue to receive under the instruction when writing instruction receiving safety, memory management circuitry 302 can be continued into data by the physical page relaying after this safe physical page that continues.Specifically, do not write instruction and continue transmission when writing instruction if application program 1112a transmits safety, the more new data that expression receives is to belong to same document, and when misprogrammed occured, host computer system 1000 can write this document again.Therefore, memory management circuitry 302 can directly write to follow-up data follow-up physical page, and need not consider the problem that the data that before stored can be lost because of misprogrammed.
Figure 11 is the process flow diagram of the setting risk distance that illustrates of the method for writing data according to this exemplary embodiment.
Please refer to Figure 11, in step S1101, memory management circuitry 302 can be set according to the configuration information that can rewrite formula non-volatile memory module 106 the safe physical page of each physical page of corresponding each physical page group.
Afterwards, in step S1103, memory management circuitry 302 can be calculated according to the safe physical page of corresponding each physical page the risk distance of each physical page.For example, as shown in figure 10, memory management circuitry 202 can be set as the risk distance of the lower physical page of the first physical page group the distance between the lower physical page of the lower physical page of the first physical page group and the first physical page group; The risk distance of the upper physical page of the first physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and the first physical page group; The risk distance of the lower physical page of the second physical page group is set as the distance between the lower physical page of the lower physical page of the second physical page group and the second physical page group; The risk distance of the upper physical page of the second physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and this second physical page group; The risk distance of the lower physical page of the 3rd physical page group is set as the distance between the lower physical page of the lower physical page of the 3rd physical page group and the 3rd physical page group; The risk distance of the upper physical page of the 3rd physical page group is set as the distance between the upper physical page of the lower physical page of the 7th physical page group and the 3rd physical page group; The risk distance of the lower physical page of the 4th physical page group is set as the distance between the lower physical page of the lower physical page of the 4th physical page group and the 4th physical page group; The risk distance of the upper physical page of the 4th physical page group is set as the distance between the upper physical page of the lower physical page of the 7th physical page group and the 4th physical page group; The risk distance of the lower physical page of the 5th physical page group is set as the distance between the lower physical page of the lower physical page of the 5th physical page group and the 5th physical page group; The risk distance of the upper physical page of the 5th physical page group is set as the distance between the upper physical page of the lower physical page of the 9th physical page group and the 5th physical page group; The risk distance of the lower physical page of the 6th physical page group is set as the distance between the lower physical page of the lower physical page of the 7th physical page group and the 6th physical page group; The risk distance of the upper physical page of the 6th physical page group is set as the distance between the upper physical page of the lower physical page of the 9th physical page group and the 6th physical page group; ... by that analogy.
Figure 12 is the process flow diagram that execution that the method for writing data according to this exemplary embodiment illustrates writes instruction.
Please refer to Figure 12, in step S1201, memory management circuitry 302 meetings reception one from host computer system 1000 writes instruction and corresponding this writes the more new data of instruction, and in step S1203, memory management circuitry 302 can judge that the instruction that writes that receives writes instruction or generally writes instruction for safety from host computer system 1000.
If the instruction that writes that receives from host computer system 1000 is when writing instruction safely, in step S1205, memory management circuitry 302 can write safety sign and be set as starting state, writes safely instruction to respond this.
If write instruction when generally writing instruction from what host computer system 1000 received, in step S1207, memory management circuitry 302 can identification want to write this more predetermined physical page of new data.
Specifically, in step S1207, memory management circuitry 302 can want to write this more target physical block of new data according to logical blocks-physical blocks mapping table identification, for example, and the muon physics block shown in Fig. 5~7 or chaotic physical blocks as shown in Figure 8.And, can be used for writing this more physical page of new data (that is, the predetermined physical page) according to the physical page mapping information identification of present physical blocks.
Afterwards, in step S1209, memory management circuitry 302 can judge that safety writes sign and whether is set to starting state.
If safety writes when sign is non-to be set to starting state (that is, being set to illegal state), in step S1211, memory management circuitry 302 more new data writes in the predetermined physical page of identifying, and generally writes instruction to respond this.
Indicate when being set to starting state if this writes safely, in step S1213, memory management circuitry 302 can determine safe physical page according to the risk distance of the predetermined physical page.For example, memory management circuitry 302 can add that the risk distance of the predetermined physical page obtains safe physical page with the page number of the predetermined physical page.
Afterwards, in step S1215, memory management circuitry 302 more new data writes in the safe physical page, generally writes instruction to respond this, and safety is write sign is reset to illegal state.
In sum, the method for writing data of exemplary embodiment, Memory Controller and memorizer memory devices according to the present invention, when begin to a document write or when upgrading, safe physical page can according to original risk distance of wanting to write physical page of setting decide and the data that belong to this document from then on safe physical page begin to be written into, can effectively avoid thus when misprogrammed occurs, loss has been stored in the data that belong to other documents in the physical blocks.
Although the present invention discloses as above with embodiment; so it is not to limit the present invention, those skilled in the art, under the premise without departing from the spirit and scope of the present invention; can do some changes and retouching, therefore protection scope of the present invention is to be as the criterion with claim of the present invention.

Claims (18)

1. method for writing data, be used for data are write to a physical blocks that can rewrite the formula non-volatile memory module, this physical blocks has a plurality of physical page groups, each described physical page group has a plurality of physical pages, the physical page of each described physical page group comprises physical page on the physical page and, data writing to the speed of described lower physical page faster than the speed of data writing to described upper physical page, this method for writing data comprises:
Set the risk distance of each described physical page of corresponding each described physical page group;
Reception one writes safely instruction and writes safely sign with one and is set as a starting state, writes safely instruction to respond this;
Receive one write instruction with to writing a new data more of instruction;
Identify the predetermined physical page among the physical page of these physical page groups;
Judge that this writes safely sign and whether is set to this starting state;
If writing safely, this indicates when being set to this starting state, with this more new data write in the safe physical page among these physical pages of these physical page groups, write instruction to respond this, and this is write safely sign is reset to an illegal state, wherein in this physical blocks one between this safe physical page and this predetermined physical page apart from equaling this risk distance that should the predetermined physical page; And
If it is non-when being set to this starting state that this writes safely sign, with this more new data write in this predetermined physical page among these physical pages, write instruction to respond this.
2. method for writing data as claimed in claim 1, wherein said physical page group comprises one first physical page group, one second physical page group, one the 3rd physical page group, one the 4th physical page group, one the 5th physical page group, one the 6th physical page group and one the 7th physical page group
Wherein the step of the risk distance of each described physical page of corresponding each the described physical page group of setting comprises:
The risk distance of the lower physical page of this first physical page group is set as the distance between the lower physical page of the lower physical page of this first physical page group and this first physical page group;
The risk distance of the upper physical page of this first physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and this first physical page group;
The risk distance of the lower physical page of this second physical page group is set as the distance between the lower physical page of the lower physical page of this second physical page group and this second physical page group;
The risk distance of the upper physical page of this second physical page group is set as the distance between the upper physical page of the lower physical page of the 5th physical page group and this second physical page group;
The risk distance of the lower physical page of the 3rd physical page group is set as the distance between the lower physical page of the lower physical page of the 3rd physical page group and the 3rd physical page group;
The risk distance of the upper physical page of the 3rd physical page group is set as the distance between the upper physical page of the lower physical page of the 7th physical page group and the 3rd physical page group;
The risk distance of the lower physical page of the 4th physical page group is set as the distance between the lower physical page of the lower physical page of the 4th physical page group and the 4th physical page group; And
The risk distance of the upper physical page of the 4th physical page group is set as the distance between the upper physical page of the lower physical page of the 7th physical page group and the 4th physical page group.
3. method for writing data as claimed in claim 1, wherein said physical page group comprises one the 5th physical page group, one the 6th physical page group, one the 7th physical page group, one the 8th physical page group and one the 9th physical page group,
Wherein the step of the risk distance of each described physical page of corresponding each the described physical page group of setting comprises:
The risk distance of the lower physical page of the 5th physical page group is set as the distance between the lower physical page of the lower physical page of the 5th physical page group and the 5th physical page group;
The risk distance of the upper physical page of the 5th physical page group is set as the distance between the upper physical page of the lower physical page of the 9th physical page group and the 5th physical page group;
The risk distance of the lower physical page of the 6th physical page group is set as the distance between the lower physical page of the lower physical page of the 7th physical page group and the 6th physical page group; And
The risk distance of the upper physical page of the 6th physical page group is set as the distance between the upper physical page of the lower physical page of the 9th physical page group and the 6th physical page group.
4. method for writing data as claimed in claim 1, wherein said physical page group comprises one first physical page group, one second physical page group, one the 3rd physical page group and one the 4th physical page group,
Wherein the step of the risk distance of each described physical page of corresponding each the described physical page group of setting comprises:
The risk distance of the lower physical page of this first physical page group is set as 0;
The risk distance of the upper physical page of this first physical page group is set as 2;
The risk distance of the lower physical page of this second physical page group is set as 0;
The risk distance of the upper physical page of this second physical page group is set as 1;
The risk distance of the lower physical page of the 3rd physical page group is set as 0;
The risk distance of the upper physical page of the 3rd physical page group is set as 2;
The risk distance of the lower physical page of the 4th physical page group is set as 0; And
The risk distance of the upper physical page of the 4th physical page group is set as 1.
5. method for writing data as claimed in claim 4, wherein said physical page group also comprises one the 5th physical page group and one the 6th physical page group,
Wherein the step of the risk distance of each described physical page of corresponding each the described physical page group of setting comprises:
The risk distance of the lower physical page of the 5th physical page group is set as 0;
The risk distance of the upper physical page of the 5th physical page group is set as 2;
The risk distance of the lower physical page of the 6th physical page group is set as 3; And
The risk distance of the upper physical page of the 6th physical page group is set as 1.
6. method for writing data as claimed in claim 1 also comprises:
Set up a risk distance table, and in this risk distance table, record the risk distance of each described physical page of corresponding each described physical page group.
7. Memory Controller, be used for control one and can rewrite the formula non-volatile memory module, wherein this can rewrite the formula non-volatile memory module and has a plurality of physical blocks, each described physical blocks has a plurality of physical page groups, each described physical page group has a plurality of physical pages, the physical page of each described physical page group comprises physical page on the physical page and, data writing to the speed of described lower physical page faster than the speed of data writing to described upper physical page, this Memory Controller comprises:
One host interface is in order to be electrically connected to a host computer system;
One memory interface can rewrite the formula non-volatile memory module in order to be electrically connected to this; And
One memory management circuitry is electrically connected to this host interface and this memory interface, and in order to the risk distance of each described physical page of the physical page group of setting corresponding these physical blocks,
Wherein this memory management circuitry reception one writes safely instruction and writes safely sign with one and is set as a starting state, writes safely instruction to respond this,
Wherein this memory management circuitry receive one write instruction with to should writing a new data more of instruction, and identify the predetermined physical page among the physical page of physical page group of the target physical block among these physical blocks,
Wherein this memory management circuitry judges that this writes safely sign and whether is set to this starting state,
If wherein this writes safely and indicates when being set to this starting state, this memory management circuitry with this more new data write in the safe physical page among the physical page of physical page group of this target physical block, write instruction to respond this, and this is write safely sign be reset to an illegal state
If wherein this to write safely sign non-when being set to this starting state, this memory management circuitry with this more new data write in this predetermined physical page, write instruction to respond this,
Wherein one between this safe physical page and this predetermined physical page distance equals this risk distance that should the predetermined physical page in this target physical block.
8. Memory Controller as claimed in claim 7, wherein the physical page group of this target physical block comprises one first physical page group, one second physical page group, one the 3rd physical page group, one the 4th physical page group, one the 5th physical page group, one the 6th physical page group and one the 7th physical page group
Wherein this memory management circuitry is set as the risk distance of the lower physical page of this first physical page group the distance between the lower physical page of the lower physical page of this first physical page group and this first physical page group,
Wherein this memory management circuitry is set as the risk distance of the upper physical page of this first physical page group the distance between the upper physical page of the lower physical page of the 5th physical page group and this first physical page group,
Wherein this memory management circuitry is set as the risk distance of the lower physical page of this second physical page group the distance between the lower physical page of the lower physical page of this second physical page group and this second physical page group,
Wherein this memory management circuitry is set as the risk distance of the upper physical page of this second physical page group the distance between the upper physical page of the lower physical page of the 5th physical page group and this second physical page group,
Wherein this memory management circuitry is set as the risk distance of the lower physical page of the 3rd physical page group the distance between the lower physical page of the lower physical page of the 3rd physical page group and the 3rd physical page group,
Wherein this memory management circuitry is set as the risk distance of the upper physical page of the 3rd physical page group the distance between the upper physical page of the lower physical page of the 7th physical page group and the 3rd physical page group,
Wherein this memory management circuitry is set as the risk distance of the lower physical page of the 4th physical page group the distance between the lower physical page of the lower physical page of the 4th physical page group and the 4th physical page group,
Wherein this memory management circuitry is set as the risk distance of the upper physical page of the 4th physical page group the distance between the upper physical page of the lower physical page of the 7th physical page group and the 4th physical page group.
9. Memory Controller as claimed in claim 7, wherein the physical page group of this target physical block comprises one the 5th physical page group, one the 6th physical page group, one the 7th physical page group, one the 8th physical page group and one the 9th physical page group,
Wherein this memory management circuitry is set as the risk distance of the lower physical page of the 5th physical page group the distance between the lower physical page of the lower physical page of the 5th physical page group and the 5th physical page group,
Wherein this memory management circuitry is set as the risk distance of the upper physical page of the 5th physical page group the distance between the upper physical page of the lower physical page of the 9th physical page group and the 5th physical page group,
Wherein this memory management circuitry is set as the risk distance of the lower physical page of the 6th physical page group the distance between the lower physical page of the lower physical page of the 7th physical page group and the 6th physical page group,
Wherein this memory management circuitry is set as the risk distance of the upper physical page of the 6th physical page group the distance between the upper physical page of the lower physical page of the 9th physical page group and the 6th physical page group.
10. Memory Controller as claimed in claim 7, wherein the physical page group of this target physical block comprises one first physical page group, one second physical page group, one the 3rd physical page group and one the 4th physical page group,
Wherein this memory management circuitry is set as 0 with the risk distance of the lower physical page of this first physical page group, the risk distance of the upper physical page of this first physical page group is set as 2, the risk distance of the lower physical page of this second physical page group is set as 0, the risk distance of the upper physical page of this second physical page group is set as 1, the risk distance of the lower physical page of the 3rd physical page group is set as 0, the risk distance of the upper physical page of the 3rd physical page group is set as 2, the risk distance of the lower physical page of the 4th physical page group is set as 0, and the risk distance of the upper physical page of the 4th physical page group is set as 1.
11. Memory Controller as claimed in claim 10, wherein the physical page group of this target physical block also comprises one the 5th physical page group and one the 6th physical page group,
Wherein this memory management circuitry is set as 0 with the risk distance of the lower physical page of the 5th physical page group, the risk distance of the upper physical page of the 5th physical page group is set as 2, the risk distance of the lower physical page of the 6th physical page group is set as 3, and the risk distance of the upper physical page of the 6th physical page group is set as 1.
12. Memory Controller as claimed in claim 7, wherein this memory management circuitry is more in order to setting up a risk distance table, and in this risk distance table the risk distance of each described physical page of the physical page group of corresponding these physical blocks of record.
13. a memorizer memory devices comprises:
One can rewrite the formula non-volatile memory module, have a plurality of physical blocks, wherein each described physical blocks has a plurality of physical page groups, each described physical page group has a plurality of physical pages, the physical page of each described physical page group comprises physical page on the physical page and, data writing to the speed of described lower physical page faster than the speed of data writing to described upper physical page;
A connector is in order to be electrically connected to a host computer system; And
One Memory Controller is electrically connected to this and can rewrites formula non-volatile memory module and this connector, in order to the risk distance of each described physical page of the physical page group of setting corresponding these physical blocks,
Wherein this Memory Controller reception one writes safely instruction and writes safely sign with one and is set as a starting state, writes safely instruction to respond this,
Wherein this Memory Controller receive one write instruction with to should writing a new data more of instruction, and identify the predetermined physical page among the physical page of physical page group of the target physical block among these physical blocks,
Wherein this Memory Controller judges that this writes safely sign and whether is set to this starting state,
If wherein this writes safely and indicates when being set to this starting state, this Memory Controller with this more new data write in the safe physical page among the physical page of physical page group of this target physical block, write instruction to respond this, and this is write safely sign be reset to an illegal state
If wherein this to write safely sign non-when being set to this starting state, this Memory Controller with this more new data write in this predetermined physical page, write instruction to respond this,
Wherein one between this safe physical page and this predetermined physical page distance equals this risk distance that should the predetermined physical page in this target physical block.
14. memorizer memory devices as claimed in claim 13, wherein the physical page group of this target physical block comprises one first physical page group, one second physical page group, one the 3rd physical page group, one the 4th physical page group, one the 5th physical page group, one the 6th physical page group and one the 7th physical page group
Wherein this Memory Controller is set as the risk distance of the lower physical page of this first physical page group the distance between the lower physical page of the lower physical page of this first physical page group and this first physical page group,
Wherein this Memory Controller is set as the risk distance of the upper physical page of this first physical page group the distance between the upper physical page of the lower physical page of the 5th physical page group and this first physical page group,
Wherein this Memory Controller is set as the risk distance of the lower physical page of this second physical page group the distance between the lower physical page of the lower physical page of this second physical page group and this second physical page group,
Wherein this Memory Controller is set as the risk distance of the upper physical page of this second physical page group the distance between the upper physical page of the lower physical page of the 5th physical page group and this second physical page group,
Wherein this Memory Controller is set as the risk distance of the lower physical page of the 3rd physical page group the distance between the lower physical page of the lower physical page of the 3rd physical page group and the 3rd physical page group,
Wherein this Memory Controller is set as the risk distance of the upper physical page of the 3rd physical page group the distance between the upper physical page of the lower physical page of the 7th physical page group and the 3rd physical page group,
Wherein this Memory Controller is set as the risk distance of the lower physical page of the 4th physical page group the distance between the lower physical page of the lower physical page of the 4th physical page group and the 4th physical page group,
Wherein this Memory Controller is set as the risk distance of the upper physical page of the 4th physical page group the distance between the upper physical page of the lower physical page of the 7th physical page group and the 4th physical page group.
15. memorizer memory devices as claimed in claim 13, wherein the physical page group of this target physical block comprises one the 5th physical page group, one the 6th physical page group, one the 7th physical page group, one the 8th physical page group and one the 9th physical page group,
Wherein this Memory Controller is set as the risk distance of the lower physical page of the 5th physical page group the distance between the lower physical page of the lower physical page of the 5th physical page group and the 5th physical page group,
Wherein this Memory Controller is set as the risk distance of the upper physical page of the 5th physical page group the distance between the upper physical page of the lower physical page of the 9th physical page group and the 5th physical page group,
Wherein this Memory Controller is set as the risk distance of the lower physical page of the 6th physical page group the distance between the lower physical page of the lower physical page of the 7th physical page group and the 6th physical page group,
Wherein this Memory Controller is set as the risk distance of the upper physical page of the 6th physical page group the distance between the upper physical page of the lower physical page of the 9th physical page group and the 6th physical page group.
16. memorizer memory devices as claimed in claim 13, wherein the physical page group of this target physical block comprises one first physical page group, one second physical page group, one the 3rd physical page group and one the 4th physical page group,
Wherein this Memory Controller is set as 0 with the risk distance of the lower physical page of this first physical page group, the risk distance of the upper physical page of this first physical page group is set as 2, the risk distance of the lower physical page of this second physical page group is set as 0, the risk distance of the upper physical page of this second physical page group is set as 1, the risk distance of the lower physical page of the 3rd physical page group is set as 0, the risk distance of the upper physical page of the 3rd physical page group is set as 2, the risk distance of the lower physical page of the 4th physical page group is set as 0, and the risk distance of the upper physical page of the 4th physical page group is set as 1.
17. memorizer memory devices as claimed in claim 16, wherein the physical page group of this target physical block also comprises one the 5th physical page group and one the 6th physical page group,
Wherein this Memory Controller is set as 0 with the risk distance of the lower physical page of the 5th physical page group, the risk distance of the upper physical page of the 5th physical page group is set as 2, the risk distance of the lower physical page of the 6th physical page group is set as 3, and the risk distance of the upper physical page of the 6th physical page group is set as 1.
18. memorizer memory devices as claimed in claim 13, wherein this Memory Controller is also in order to setting up a risk distance table, and in this risk distance table the risk distance of each described physical page of the physical page group of corresponding these physical blocks of record.
CN201210079296.1A 2012-03-23 2012-03-23 Method for writing data, Memory Controller and memorizer memory devices Active CN103324580B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210079296.1A CN103324580B (en) 2012-03-23 2012-03-23 Method for writing data, Memory Controller and memorizer memory devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210079296.1A CN103324580B (en) 2012-03-23 2012-03-23 Method for writing data, Memory Controller and memorizer memory devices

Publications (2)

Publication Number Publication Date
CN103324580A true CN103324580A (en) 2013-09-25
CN103324580B CN103324580B (en) 2016-03-16

Family

ID=49193339

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210079296.1A Active CN103324580B (en) 2012-03-23 2012-03-23 Method for writing data, Memory Controller and memorizer memory devices

Country Status (1)

Country Link
CN (1) CN103324580B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1902599A (en) * 2003-12-30 2007-01-24 桑迪士克股份有限公司 Management of non-volatile memory systems having large erase blocks
US20090172256A1 (en) * 2007-12-31 2009-07-02 Phison Electronics Corp. Data writing method for flash memory, and flash memory controller and storage device thereof
CN101937399A (en) * 2009-07-02 2011-01-05 联发科技股份有限公司 Method and apparatus for performing full range random writing on a non-volatile memory

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1902599A (en) * 2003-12-30 2007-01-24 桑迪士克股份有限公司 Management of non-volatile memory systems having large erase blocks
US20090172256A1 (en) * 2007-12-31 2009-07-02 Phison Electronics Corp. Data writing method for flash memory, and flash memory controller and storage device thereof
CN101937399A (en) * 2009-07-02 2011-01-05 联发科技股份有限公司 Method and apparatus for performing full range random writing on a non-volatile memory

Also Published As

Publication number Publication date
CN103324580B (en) 2016-03-16

Similar Documents

Publication Publication Date Title
CN107844431B (en) Mapping table updating method, memory control circuit unit and memory storage device
US9058256B2 (en) Data writing method, memory controller and memory storage apparatus
CN103035282B (en) Memorizer memory devices, Memory Controller and method for managing temperature
CN104423888A (en) Data writing method, memory control circuit unit and memory storage device
CN104699413A (en) Data management method, memorizer saving device and memorizer control circuit unit
CN102890655B (en) Memory storage device, memory controller and valid data recognition method thereof
CN104765569A (en) Data write-in method, memory control circuit unit and memory storing device
CN102592670B (en) Method for writing data, Memory Controller and memorizer memory devices
CN107357520B (en) Finishing instruction processing method, memory control circuit unit and memory device thereof
CN102890645B (en) Memorizer memory devices, Memory Controller and method for writing data
CN103136111A (en) Data writing method, memorizer controller and memorizer storage device
CN103678162B (en) System data storage method, memory controller and memory storage device
CN102915273B (en) Data writing method, memory controller and memory storage device
CN102968385B (en) Method for writing data, Memory Controller and storage device
CN102446137B (en) Method for writing data, Memory Controller and memorizer memory devices
CN102866861B (en) Flash memory system, flash controller and method for writing data
CN104536906A (en) Data writing method, storage controller and storage storing device
CN102800357B (en) Procedure code is written into and access method, Memory Controller and memorizer memory devices
CN103714008A (en) Method for memorizing data, memory controller and memorizing device of memory
CN103513930A (en) Memorizer management method, memorizer controller and memorizer storage device
CN103218308B (en) Buffer storage supervisory method, Memory Controller and memorizer memory devices
CN104731710A (en) Memory management method, memory control circuit unit and memory storage device
US8832358B2 (en) Data writing method, memory controller and memory storage apparatus
CN102467459B (en) Data write method, memory controller and memory device
CN102087632B (en) Data storage method for flash memory, controller and storage system

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant