CN103077736A - OCD (off-chip driver) module compatible with DDR2 (double data rate 2) and DDR3 (double data rate 3) - Google Patents
OCD (off-chip driver) module compatible with DDR2 (double data rate 2) and DDR3 (double data rate 3) Download PDFInfo
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- CN103077736A CN103077736A CN2012105635558A CN201210563555A CN103077736A CN 103077736 A CN103077736 A CN 103077736A CN 2012105635558 A CN2012105635558 A CN 2012105635558A CN 201210563555 A CN201210563555 A CN 201210563555A CN 103077736 A CN103077736 A CN 103077736A
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Abstract
The invention provides an OCD (off-chip driver) module compatible with a DDR2 (double data rate 2) and a DDR3 (double data rate 3). The OCD module comprises a DDR3 configuration unit, a DDR3 calibration unit and a plurality of drive units connected in parallel, and further comprises a DDR2 configuration unit, a DDR2 calibration unit and an alternative unit; the alternative unit comprises an alternative configuration unit and an alternative calibration unit; the DDR2 configuration unit and the DDR3 configuration unit are connected with the alternative configuration unit respectively; the DDR2 calibration unit and the DDR3 calibration unit are connected with the alternative calibration unit respectively; the alternative configuration unit and the alternative calibration unit are connected with the plurality of drive units connected in parallel respectively; and compared with an existing relative DDR3 DRAM (dynamic random access memory) output module, the technological compatibility of the OCD module is better, and the DDR3 DRAM output module can be converted into a DDR2 DRAM output module simply at a low price.
Description
Technical field
The invention belongs to the chip design field, relate to a kind of can compatible DDR2 and the OCD module of DDR3.
Background technology
The OCD of DRAM is dram chip and extraneous output interface module of communicating by letter, and the output interface characteristic difference of DDR3DRAM and DDR2DRAM is large, the OCD linearity of common DDR3DRAM, and frequency of operation is all high than DDR2DRAM.
Existing traditional DDR3OCD module referring to Fig. 1, by the driver element (numbering 1 ~ 8) of DDR3 drive arrangements unit, DDR3 alignment unit and 8 parallel connections;
8 driver elements are just the same, and they determine the final output resistance of OCD.The input data signal of 8 driver elements is all linked data_in, and outputting data signals is all linked data_out; OCD output (data_out) also was high level when input data (data_in) were high level, and when data_in was low level, data_out also was low level; 8 drive unit drives resistance are all by driving resistance signalization strength<5:0〉determine; The selection of 8 driver elements is respectively by sel<1 〉, sel<2〉... sel<8〉control; As sel<n〉when being high level, represent n driver element work, as sel<n〉when being low level, represent that n driver element close;
Referring to Fig. 2, sel<8:1〉produced by the DDR3 dispensing unit; The DDR3 dispensing unit can arrange total what driver module job; The DDR3DRAM of standard must provide 2 kinds of configurations, and by control signal mode_34 control, when mode_34 was low level (0), output impedance was 40 ohm; When mode_34 was high level (1), output impedance was 34.3 ohm;
Alignment unit arranges the output resistance of each driver element, it is by producing signal strength<5:0〉guarantee that in the situation that any voltage, temperature and process deviation, the output resistance of each driver element is RZQ (normally 240 ohm);
Referring to Fig. 3, existing traditional DDR2OCD module only has a driver element, and it determines the final output resistance of OCD; The input data signal of driver element is linked data_in, and outputting data signals is linked data_out; OCD output (data_out) also was high level when input data (data_in) were high level, and when data_in was low level, data_out also was low level; Drive unit drives resistance is all by driving resistance signalization strength_d<5:0〉determine;
Referring to Fig. 4, the DDR2OCD of standard must provide full driving and half drive pattern, and dispensing unit passes through control signal strength<5:0〉recompile generation strenghth_d<5:0〉realize entirely driving and the partly setting of driving; When pattern signalization mode_half was low level (0), OCD was set to full drive pattern, and output resistance is about 20 ohm; When mode_half was high level (1), OCD was set to half drive pattern, and output resistance is about 40 ohm;
Alignment unit arranges the output resistance of driver element, it is by producing signal strength<5:0〉guarantee that in the situation that any voltage, temperature and process deviation, the output resistance of driver element is 20 ohm (full drive patterns) or 40 ohm (half drive pattern);
The price of the DDR2 of same capability is often high a lot of than DDR3DRAM in the market, so the urgent need design compatible DDR2 of a kind of energy and DDR3DRAM just seem that marketable value is quite arranged.
Summary of the invention
In order to solve the technical matters that exists in the background technology, the invention provides a kind of can compatible DDR2 and the OCD module of DDR3; When the DDR2DRAM price is higher than the price of DDR3DRAM, by simple setting, the OCD of DDR3 can be switched to the OCD of DDR2;
Technical solution of the present invention is:
The invention provides a kind of can compatible DDR2 and the OCD module of DDR3, comprising: the driver element of DDR3 dispensing unit, DDR3 alignment unit and a plurality of parallel connections, its special character is: also comprise DDR2 dispensing unit, DDR2 alignment unit and alternative unit; The alternative unit of telling comprises configuration alternative unit and calibration alternative unit; Described DDR2 dispensing unit is connected with configuration alternative unit respectively with the DDR3 dispensing unit; Described DDR2 alignment unit is connected with calibration alternative unit respectively with the DDR3 alignment unit; Described configuration alternative unit be connected the alternative unit and be connected with the driver element of a plurality of parallel connections respectively;
The equal right and wrong gate circuit in above-mentioned configuration alternative unit and calibration alternative unit;
Advantage of the present invention:
1, the present invention is good with existing relevant DDR3DRAM output module technical compatibility, and it is simple to switch to the DDR2DRAM output module;
2, to compare DDR2 and the DDR3DRAM of same capability on the market cheaply a lot of for price;
Description of drawings
Fig. 1 is existing traditional DDR3OCD module;
Fig. 2 is the dispensing unit table that has traditional DDR3OCD now;
Fig. 3 is existing traditional DDR2OCD module;
Fig. 4 is the dispensing unit table that has traditional DDR2OCD now;
Fig. 5 be of the present invention provide can compatible DDR2 and the OCD module of DDR3;
Fig. 6 be of the present invention provide can compatible DDR2 and the dispensing unit table of the OCD of DDR3.
Embodiment
Referring to Fig. 5-Fig. 6, invention provide a kind of can compatible DDR2 and the OCD module of DDR3, comprising: the driver element of DDR3 dispensing unit, DDR3 alignment unit and a plurality of parallel connections, DDR2 dispensing unit, DDR2 alignment unit and alternative unit; The alternative unit comprises configuration alternative unit and calibration alternative unit; The DDR2 dispensing unit is connected with configuration alternative unit respectively with the DDR3 dispensing unit; The DDR2 alignment unit is connected with calibration alternative unit respectively with the DDR3 alignment unit; Configuration alternative unit be connected the alternative unit and be connected with the driver element of a plurality of parallel connections respectively; The alternative unit is other circuit of NAND gate circuit or other alternatives;
When control signal config_ddr2 was low level (0), OCD was set to DDR3OCD, and is the same with traditional DDR3OCD; When control signal config_ddr2 was high level (1), OCD was set to DDR2OCD;
When OCD was the DDR3 pattern, the DDR3 alignment unit was set to 240 ohm simultaneously to the output resistance of 8 driver elements; And when OCD was the DDR2 pattern, the DDR2 alignment unit was set to 160 ohm simultaneously to the output resistance of 8 driver elements;
When OCD was the DDR3 pattern, the DDR3 dispensing unit was selected 7 (RZQ/7 pattern) or 6 (RZQ/6 pattern) driver element work; When OCD was the DDR2 pattern, the DDR2 dispensing unit was selected 8 (full drive patterns) or 4 (half drive pattern) driver element work;
When OCD will switch to the DDR2 application from DDR3, need to be control signal config_ddr2 that high level is just passable from low transition only.
Claims (2)
- One kind can compatible DDR2 and the OCD module of DDR3, comprising: the driver element of DDR3 dispensing unit, DDR3 alignment unit and a plurality of parallel connections is characterized in that: also comprise DDR2 dispensing unit, DDR2 alignment unit and alternative unit; Described alternative unit comprises configuration alternative unit and calibration alternative unit; Described DDR2 dispensing unit is connected with configuration alternative unit respectively with the DDR3 dispensing unit; Described DDR2 alignment unit is connected with calibration alternative unit respectively with the DDR3 alignment unit; Described configuration alternative unit be connected the alternative unit and be connected with the driver element of a plurality of parallel connections respectively.
- 2. according to claim 1 can compatible DDR2 and the OCD module of DDR3, it is characterized in that: the equal right and wrong gate circuit in described configuration alternative unit and calibration alternative unit.
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Citations (5)
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---|---|---|---|---|
CN1707693A (en) * | 2004-05-10 | 2005-12-14 | 海力士半导体有限公司 | Semiconductor memory device with ability to adjust impedance of data output driver |
US20060022702A1 (en) * | 2004-07-30 | 2006-02-02 | Fujitsu Limited | Interface circuit and constituting method thereof |
US20070070717A1 (en) * | 2005-09-27 | 2007-03-29 | Hynix Semiconductor Inc. | Semiconductor memory device for adjusting impedance of data output driver |
CN101779373A (en) * | 2007-06-08 | 2010-07-14 | 莫塞德技术公司 | Dynamic impedance control for input/output buffers |
CN203085183U (en) * | 2012-12-21 | 2013-07-24 | 西安华芯半导体有限公司 | OCD (Output Command Data) unit compatible with DDR2 (Double Data Rate 2) and DDR3 (Double Data Rate 3) |
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2012
- 2012-12-21 CN CN201210563555.8A patent/CN103077736B/en active Active
Patent Citations (5)
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CN1707693A (en) * | 2004-05-10 | 2005-12-14 | 海力士半导体有限公司 | Semiconductor memory device with ability to adjust impedance of data output driver |
US20060022702A1 (en) * | 2004-07-30 | 2006-02-02 | Fujitsu Limited | Interface circuit and constituting method thereof |
US20070070717A1 (en) * | 2005-09-27 | 2007-03-29 | Hynix Semiconductor Inc. | Semiconductor memory device for adjusting impedance of data output driver |
CN101779373A (en) * | 2007-06-08 | 2010-07-14 | 莫塞德技术公司 | Dynamic impedance control for input/output buffers |
CN203085183U (en) * | 2012-12-21 | 2013-07-24 | 西安华芯半导体有限公司 | OCD (Output Command Data) unit compatible with DDR2 (Double Data Rate 2) and DDR3 (Double Data Rate 3) |
Non-Patent Citations (1)
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夏军等: "一种高性能DDR2控制器的设计与实现", 《计算机工程与科学》 * |
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Address after: 710055 Shaanxi City, Xi'an province high tech Road No. 38, innovation center, A, block, floor 4 Patentee after: XI'AN UNIIC SEMICONDUCTORS Co.,Ltd. Address before: 710055 Shaanxi City, Xi'an province high tech Road No. 38, innovation center, A, block, floor 4 Patentee before: Xi'an Sinochip Semiconductors Co., Ltd. |