CN102646703B - Epitaxial structure of single crystal indium phosphide (InP) group compound semiconductor film - Google Patents
Epitaxial structure of single crystal indium phosphide (InP) group compound semiconductor film Download PDFInfo
- Publication number
- CN102646703B CN102646703B CN201210137829.7A CN201210137829A CN102646703B CN 102646703 B CN102646703 B CN 102646703B CN 201210137829 A CN201210137829 A CN 201210137829A CN 102646703 B CN102646703 B CN 102646703B
- Authority
- CN
- China
- Prior art keywords
- inp
- layer
- doping
- base
- collector layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The invention relates to an epitaxial structure of single crystal InP group compound semiconductor film. The epitaxial structure is grown on a single crystal InP substrate, and an InP buffer layer is grown on the semi-insulating single crystal InP substrate; a heavy n-type doped InP sub-collector layer is grown on the InP buffer layer; a light n-type doped InP collector layer is grown on the heavy n-type doped InP sub-collector layer; a heavy p-type doped GaAasSb base layer is grown on the light n-type doped InP collector layer; an n-type doped GaAasSb/ InP super-lattice transition layer is grown on the GaAsSb base layer; an n-type InP emitting electrode is grown on the super-lattice structure layer; and a heavily doped n-type InP contact layer is grown on the InP emitting electrode. The epitaxial structure has the advantages that the material structure design is simplified; the super-lattice structure is utilized from one side of the wide band-gap emitting electrode, so that smooth transition of energy bands to one side of the base can be achieved, conduction band barrier peaks of the emitting electrode base are eliminated, and smooth transition of electrons to the base is achieved; the band structure of II type eliminates the conduction band barrier peaks between the base and collector.
Description
Technical field
What the present invention relates to is a kind of epitaxial structure of monocrystalline InP based compound semiconductor material film, belongs to the growth technology field of containing superlattice transition zone semiconductor single crystal thin film.
Background technology
At present, heterojunction bipolar transistor at a high speed mainly contains two kinds of SiGe material system and InP material systems, compared with SiGe material system, InP heterojunction bipolar transistor, collector region velocity of electrons is than being 3.5:1, base stage electrons spread speed ratio is 10:1, and therefore InP base DHBT has higher cut-off frequency.InP heterojunction bipolar transistor mainly comprises bi-material system, that is: the GaAsSb/InP HBT structure that the InGaAs/InP DHBT that InGaAs is base and GaAsSb are base.GaAsSb/InP is the band structure of II type compared with InGaAs/InP, and the conduction band of GaAsSb is positioned on InP conduction band, therefore between base and collector region, does not have potential barrier, has overcome electronics blocking effect, the collector electrode that electronics can directly inject.Compared with the DHBT of InGaAs/InP structure, GaAsSb/InP structure has been simplified device design complexity and Material growth difficulty greatly.But, DHBT structure taking GaAsSb material as base, due to the band structure of II type, there is conduction band barrier spike at emitter and base stage, limit electronics transporting from emitter to base stage, therefore reduced cut-off frequency and maximum vibration frequency that conduction band barrier between emitter and base stage contributes to improve device.By using InAlAs can improve emitter performance as emitter, because the heterogeneous band structure of becoming I type of InAlAs/GaAsSb, electronics can be directly injected into base stage and not needed to overcome conduction band barrier by emitter.But the electron mobility of InAlAs is much lower compared with InP, the direct result of the reduction of mobility is to have increased emitter resistance, has limited the raising of device cut-off frequency;
Therefore, design growth mobility is high, and there is no the emitter of conduction band barrier spike, on the one hand: adopt the InP material with high mobility as emitter, can effectively improve emitter resistance, on the other hand: adopt suitable emitter base transition zone design, eliminate the conduction band barrier spike of emitter base, make electronics be transported to base stage by emitter smoothly.
Summary of the invention
What the present invention proposed is a kind of epitaxial structure of monocrystalline InP based compound semiconductor material film, its objective is to overcome between GaAsSb/InP DHBT emitter base and exist and affect the transport issues of electronics from emitter to base stage compared with large potential barrier conduction band spike, enable band by emitter wide bandgap material InP, be smoothly transitted into base stage narrow band gap GaAsSb layer, eliminate emitter base conduction band barrier spike; If the InP emitter of broad stopband GaAsSb direct and low energy gap can form conduction band barrier spike, by introducing superlattice transition zone, can enable band and be smoothly transitted into base stage by emitter.According to superlattice design growing principle, the width of quantum well has determined superlattice band gap, that is: the narrower superlattice band gap of quantum well is wider, the wider superlattice of quantum well
Band gap is narrower.
Technical solution of the present invention is: its structure is on semi-insulating single crystal InP substrate, to be one deck InP resilient coating; It on InP resilient coating, is time collector layer; On inferior collector layer, it is collector layer; It on collector layer, is base layer; It in base layer, is superlattice transition zone; It in super lattice structure layers, is emitter; It on emitter, is contact layer;
Its growing method, comprises the following steps:
The first step is at semi-insulating single crystal InP substrate growth one deck InP resilient coating;
Second step is grown the heavy N-shaped doping of one deck InP as inferior collector layer on InP resilient coating;
The 3rd step is grown light N-shaped doping InP as collector layer on InP collector layer of heavy N-shaped doping;
The 4th step is the heavy p-type Doped GaAs of growth Sb base stage on light N-shaped doping InP collector electrode;
The GaAsSb/InP superlattice transition zone of the 5th step growing n-type doping in GaAsSb base layer;
The 6th step in super lattice structure layers growing n-type InP as emitter;
The 7th step is grown heavy doping N-shaped InP as contact layer on InP emitter.
Described resilient coating 2 is InP, and thickness is 200 ~ 300nm.
The thickness of described InP collector layer 3 of heavy N-shaped doping is 200 ~ 300nm, and doping content is 1 ~ 3E19cm
3.
Described N-shaped light dope InP collector layer 4 thickness are 200 ~ 300nm, and doping content is 1 ~ 3E16cm
3, temperature is any one temperature within the scope of 400 ~ 600 DEG C.
Described heavy p-type Doped GaAs Sb base stage 5 thickness are 30 ~ 60nm, and GaAsSb component is 0.4 ~ 0.6 arbitrary value, doping content 4 ~ 8E19cm
3, growth temperature is any one temperature within the scope of 350 ~ 550 DEG C.
Described superlattice transition zone is GaAsSb/InP superlattice 6, periodicity 10 ~ 40 any periods of superlattice, and Superlattice band is gradual to emitter by base, gross thickness 20 ~ 60nm.
Described emitter 7 is N-shaped InP, and InP thickness is 30 ~ 70nm, and doping content is 1 ~ 4E17cm
-3.
Described heavy doping N-shaped InP contact layer 8, thickness is 100 ~ 300nm, doping content is 1 ~ 4E19cm
-3.
The present invention has the following advantages: 1) GaAsSb/InP DHBT has simplified design on material structure; 2) from broad-band gap InP emitter one side, adopt superlattice structure can enable band and be smoothly transitted into base stage one side, eliminate emitter base conduction band barrier spike, be that electronics is smoothly transitted into base stage; 3) band structure of II type, has eliminated the conduction band barrier spike between base collector.
Brief description of the drawings
Accompanying drawing 1 is the epitaxial structure of GaAsSb base DHBT film of the present invention and the principle schematic of growing method.
Embodiment
Below in conjunction with drawings and Examples, the present invention is further illustrated.
A kind of GaAsSb base DHBT epitaxial structure and growing method, is characterized in that it comprises the following steps:
The first step is at the semi-insulating single crystal InP substrate 1 one deck InP resilient coating 2 of growing;
Second step is grown the heavy N-shaped doping of one deck InP as inferior collector electrode 3 on InP resilient coating 2;
The 3rd step is grown light N-shaped doping InP as collector electrode 4 on InP collector layer 3 of heavy N-shaped doping;
The 4th step heavy p-type Doped GaAs Sb base stage 5 of growing on light N-shaped doping InP collector layer 4;
The GaAsSb/InP superlattice transition zone 6 of the 5th step growing n-type doping in GaAsSb base layer 5;
The 6th step in super lattice structure layers 6 growing n-type InP as emitter 7;
The 7th step is grown heavy doping N-shaped InP as contact layer 8 on InP emitter 7.
The structural representation of GaAsSb base DHBT monocrystal thin films of the present invention is as Fig. 1.
Below in conjunction with concrete application examples, the present invention is further illustrated.
Embodiment 1:
1) select semi-insulating single crystal InP substrate, utilize MBE technology growth;
2) before growth, substrate is heated to 300 DEG C, toasts 30 minutes;
3) substrate is put into growth chamber, under P atmosphere protection, be warming up to 540 DEG C, oxide film dissolving;
4) be cooled to 500 DEG C, open the thick InP resilient coating of In shutter growth 200nm;
5) open InP collector electrode 200nm of Si shutter grow doping, collector electrode 200nm;
6) being cooled to the GaAsSb base thickness that 450 DEG C of growth Sb components are 0.5 is 50nm, C doping;
7) growth GaAsSb/InP superlattice structure, gross thickness 30nm, superlattice period is 30;
8) be warming up to InP emitter 50nm and the contact layer 300nm that 500 DEG C of growth Si adulterate;
9) be down to room temperature.
Embodiment 2:
1) select semi-insulating single crystal InP substrate, utilize MBE technology growth;
2) before growth, substrate is heated to 300 DEG C, toasts 30 minutes;
3) substrate is put into growth chamber, under P atmosphere protection, be warming up to 540 DEG C, oxide film dissolving;
4) be cooled to 500 DEG C, open the thick InP resilient coating of In shutter growth 300nm;
5) open InP collector electrode 200nm of Si shutter grow doping, collector electrode 200nm;
6) being cooled to the GaAsSb base thickness that 400 DEG C of growth Sb components are 0.4 is 30nm, C doping;
7) be warming up to 450 DEG C, growth GaAsSb/InP superlattice structure, gross thickness 30nm, superlattice period is 40;
8) be warming up to InP emitter 50nm and the contact layer 200nm that 500 DEG C of growth Si adulterate;
9) be down to room temperature.
Superlattice in this method are GaAsSb/InP material, superlattice period is that thickness is 1 ~ 3nm, near InP emitter one side, narrow quantum well thickness 0.3 ~ 1nm grows, the thickness of potential barrier is 2 ~ 4nm, quantum well width is transitioned into base stage GaAsSb mono-side by InP emitter one side line, and superlattice gross thickness is controlled at 20 ~ 40nm.If do not consider quantum tunneling effect, quantum well ground state level will be from emitter InP mono-side phase step type gradual change to GaAsSb base stage one side, but due to ultra-thin barrier layer thickness, electronics will be satisfied break-through and be crossed potential barrier, make the energy level between each quantum well produce overlapping, form new gradual band structure, by the mild gradual change of emitter one side to base stage.The GaAsSb/InP DHBT material structure of growth, has not only retained the very high electron mobility of InP material like this, has reduced emitter resistance, has overcome the conduction band barrier spike of emitter one side simultaneously, makes electronics can be transported to smoothly base stage.Not only go for GaAsSb/InP DHBT Material growth but also be applicable to InGaAs/InP DHBT Material growth according to said method.
Thin film epitaxy method involved in the present invention can be utilized MOCVD(metal organic-matter chemical gas deposition), MBE(molecular beam epitaxy), UHVCVD(high vacuum chemical gas deposition) homepitaxy growing technology realize.
Claims (7)
1. the epitaxial structure of monocrystalline InP Grown InP based compound semiconductor material film, is characterized in that on semi-insulating single crystal InP substrate (1) it being one deck InP resilient coating (2); It on InP resilient coating (2), is time collector layer (3); On inferior collector layer (3), be collector layer (4); On collector layer (4), be base layer (5); In base layer (5), be superlattice transition zone (6); In super lattice structure layers (6), be emitter (7); On emitter (7), be contact layer (8);
Its growing method, comprises the following steps:
The first step is at semi-insulating single crystal InP substrate (1) growth one deck InP resilient coating (2);
Second step is at InP resilient coating (2) upper growth heavy N-shaped InP the collector layer of doping of one deck (3);
The 3rd step is at the upper light N-shaped doping InP collector layer of growth of heavy N-shaped InP collector layer of doping (3) (4);
The 4th step is in the upper heavy p-type Doped GaAs Sb base layer of growth of light N-shaped doping InP collector layer (4) (5);
The 5th step is at the GaAsSb/InP superlattice transition zone (6) of the upper growing n-type doping of GaAsSb base layer (5);
The 6th step is at the upper growing n-type InP emitter (7) of super lattice structure layers (6);
The 7th step is at InP emitter (7) upper growth heavy doping N-shaped InP contact layer (8);
Described superlattice transition zone (6) is GaAsSb/InP superlattice, the periodicity 10 ~ 40 of superlattice, and Superlattice band is gradual to emitter by base, superlattice gross thickness 20 ~ 60nm.
2. the epitaxial structure of monocrystalline InP based compound semiconductor material film according to claim 1, is characterized in that described InP resilient coating (2) is grown in the surface of semi-insulating single crystal InP substrate (1), and the thickness of InP resilient coating (2) is 200 ~ 300nm.
3. the epitaxial structure of monocrystalline InP based compound semiconductor material film according to claim 1
, it is characterized in that the thickness of described heavy N-shaped InP collector layer of doping (3) is 200 ~ 300nm, doping content is 1 ~ 3E19cm
-3.
4. the epitaxial structure of monocrystalline InP based compound semiconductor material film according to claim 1, is characterized in that described N-shaped light dope InP collector layer (4) thickness is 200 ~ 300nm, and doping content is 1 ~ 3E16cm
-3, temperature is 400 ~ 600 DEG C.
5. the epitaxial structure of monocrystalline InP based compound semiconductor material film according to claim 1
, it is characterized in that described heavy p-type Doped GaAs Sb base stage (5) thickness is 30 ~ 60nm, GaAsSb component is 0.4 ~ 0.6, doping content 4 ~ 8E19cm
-3, growth temperature is 350 ~ 550 DEG C.
6. the epitaxial structure of monocrystalline InP based compound semiconductor material film according to claim 1
, it is characterized in that the thickness of described InP emitter (7) is 30 ~ 70nm, doping content is 1 ~ 4E17cm
-3.
7. the epitaxial structure of monocrystalline InP based compound semiconductor material film according to claim 1
, it is characterized in that the thickness of described heavy doping N-shaped InP contact layer (8) is 100 ~ 300nm, doping content is 1 ~ 4E19cm
-3.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210137829.7A CN102646703B (en) | 2012-05-07 | 2012-05-07 | Epitaxial structure of single crystal indium phosphide (InP) group compound semiconductor film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210137829.7A CN102646703B (en) | 2012-05-07 | 2012-05-07 | Epitaxial structure of single crystal indium phosphide (InP) group compound semiconductor film |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102646703A CN102646703A (en) | 2012-08-22 |
CN102646703B true CN102646703B (en) | 2014-12-10 |
Family
ID=46659415
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201210137829.7A Active CN102646703B (en) | 2012-05-07 | 2012-05-07 | Epitaxial structure of single crystal indium phosphide (InP) group compound semiconductor film |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102646703B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109742187B (en) * | 2018-12-29 | 2020-09-15 | 苏州焜原光电有限公司 | Method for manufacturing multi-section solar cell |
CN113644150A (en) * | 2021-07-22 | 2021-11-12 | 中山大学 | High-gain photoelectric detector |
WO2023000272A1 (en) * | 2021-07-22 | 2023-01-26 | 中山大学 | High-gain photoelectric detector |
CN114232085B (en) * | 2021-12-06 | 2024-02-06 | 中国电子科技集团公司第五十五研究所 | Method for epitaxial growth of InGaAs on InP substrate |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0177374A2 (en) * | 1984-08-30 | 1986-04-09 | Fujitsu Limited | High-speed semiconductor device |
US4963949A (en) * | 1988-09-30 | 1990-10-16 | The United States Of America As Represented Of The United States Department Of Energy | Substrate structures for InP-based devices |
US5349201A (en) * | 1992-05-28 | 1994-09-20 | Hughes Aircraft Company | NPN heterojunction bipolar transistor including antimonide base formed on semi-insulating indium phosphide substrate |
CN1317832A (en) * | 2001-06-06 | 2001-10-17 | 山东大学 | Dual-heterojunction CaAsSb/Inp transistor and its preparing process |
US6696710B2 (en) * | 2001-02-27 | 2004-02-24 | Agilent Technologies, Inc. | Heterojunction bipolar transistor (HBT) having an improved emitter-base junction |
US6822274B2 (en) * | 2003-02-03 | 2004-11-23 | Agilent Technologies, Inc. | Heterojunction semiconductor device having an intermediate layer for providing an improved junction |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0536715A (en) * | 1991-08-01 | 1993-02-12 | Furukawa Electric Co Ltd:The | Heterojunction bipolar transistor |
US6670653B1 (en) * | 1999-07-30 | 2003-12-30 | Hrl Laboratories, Llc | InP collector InGaAsSb base DHBT device and method of forming same |
US6768141B2 (en) * | 2002-08-23 | 2004-07-27 | Agilent Technologies, Inc. | Heterojunction bipolar transistor (HBT) having improved emitter-base grading structure |
JP2005123278A (en) * | 2003-10-15 | 2005-05-12 | Matsushita Electric Ind Co Ltd | Hetero-junction bipolar transistor |
-
2012
- 2012-05-07 CN CN201210137829.7A patent/CN102646703B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0177374A2 (en) * | 1984-08-30 | 1986-04-09 | Fujitsu Limited | High-speed semiconductor device |
US4963949A (en) * | 1988-09-30 | 1990-10-16 | The United States Of America As Represented Of The United States Department Of Energy | Substrate structures for InP-based devices |
US5349201A (en) * | 1992-05-28 | 1994-09-20 | Hughes Aircraft Company | NPN heterojunction bipolar transistor including antimonide base formed on semi-insulating indium phosphide substrate |
US6696710B2 (en) * | 2001-02-27 | 2004-02-24 | Agilent Technologies, Inc. | Heterojunction bipolar transistor (HBT) having an improved emitter-base junction |
CN1317832A (en) * | 2001-06-06 | 2001-10-17 | 山东大学 | Dual-heterojunction CaAsSb/Inp transistor and its preparing process |
US6822274B2 (en) * | 2003-02-03 | 2004-11-23 | Agilent Technologies, Inc. | Heterojunction semiconductor device having an intermediate layer for providing an improved junction |
Non-Patent Citations (1)
Title |
---|
JP特开平5-36715A 1993.02.12 * |
Also Published As
Publication number | Publication date |
---|---|
CN102646703A (en) | 2012-08-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0445475B1 (en) | Heterojunction bipolar transistor | |
US20060267007A1 (en) | Devices incorporating heavily defected semiconductor layers | |
US20120199187A1 (en) | Nanowire tunnel diode and method for making the same | |
US20070018192A1 (en) | Devices incorporating heavily defected semiconductor layers | |
Schmid et al. | Fabrication of vertical InAs-Si heterojunction tunnel field effect transistors | |
CN102646703B (en) | Epitaxial structure of single crystal indium phosphide (InP) group compound semiconductor film | |
CN104900688A (en) | Heterojunction bipolar transistor structure of oriented epitaxy | |
US20220367176A1 (en) | Epitaxies of a Chemical Compound Semiconductor | |
Wu et al. | Small offset-voltage In/sub 0.49/Ga/sub 0.51/P/GaAs double-barrier bipolar transistor | |
US6049099A (en) | Cadmium sulfide layers for indium phosphide-based heterojunction bipolar transistors | |
CN103367567B (en) | Preparation method based on the non-rectangle Group III-V semiconductor SQW of bismuth element | |
JP4799938B2 (en) | Heterojunction bipolar transistor | |
JP2004088107A (en) | Heterojunction bipolar transistor(hbt) having improved emitter/base grading structure | |
JP2505805B2 (en) | Hot carrier transistor | |
JP6254046B2 (en) | Epitaxial wafer for heterojunction bipolar transistor and heterojunction bipolar transistor | |
Muhowski et al. | True hero of the trade: On the critical contributions of Art Gossard to modern device techonology | |
JPH11121461A (en) | Hetero junction bipolar transistor | |
JP2009094148A (en) | Heterojunction bipolar transistor | |
JP2522358B2 (en) | Heterostructure bipolar transistor using germanium | |
JP6240061B2 (en) | Heterojunction bipolar transistor and manufacturing method thereof | |
JP2014183145A (en) | Heterojunction bipolar transistor | |
CN109817754A (en) | A kind of material structure and preparation method thereof making InSb infrared detector | |
Chen et al. | High current and low turn-on voltage InAlAs/InGaAsSb/InGaAs heterojunction bipolar transistor | |
Ai et al. | GSMBE growth of InGaAsP step-graded composite collector structure applied to DHBT | |
Gini et al. | LP-MOVPE growth of DHBT structure with heavily Zn-doped base and suppressed outdiffusion |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |