CN102595101A - Front-end acquisition device of contour video monitoring system - Google Patents
Front-end acquisition device of contour video monitoring system Download PDFInfo
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- CN102595101A CN102595101A CN2012100533609A CN201210053360A CN102595101A CN 102595101 A CN102595101 A CN 102595101A CN 2012100533609 A CN2012100533609 A CN 2012100533609A CN 201210053360 A CN201210053360 A CN 201210053360A CN 102595101 A CN102595101 A CN 102595101A
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Abstract
The invention relates to a front-end acquisition device of a contour video monitoring system. The device comprises a photoelectric sensor group used for acquiring contour information, wherein the output end of the photoelectric sensor group is connected with the input end of a field programmable gate array (FPGA) controller; the input end of the FPGA controller is also connected with the output ends of a crystal oscillator circuit, a configuration downloading circuit and a reset circuit respectively; and the output end of the FPGA controller is connected with a serial port circuit. The contour characteristics of different types of objects are acquired through the photoelectric sensor group, the signal data acquired by the photoelectric sensor group is received by the FPGA controller, the serial port circuit is arranged, the signal data is transmitted into a computer terminal through the serial port circuit to be processed and identified, and finally, video monitoring on the different types of objects is realized. In all, photoelectric sensors and the FPGA controller are adopted in the front-end acquisition device, so the front-end acquisition device is low in cost and simple in structure and can acquire the contours of the different types of objects.
Description
Technical field
The present invention relates to field of video monitoring, especially a kind of front-end collection device of profile video monitoring system.
Background technology
Present video monitoring system is the integrated use of technology such as multimedia technology, technology of video compressing encoding, computer network and artificial intelligence, and constantly develops towards intelligent direction.See that from function video monitoring can be used for safety precaution, information is obtained and aspects such as command scheduling, the multiple service such as security protection, medical monitoring, long-distance education of production procedure control, large common facility can be provided.See from application; Video monitoring has all obtained using widely in all trades and professions; No worker monitor in archive office, museum, confidential departments, break in traffic rules and regulations and traffic monitoring, residential quarters, parking lot etc. for example, however these supervisory control systems all are mounted in narrow a certain appointed area.
For a country, the border often is the key place that illegal immigrant, smuggler and terrorist come in and go out, and nation's security is had very big challenge.Nearly 2.2 ten thousand kilometers long of the land boundary of China and surrounding countries; Wherein having many is remote and uninhabited places, at present, and these local quite difficulties of monitoring automatically of carrying out; Adopt existing video monitoring system not only cost be difficult to estimate, and receive the data limit of high flow capacity.At present, appearance profile characteristic difference also do not occur, realize supervisory control system the monitoring of whole border according to dissimilar objects.
Summary of the invention
The object of the present invention is to provide that a kind of cost is low, simple in structure, the front-end collection device of the profile video monitoring system that can realize dissimilar contour of object are gathered.
For realizing above-mentioned purpose; The present invention has adopted following technical scheme: a kind of front-end collection device of profile video monitoring system; Comprise the photoelectric sensor group that is used to gather profile information; The output of photoelectric sensor group links to each other with the input of FPGA controller, and the input of FPGA controller also links to each other with the output of crystal oscillating circuit, download configuration circuit, reset circuit respectively, and the output of FPGA controller links to each other with serial port circuit.
Can know by technique scheme; The present invention gathers the appearance profile characteristic of dissimilar objects through the photoelectric sensor group; Receive the signal data that photoelectric sensor is gathered by the FPGA controller; And serial port circuit is set, send into terminal through serial port circuit and handle, discern, the final video monitoring of realizing dissimilar objects.In a word, the present invention adopts photoelectric sensor and FPGA controller, and cost is low, simple in structure, can realize dissimilar contour of object collections.
Description of drawings
Fig. 1 is a circuit block diagram of the present invention;
Fig. 2,3,4,5,6,7 is respectively the circuit theory diagrams of transducer input interface circuit among Fig. 1, FPGA controller, crystal oscillating circuit, download configuration circuit, reset circuit, RS232 interface circuit.
Embodiment
A kind of front-end collection device of profile video monitoring system; Comprise the photoelectric sensor group that is used to gather profile information; The output of photoelectric sensor group links to each other with the input of FPGA controller 3, and the input of FPGA controller 3 also links to each other with the output of crystal oscillating circuit 4, download configuration circuit 5, reset circuit 6 respectively, and the output of FPGA controller 3 links to each other with serial port circuit; As shown in Figure 1, described FPGA controller 3 control photoelectric sensor groups carry out data acquisition and serial ports transmits data.
As shown in Figure 1; Described photoelectric sensor group adopts reflective photoelectric sensor group 1; The output of reflective photoelectric sensor group 1 links to each other with the input of transducer input interface circuit 2, and the output of transducer input interface circuit 2 links to each other with the output of FPGA controller 3; Described serial port circuit adopts RS232 serial port circuit 7, and the output of FPGA controller 3 links to each other with the serial ports of main frame through RS232 serial port circuit 7.This device also comprises power circuit, and power circuit is respectively to transducer input interface circuit 2, FPGA controller 3, crystal oscillating circuit 4, download configuration circuit 5, reset circuit 6,7 power supplies of RS232 serial port circuit.
As shown in Figure 3, described FPGA controller 3 comprises chip U3A, U3B, U3C, U3D; As shown in Figure 2; Described transducer input interface circuit 2 is made up of row's needle interface JP1, double needle interface JP2 and exclusion RP1, RP2, RP3, RP4; The 5VCC pin of double needle interface JP2 links to each other with the positive pole of reflective photoelectric sensor group 1; The GND pin of double needle interface JP2 links to each other with the negative pole of reflective photoelectric sensor group 1, for reflective photoelectric sensor group 1 provides+the 5V direct-current working volts.Row's needle interface JP1 links to each other with the signal output part of reflective photoelectric sensor group 1.
As shown in Figure 6, described reset circuit 6 comprises resistance R 1, meets 3.3VCC after resistance R 1 and resistance R 2 are parallelly connected; Resistance R 1 is connected with push-button switch S1; Resistance R 2 is connected with push-button switch S2, ground connection after push-button switch S1, the S2 parallel connection, and the anode of diode D2 is connected between resistance R 2 and the push-button switch S2; The negative electrode of diode D2 runs in and hinders the 7th pin of RP2, uses in order to system upgrade.Lead-out wire links to each other with the 92nd pin of chip U3C between resistance R 1 and the push-button switch S1, and lead-out wire links to each other with the 14th pin of chip U3A between resistance R 2 and the push-button switch S2.Push-button switch S1 resets according to personal code work as the software reset; Push-button switch S2 is as hardware reset, and when pressing the button switch S 2, label nCONFIG lead-in wire is low level, and this moment, all FPGA codes were read the FPGA controller 3 from configuring chip A1 the inside again, and program is restarted operation.
As shown in Figure 4, described crystal oscillating circuit 4 comprises chip Y1, its 2nd pin ground connection; Its 3rd pin connects the 93rd pin of chip U3C, and its 4th pin divides two-way, and one the tunnel meets 3.3VCC; Another road is through capacity earth, and active crystal oscillator is the global clock that system provides 20MHz.As shown in Figure 7; Described RS232 serial port circuit 7 comprises chip U4; Its 12nd pin connects the 56th pin of chip U3B through resistance R 8, and its 11st pin connects the 55th pin of chip U3B, and its 13rd pin links to each other with the 3rd pin of interface J2; The 2nd pin of its 14th pin and interface J2; Its 15th pin links to each other with the 5th pin of interface J2, reflective photoelectric sensor group 1 is collected information data transmission give terminal, and terminal is handled, discerned according to the digital signal utilization compression sensing algorithm that collects again.
As shown in Figure 5; Described download configuration circuit 5 comprises configuring chip A1 and jtag interface JP3, JP4; The 1st, 3,5,9 pins of jtag interface JP3 link to each other with the 88th, 90,89,95 pins of chip U3C respectively; The 1st, 5,7,9 pins of jtag interface JP4 link to each other with the 24th, 14,13,25 pins of chip U3A respectively; The 3rd pin of jtag interface JP4 links to each other with the 86th pin of chip U3C, and the 1st, 2,5,6 pins of configuring chip A1 link to each other with the 12nd, 13,25,24 pins of chip U3A respectively, and the end of resistance R 3, R4, R9 links to each other with the 22nd, 23,21 pins of chip U3A respectively; Ground connection after the other end parallel connection of resistance R 3, R4, R9; The end of resistance R 10, R11 links to each other with the 87th, 86 pins of chip U3C respectively, and an end of resistance R 12 links to each other with the 14th pin of chip U3A, meets 3.3VCC after the other end parallel connection of resistance R 10, R11, R12.If when downloading through jtag interface JP3; Need after system's power down to download to FPGA controller 3 again; If when downloading through jtag interface JP4, the user program code will be stored among the configuring chip A1, after system powers at every turn; The user program code will read in FPGA controller 3, operation then automatically from configuring chip A1.
As shown in Figure 2; The 16th, 15,14,13,12,11,10,9 pins of described exclusion RP3 link to each other with the 1st, 2,3,4,5,6,7,8 pins of row's needle interface chip JP1 respectively; The 16th, 15,14,13,12,11,10,9 pins of exclusion RP4 link to each other with the 9th, 10,11,12,13,14,15,16 pins of row's needle interface chip JP1 respectively; The 16th, 15,14,13,12,11,10,9 pins of exclusion RP1 link to each other with the 17th, 18,19,20,21,22,23,24 pins of row's needle interface chip JP1 respectively; The 16th, 15,14,13,12,11 pins of exclusion RP2 link to each other with the 25th, 26,27,28,29,30 pins of row's needle interface chip JP1 respectively; The 1st, 2,3,4,5,6 pins of exclusion RP3 link to each other with the 1st, 2,3,4,5,6 pins of chip U3A respectively; The 7th, 8 pins of exclusion RP3 link to each other with the 37th, 38 pins of chip U3B respectively; The 1st, 2,3,4,5,6,7 pins of exclusion RP4 link to each other with the 39th, 40,41,42,49,50,51 pins of chip U3B respectively, and the 8th pin of exclusion RP4 links to each other with the 73rd pin of chip U3C; The 1st, 2,3,4,5 pins of exclusion RP1 link to each other with the 74th, 75,76,77,78 pins of chip U3C respectively; The 6th, 7,8 pins of exclusion RP1 link to each other with the 109th, 110,111 pins of chip U3D respectively; Thereby the output signal of reflective photoelectric sensor group 1 is sent into FPGA controller 3, realize signals collecting; The 1st, 2,3,4,5,6 pins of exclusion RP2 link to each other with the 112nd, 113,127,128,129,130 pins of chip U3D respectively.
In a word, the present invention is low-cost, system is simple, is convenient to install; Objects such as people, animal or automobile through 1 pair of front end of reflective photoelectric sensor group carry out the collection of information; And information is passed to FPGA controller 3, and realizing the collection of front end video, the message transmission that FPGA controller 3 arrives front-end collection through RS232 serial port circuit 7 again is to computer by serial; Further appearance profile images such as people, animal or automobile are discerned by background computer, realized monitoring function.
Claims (8)
1. the front-end collection device of a profile video monitoring system; It is characterized in that: comprise the photoelectric sensor group that is used to gather profile information; The output of photoelectric sensor group links to each other with the input of FPGA controller (3); The input of FPGA controller (3) also links to each other with the output of crystal oscillating circuit (4), download configuration circuit (5), reset circuit (6) respectively, and the output of FPGA controller (3) links to each other with serial port circuit.
2. the front-end collection device of profile video monitoring system according to claim 1; It is characterized in that: described photoelectric sensor group adopts reflective photoelectric sensor group (1); The output of reflective photoelectric sensor group (1) links to each other with the input of transducer input interface circuit (2), and the output of transducer input interface circuit (2) links to each other with the output of FPGA controller (3); Described serial port circuit adopts RS232 serial port circuit (7), and the output of FPGA controller (3) links to each other with the serial ports of main frame through RS232 serial port circuit (7).
3. the front-end collection device of profile video monitoring system according to claim 2; It is characterized in that: device also comprises power circuit, and power circuit is respectively to transducer input interface circuit (2), FPGA controller (3), crystal oscillating circuit (4), download configuration circuit (5), reset circuit (6), RS232 serial port circuit (7) power supply.
4. the front-end collection device of profile video monitoring system according to claim 2 is characterized in that: described FPGA controller (3) comprises chip U3A, U3B, U3C, U3D; Described transducer input interface circuit (2) is made up of row's needle interface JP1, double needle interface JP2 and exclusion RP1, RP2, RP3, RP4; The 5VCC pin of double needle interface JP2 links to each other with the positive pole of reflective photoelectric sensor group (1); The GND pin of double needle interface JP2 links to each other with the negative pole of reflective photoelectric sensor group (1), and row's needle interface JP1 links to each other with the signal output part of reflective photoelectric sensor group (1).
5. the front-end collection device of profile video monitoring system according to claim 4; It is characterized in that: described reset circuit (6) comprises resistance R 1, meets 3.3VCC after resistance R 1 and resistance R 2 are parallelly connected, and resistance R 1 is connected with push-button switch S1; Resistance R 2 is connected with push-button switch S2; Ground connection after push-button switch S1, the S2 parallel connection, the anode of diode D2 are connected between resistance R 2 and the push-button switch S2, and the negative electrode of diode D2 runs in and hinders the 7th pin of RP2; Lead-out wire links to each other with the 92nd pin of chip U3C between resistance R 1 and the push-button switch S1, and lead-out wire links to each other with the 14th pin of chip U3A between resistance R 2 and the push-button switch S2.
6. the front-end collection device of profile video monitoring system according to claim 4; It is characterized in that: described crystal oscillating circuit (4) comprises chip Y1; Its 2nd pin ground connection, its 3rd pin connects the 93rd pin of chip U3C, and its 4th pin divides two-way; One the tunnel meets 3.3VCC, and capacity earth is passed through on another road; Described RS232 serial port circuit (7) comprises chip U4; Its 12nd pin connects the 56th pin of chip U3B through resistance R 8; Its 11st pin connects the 55th pin of chip U3B; Its 13rd pin links to each other with the 3rd pin of interface J2, the 2nd pin of its 14th pin and interface J2, and its 15th pin links to each other with the 5th pin of interface J2.
7. the front-end collection device of profile video monitoring system according to claim 4; It is characterized in that: described download configuration circuit (5) comprises configuring chip A1 and jtag interface JP3, JP4; The 1st, 3,5,9 pins of jtag interface JP3 link to each other with the 88th, 90,89,95 pins of chip U3C respectively; The 1st, 5,7,9 pins of jtag interface JP4 link to each other with the 24th, 14,13,25 pins of chip U3A respectively; The 3rd pin of jtag interface JP4 links to each other with the 86th pin of chip U3C, and the 1st, 2,5,6 pins of configuring chip A1 link to each other with the 12nd, 13,25,24 pins of chip U3A respectively, and the end of resistance R 3, R4, R9 links to each other with the 22nd, 23,21 pins of chip U3A respectively; Ground connection after the other end parallel connection of resistance R 3, R4, R9; The end of resistance R 10, R11 links to each other with the 87th, 86 pins of chip U3C respectively, and an end of resistance R 12 links to each other with the 14th pin of chip U3A, meets 3.3VCC after the other end parallel connection of resistance R 10, R11, R12.
8. the front-end collection device of profile video monitoring system according to claim 4; It is characterized in that: the 16th, 15,14,13,12,11,10,9 pins of described exclusion RP3 link to each other with the 1st, 2,3,4,5,6,7,8 pins of row's needle interface chip JP1 respectively; The 16th, 15,14,13,12,11,10,9 pins of exclusion RP4 link to each other with the 9th, 10,11,12,13,14,15,16 pins of row's needle interface chip JP1 respectively; The 16th, 15,14,13,12,11,10,9 pins of exclusion RP1 link to each other with the 17th, 18,19,20,21,22,23,24 pins of row's needle interface chip JP1 respectively; The 16th, 15,14,13,12,11 pins of exclusion RP2 link to each other with the 25th, 26,27,28,29,30 pins of row's needle interface chip JP1 respectively; The 1st, 2,3,4,5,6 pins of exclusion RP3 link to each other with the 1st, 2,3,4,5,6 pins of chip U3A respectively; The 7th, 8 pins of exclusion RP3 link to each other with the 37th, 38 pins of chip U3B respectively; The 1st, 2,3,4,5,6,7 pins of exclusion RP4 link to each other with the 39th, 40,41,42,49,50,51 pins of chip U3B respectively; The 8th pin of exclusion RP4 links to each other with the 73rd pin of chip U3C; The 1st, 2,3,4,5 pins of exclusion RP1 link to each other with the 74th, 75,76,77,78 pins of chip U3C respectively; The 6th, 7,8 pins of exclusion RP1 link to each other with the 109th, 110,111 pins of chip U3D respectively, and the 1st, 2,3,4,5,6 pins of exclusion RP2 link to each other with the 112nd, 113,127,128,129,130 pins of chip U3D respectively.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012100533609A CN102595101A (en) | 2012-03-03 | 2012-03-03 | Front-end acquisition device of contour video monitoring system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012100533609A CN102595101A (en) | 2012-03-03 | 2012-03-03 | Front-end acquisition device of contour video monitoring system |
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| CN102595101A true CN102595101A (en) | 2012-07-18 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106289391A (en) * | 2016-07-29 | 2017-01-04 | 广西安讯科技投资有限公司 | A kind of installation method of environment monitoring equipment |
| CN106289375A (en) * | 2016-07-29 | 2017-01-04 | 广西安讯科技投资有限公司 | A kind of installation method of environmental monitor |
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- 2012-03-03 CN CN2012100533609A patent/CN102595101A/en active Pending
Patent Citations (2)
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| US5692159A (en) * | 1995-05-19 | 1997-11-25 | Digital Equipment Corporation | Configurable digital signal interface using field programmable gate array to reformat data |
| CN202004903U (en) * | 2011-04-08 | 2011-10-05 | 北方工业大学 | High definition portable visual aid based on field programmable gate array (FPGA) |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106289391A (en) * | 2016-07-29 | 2017-01-04 | 广西安讯科技投资有限公司 | A kind of installation method of environment monitoring equipment |
| CN106289375A (en) * | 2016-07-29 | 2017-01-04 | 广西安讯科技投资有限公司 | A kind of installation method of environmental monitor |
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Application publication date: 20120718 |