CN102520914A - Branch prediction device supporting multiple paths of parallel prediction - Google Patents
Branch prediction device supporting multiple paths of parallel prediction Download PDFInfo
- Publication number
- CN102520914A CN102520914A CN201110347139XA CN201110347139A CN102520914A CN 102520914 A CN102520914 A CN 102520914A CN 201110347139X A CN201110347139X A CN 201110347139XA CN 201110347139 A CN201110347139 A CN 201110347139A CN 102520914 A CN102520914 A CN 102520914A
- Authority
- CN
- China
- Prior art keywords
- branch
- prediction
- jump instruction
- outcome
- instruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention discloses a branch prediction device supporting multiple paths of parallel prediction, which comprises an instruction prefetch unit, n paths of parallel prediction units and a control circuit, wherein the instruction prefetch unit is used for prefetching n instructions within a clock period, wherein n is a natural number and is not less than 2; the paths of parallel prediction units are used for setting n paths of parallel prediction subunits and carrying out parallel prediction on n branch jump instructions; and the control circuit is used for detecting the state of the whole branch prediction device and is connected with a branch prediction memory for providing a read enabling signal and a write enabling signal for the branch prediction memory as well as is connected with an index selector for providing a gating signal for the index selector. The branch prediction device supporting the multiple paths of parallel prediction has the advantages of solving the problem of incapability of simultaneously predicting a plurality of branch jump instructions and increasing the prediction accuracy rate.
Description
Technical field
The present invention relates to computer system, more particularly, relate to a kind of processor that uses branch prediction table to carry out branch prediction.
Background technology
At present, comprising all processors of flush bonding processor, all is to use pipeline system, and instruction process is divided into series of operation, and carries out corresponding operation by each streamline.Different pipeline stages is operated different instructions simultaneously, and the execution of call instruction can overlappingly be carried out to raise the efficiency.In order to make full use of this instruction executive capability, must think that this processor provides enough instructions by correct execution route, and the existence of branch's jump instruction will cause the pause of streamline.The appearance of forecasting mechanism makes processor can continue execution command with the mode of speculating to carry out, thereby has improved the efficient of carrying out.
In the flush bonding processor that the multiple mechanism of instruction is arranged, there is one or need to handle more than one instruction at same level production line.When having only a branch jump instruction, traditional history-sensitive branch prediction device of non-parallel combination can be predicted well.But when running into when many branch jump instructions are arranged simultaneously, prediction will go wrong.This is because in the history-sensitive branch prediction, the redirect situation of last branch's redirect will influence the prediction of back branch's redirect.And interacting of several the branch's jump instructions in the front and back in same level production line can not accomplish in time to obtain information of forecasting, caused the low of forecasting efficiency.
Summary of the invention
For what the branch prediction mechanism that overcomes existing flush bonding processor existed multiple processor is supported the lower deficiency of the ineffective predictablity rate that causes; The present invention provides many branch's jump instructions of a kind of solution to predict simultaneously, improves the branch prediction device of the support multidiameter delay prediction of predictablity rate.
The technical solution adopted for the present invention to solve the technical problems is:
A kind of branch prediction device of supporting the multidiameter delay prediction, said branch prediction device comprises:
An instruction prefetch unit is used for the parallel n bar instruction of looking ahead in a clock period, and n is a natural number, and n >=2;
The n road predicting unit that walks abreast is used to be provided with parallel predictor unit, n road, to the n bar branch jump instruction prediction that walks abreast;
A control circuit is used to detect the state of whole branch prediction device, connects the branch prediction storer, reads enable signal and writes enable signal for it provides, and connects the index selector switch, for it provides gating signal;
Said parallel predictor unit comprises:
The branch prediction storer is used to write down the branch prediction information of branch's jump instruction, and the branch outcome of the prediction of output, and the jump instruction of said branch is included in the instruction of n bar;
The global history shift register; Be used to write down the jump instruction redirect historical information that has specific low level PC address through level production line affirmation later; For providing, the branch prediction storer of correspondence writes index; The bit wide of each global history shift register is the j position, is wherein storing the result of redirect whether when complete of j bar branch jump instruction recently;
Virtual history is used to write down the jump instruction redirect prediction locus whether that has specific low level PC address, and the bit wide of each virtual history is the j position, is wherein storing whether predicting the outcome of redirect of j bar branch jump instruction recently;
The index selector switch; Be connected between the input end of output terminal and storer of global history shift register and virtual history, from global history shift register or virtual history, choose the index of j as final branch prediction storer.
Further, said control circuit uses branch's jump instruction to distinguish the different branches jump instruction with the PC address of low m position, n=2m wherein, and predicting the outcome of one tunnel branch prediction device can only be used for its corresponding specific branch's jump instruction.
Further again, in the said parallel predictor unit, use whole j positions altogether of virtual history to be used for the corresponding forecast memory of index, the branch prediction storer is carried out read operation, read information of forecasting.
Further; In the said control circuit; When predicting the outcome after level production line is confirmed correctly later of branch's jump instruction; Upgrade the pairing global history register of this branch's jump instruction, correct branch outcome is write the most significant digit or the lowest order of global history shift register, the global history shift register then moves to left accordingly or moves to right one.
In the said control circuit; After branch's jump instruction made a prediction; The information of forecasting of using this instruction is immediately upgraded the pairing virtual history register of this branch's jump instruction; The branch outcome of prediction is write the most significant digit or the lowest order of virtual history, and virtual history then moves to left accordingly or moves to right one.
In the said control circuit; When predicting the outcome after level production line is confirmed mistake later of branch's jump instruction; Control circuit control selects the pairing branch prediction storer of this branch's jump instruction to carry out write operation; Whole j positions altogether of the pairing global history shift register of this branch's jump instruction are used for index, and correct branch outcome is write the branch outcome storer.
In the said control circuit; When predicting the outcome after level production line is confirmed mistake later of branch's jump instruction; Each road branch prediction device will use information of forecasting to upgrade the pairing global history register of this branch's jump instruction; The redirect result is write the most significant digit or the lowest order of global history shift register; The global history shift register then moves to left accordingly or moves to right one, and upgrades the full j position of corresponding virtual history with the full j of the global history shift register position after upgrading.
Beneficial effect of the present invention is: solve many branch's jump instructions and predict simultaneously, improve predictablity rate.
Description of drawings:
Fig. 1 is multidiameter delay information of forecasting and the corresponding synoptic diagram of instruction;
Fig. 2 is each road branch prediction apparatus structure synoptic diagram;
Fig. 3 is the prediction schematic flow sheet of every road prediction unit;
Fig. 4 is the prediction schematic flow sheet of multichannel prediction unit;
Fig. 5 is the relatively independent prediction schematic flow sheet of the prediction on each road.
Embodiment
Below in conjunction with accompanying drawing the present invention is further specified.
With reference to Fig. 1～shown in Figure 2, a kind of branch prediction device of supporting the multidiameter delay prediction mainly is divided into the two large divisions, comprises that multidiameter delay predicting unit and parallel instruction get the finger unit.Parallel instruction is got the finger unit and is responsible in one-period, obtaining many instructions.After obtaining many instructions simultaneously a clock period, just can embody advantage to the information of forecasting of many instructions.
With reference to shown in Figure 1, the multiple branches predicting unit is made the information of forecasting on n road simultaneously, and the parallel finger unit of getting is obtained the instruction of n bar simultaneously.The information of forecasting on each road and the independent mutual correspondence of an instruction are distinguished n=2 with the low m position pc that instructs
mThe information of forecasting on each road is provided by one tunnel inch prediction unit; It is branch's jump instruction of the only corresponding specific low m position pc of branch predictor on every road; Its read-write operation all depends on the prediction redirect situation and true redirect situation of this specific low level pc branch jump instruction, and the concrete condition hereinafter will illustrated in detail.
With reference to shown in Figure 2, each road branch prediction device comprises the VGHR (virtual history) of the GHR (global history shift register) of a branch prediction storer, a j position, a j position, an index selector switch and a control circuit.Wherein, predicting the outcome comes from the branch prediction storer, actual redirect result come from that the back level production line provides about the corresponding jump instruction of this road branch prediction device real information of redirect whether.GHR is used to write down actual redirect result.The jump instruction redirect that VGHR is used to write down specific low level PC address is prediction locus whether.The index selector switch is connected between the input end of output terminal and storer of GHR and VGHR, from GHR or VGHR, chooses the index of j as final branch prediction storer.Control circuit is used to detect the state of whole branch prediction device, connects the branch prediction storer, reads enable signal and writes enable signal for it provides, and connects the index selector switch, for it provides gating signal.Whole j positions altogether of VGHR are used for the corresponding forecast memory of index, and read operation is carried out in the branch prediction memory block, read information of forecasting.Jump instruction predict the outcome through level production line later confirm correct after, upgrade GHR, correct branch outcome is write most significant digit or the lowest order of GHR, GHR then moves to left accordingly or moves to right one.Will be immediately after branch's jump instruction made a prediction upgrade VGHR with the information of forecasting of this instruction, the branch outcome of prediction is write most significant digit or the lowest order of VGHR, VGHR then moves to left accordingly or moves to right one.When predicting the outcome after level production line is confirmed mistake later of branch's jump instruction, control circuit control branch prediction storer carries out write operation, and whole j positions altogether of GHR are used for index, and correct branch outcome is write the branch outcome storer; Upgrade GHR, correct branch outcome is write most significant digit or the lowest order of GHR, GHR then moves to left accordingly or moves to right one, upgrades the VGHR of correspondence then with the value of GHR.
With reference to shown in Figure 3, the prediction flow process of every road prediction unit at first refers to and obtains information of forecasting begin by getting.Judge whether condition redirect branch jump instruction of this instruction then.If not the jump instruction of a condition branch, information of forecasting is with nonsensical, and predictive content remains unchanged.If the jump instruction of a condition branch, use predicted the outcome upgrade VGHR.New VGHR will be used for index branch prediction storer, and read new information of forecasting.To flow to the back level production line in this branch's jump instruction simultaneously, back level production line will be judged the redirect situation of this instruction.If prediction is correct, upgrade GHR.If prediction error is used earlier GHR index branch prediction storer, and, upgrade GHR with the redirect result afterwards, again with the GHR renewal VGHR after upgrading with the actual redirect value of updated stored device as a result.
With reference to Fig. 4 and Fig. 5, further embody advantage of the present invention.As shown in Figure 4; Traditional history-sensitive branch prediction device of non-parallel combination is when predicting many instructions; The instruction in back will come index branch prediction storer according to the jump information of last instruction, could obtain new information of forecasting for back one branch's jump instruction.Because this is the process of a serial, this mode forecasting efficiency reduces greatly, and the necessity of prediction also approaches 0, can only take modes such as prediction are abandoned in the instruction of back.And combine Fig. 5, the prediction on each road is all relatively independent, previous predict the outcome or jump information not can to after once prediction cause too much influence.This relative independence has guaranteed that parallel obtaining fast of information of forecasting can not make forecasting efficiency reduce because of the increase of instruction strip number, thereby guaranteed the functional and necessity of prediction unit when obtaining many instructions.
Claims (7)
1. branch prediction device of supporting multidiameter delay prediction, it is characterized in that: said branch prediction device comprises:
An instruction prefetch unit is used for the parallel n bar instruction of looking ahead in a clock period, and n is a natural number, and n >=2;
The n road predicting unit that walks abreast is used to be provided with parallel predictor unit, n road, to the n bar branch jump instruction prediction that walks abreast;
A control circuit is used to detect the state of whole branch prediction device, connects the branch prediction storer, reads enable signal and writes enable signal for it provides, and connects the index selector switch, for it provides gating signal;
Said parallel predictor unit comprises:
The branch prediction storer is used to write down the branch prediction information of branch's jump instruction, and the branch outcome of the prediction of output, and the jump instruction of said branch is included in the instruction of n bar;
The global history shift register; Be used to write down the jump instruction redirect historical information that has specific low level PC address through level production line affirmation later; For providing, the branch prediction storer of correspondence writes index; The bit wide of each global history shift register is the j position, the nearest execution j bar branch jump instruction of wherein storing this shift register correspondence position result of redirect whether after being finished;
Virtual history is used to write down the jump instruction redirect prediction locus whether that has specific low level PC address, and the bit wide of each virtual history is the j position, is wherein storing whether predicting the outcome of redirect of j bar branch jump instruction recently;
The index selector switch; Be connected between the input end of output terminal and storer of global history shift register and virtual history, from global history shift register or virtual history, choose the index of j as final branch prediction storer.
2. the branch prediction device of support multidiameter delay prediction as claimed in claim 1 is characterized in that: said control circuit uses branch's jump instruction to distinguish different branches jump instruction, wherein n=2 with the PC address of low m position
m, predicting the outcome of one tunnel branch prediction device can only be used for its corresponding specific branch's jump instruction.
3. according to claim 1 or claim 2 the branch prediction device of support multidiameter delay prediction; It is characterized in that: in the said parallel predictor unit; Use whole j positions altogether of virtual history to be used for the corresponding forecast memory of index; The branch prediction storer is carried out read operation, read information of forecasting.
4. according to claim 1 or claim 2 the branch prediction device of support multidiameter delay prediction; It is characterized in that: in the said control circuit; When predicting the outcome after level production line is confirmed correctly later of branch's jump instruction; Upgrade the pairing global history register of this branch's jump instruction, correct branch outcome is write the most significant digit or the lowest order of global history shift register, the global history shift register then moves to left accordingly or moves to right one.
5. according to claim 1 or claim 2 the branch prediction device of support multidiameter delay prediction; It is characterized in that: in the said control circuit; After branch's jump instruction made a prediction; With upgrading the pairing virtual history register of this branch's jump instruction with the information of forecasting of this instruction immediately, the branch outcome of prediction is write the most significant digit or the lowest order of virtual history, virtual history then moves to left accordingly or moves to right one.
6. according to claim 1 or claim 2 the branch prediction device of support multidiameter delay prediction; It is characterized in that: in the said control circuit; When predicting the outcome after level production line is confirmed mistake later of branch's jump instruction; Control circuit control selects the pairing branch prediction storer of this branch's jump instruction to carry out write operation, and whole j positions altogether of the pairing global history shift register of this branch's jump instruction are used for index, and correct branch outcome is write the branch outcome storer.
7. according to claim 1 or claim 2 the branch prediction device of support multidiameter delay prediction; It is characterized in that: in the said control circuit; When predicting the outcome after level production line is confirmed mistake later of branch's jump instruction; Each road branch prediction device will use information of forecasting to upgrade the pairing global history register of this branch's jump instruction; The redirect result is write the most significant digit or the lowest order of global history shift register, and the global history shift register then moves to left accordingly or moves to right one, and upgrades the full j position of corresponding virtual history with the full j of the global history shift register position after upgrading.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110347139XA CN102520914A (en) | 2011-11-04 | 2011-11-04 | Branch prediction device supporting multiple paths of parallel prediction |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110347139XA CN102520914A (en) | 2011-11-04 | 2011-11-04 | Branch prediction device supporting multiple paths of parallel prediction |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102520914A true CN102520914A (en) | 2012-06-27 |
Family
ID=46291857
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110347139XA Pending CN102520914A (en) | 2011-11-04 | 2011-11-04 | Branch prediction device supporting multiple paths of parallel prediction |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102520914A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017031975A1 (en) * | 2015-08-26 | 2017-03-02 | Huawei Technologies Co., Ltd. | System and method for multi-branch switching |
| WO2019019719A1 (en) * | 2017-07-28 | 2019-01-31 | 华为技术有限公司 | Branch prediction method and apparatus |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6016545A (en) * | 1997-12-16 | 2000-01-18 | Advanced Micro Devices, Inc. | Reduced size storage apparatus for storing cache-line-related data in a high frequency microprocessor |
| US20050125646A1 (en) * | 2003-12-05 | 2005-06-09 | Fujitsu Limited | Method and apparatus for branch prediction |
| US20050268075A1 (en) * | 2004-05-28 | 2005-12-01 | Sun Microsystems, Inc. | Multiple branch predictions |
| CN101477455A (en) * | 2009-01-22 | 2009-07-08 | 浙江大学 | Branch prediction control method without prediction time delay |
| CN102053818A (en) * | 2009-11-05 | 2011-05-11 | 无锡江南计算技术研究所 | Branch prediction method and device as well as processor |
-
2011
- 2011-11-04 CN CN201110347139XA patent/CN102520914A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6016545A (en) * | 1997-12-16 | 2000-01-18 | Advanced Micro Devices, Inc. | Reduced size storage apparatus for storing cache-line-related data in a high frequency microprocessor |
| US20050125646A1 (en) * | 2003-12-05 | 2005-06-09 | Fujitsu Limited | Method and apparatus for branch prediction |
| US20050268075A1 (en) * | 2004-05-28 | 2005-12-01 | Sun Microsystems, Inc. | Multiple branch predictions |
| CN101477455A (en) * | 2009-01-22 | 2009-07-08 | 浙江大学 | Branch prediction control method without prediction time delay |
| CN102053818A (en) * | 2009-11-05 | 2011-05-11 | 无锡江南计算技术研究所 | Branch prediction method and device as well as processor |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017031975A1 (en) * | 2015-08-26 | 2017-03-02 | Huawei Technologies Co., Ltd. | System and method for multi-branch switching |
| WO2019019719A1 (en) * | 2017-07-28 | 2019-01-31 | 华为技术有限公司 | Branch prediction method and apparatus |
| CN109308191A (en) * | 2017-07-28 | 2019-02-05 | 华为技术有限公司 | Branch prediction method and device |
| CN109308191B (en) * | 2017-07-28 | 2021-09-14 | 华为技术有限公司 | Branch prediction method and device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100468323C (en) | Pipeline type microprocessor, device and method for generating early stage instruction results | |
| CN103593167B (en) | Loop buffer learning | |
| CN101477455B (en) | Branch prediction control method without prediction time delay | |
| CN102934075B (en) | For using the method and apparatus of the sequence flow of prenoticing technology reprogramming | |
| CN101228506B (en) | A method and apparatus for predicting branch instructions | |
| TWI503744B (en) | Apparatus, processor and method for packing multiple iterations of a loop | |
| KR101099203B1 (en) | Methods and apparatus for emulating the branch prediction behavior of an explicit subroutine call | |
| CN102662640B (en) | Double-branch target buffer and branch target processing system and processing method | |
| CN102117198A (en) | Branch processing method | |
| CN105511838A (en) | Processor and executing method of same | |
| CN104731719B (en) | Cache system and method | |
| CN101002169A (en) | Microprocessor architecture | |
| KR100974769B1 (en) | Method and apparatus for managing instruction flushing in a microprocessor's instruction pipeline | |
| CN106406814A (en) | Processor and method for translating architecture instruction into microinstruction | |
| WO2014004272A1 (en) | Methods and apparatus to extend software branch target hints | |
| CN100365566C (en) | Branch prediction apparatus and method for low power consumption | |
| CN106843816B (en) | A kind of branch prediction control method and device | |
| CN1761940B (en) | Instruction processor, instruction implementing method and apparatus, instruction compiling method and apparatus | |
| CN102707933A (en) | Method and apparatus for managing a return stack | |
| CN102520914A (en) | Branch prediction device supporting multiple paths of parallel prediction | |
| WO2018059337A1 (en) | Apparatus and method for processing data | |
| CN101727312B (en) | Realization method of return-address stack for supporting automatic error correction function | |
| CN104025034A (en) | Configurable reduced instruction set core | |
| CN102520913B (en) | Parallel branch prediction device of packet-based updating historical information | |
| CN109783143A (en) | Control method and control equipment for instruction pipeline stream |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120627 |