CN102023950A - Method for directly connecting MIL-STD-1773 bus with high-speed intelligent unified bus - Google Patents
Method for directly connecting MIL-STD-1773 bus with high-speed intelligent unified bus Download PDFInfo
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Abstract
The invention discloses a method for directly connecting an MIL-STD-1773 bus with a high-speed intelligent unified bus, which is used for solving the technical problem that the existing MIL-STD-1773 buses can not be directly accessed to the high-speed intelligent unified buses. The technical scheme is as follows: the high-speed intelligent unified bus data are deserialized; the high-speed intelligent unified bus protocol is configured by a low-speed logic device; the data are cached by a high-speed dual-port static random access memory (SRAM); the read-write clock of the high-speed dual-port SRAM is intelligently switched by a high-speed monitoring unit; connection between MIL-STD-1553B and MIL-STD-1773 is realized by a direct modulator and amplifier photo-electric conversion method; direct data interaction with the MIL-STD-1553B bus is realized by directly connecting the data port of an MIL-STD-1553B controller with the data port of the high-speed intelligent unified bus, thus realizing direct connection between MIL-STD-1773 and the high-speed intelligent unified bus. Meanwhile, the method realizes convenient and flexible interconnection between the MIL-STD-1773 bus and other buses and reduces the quantity of the interconnected bus media of the system and the power consumption of the system.
Description
Technical field
The present invention relates to a kind of bus interface method, the direct interface method of particularly a kind of MIL-STD-1773 bus and high-speed intelligent unibus.
Background technology
MIL-STD-1553B is the bus standard that military aircraft is most widely used, yet a little less than the MIL-STD-1553B bus but exists antijamming capability, can not grow problems such as Distance Transmission.MIL-STD-1773 proposes on the basis that solves the MIL-STD-1553B deficiency, and all terminals speed with 20Mbps on bus is uploaded carry information at optical fiber, and satisfying in rugged surroundings with the process control is the military real-time control system of purpose.The MIL-STD-1773 data highway system has begun to be applied in the military electronics computer hardware of Aeronautics and Astronautics, navigation and other weaponrys, just use the MIL-STD-1773 bus that order and control communication are provided in the solid state record instrument of Hubble as NASA.Development along with avionics system, the integrated scale of system is increasing, sharing out the work and helping one another of each subsystem embodies a concentrated reflection of in bus interface communication and the function computing, thereby require magnanimity sensor information, image information to realize that the high speed of information is shared by the high-speed intelligent unibus, the then an urgent demand transmission speed MIL-STD-1773 bus of the highest 20Mbps and the high-speed intelligent unibus of ten thousand megabits can realize information sharing, and MIL-STD-1773 bus itself can't directly be unified intelligent bus with high speed and be connected at present.
Summary of the invention
In order to overcome the problem that existing MIL-STD-1773 bus can't directly insert the high-speed intelligent unibus, the invention provides the direct interface method of a kind of MIL-STD-1773 bus and high-speed intelligent unibus.This method adopts the high speed string and the conversion of going here and there at a high speed and changing realization high-speed intelligent unibus data, adopt LSL cell configuration high-speed intelligent unibus agreement, adopt high speed dual-port SRAM to carry out metadata cache, adopt the high speed monitor unit that the read-write clock of high speed dual-port SRAM is carried out the intelligence switching, the method that adopts directly modulation to amplify opto-electronic conversion realizes the interface of MIL-STD-1553B and MIL-STD-1773, the method and the direct interaction data of MIL-STD-1553B bus that adopt the FPDP of the FPDP of MIL-STD-1553 controller and high-speed intelligent unibus directly to join are again realized the direct interface of MIL-STD-1773 and high-speed intelligent unibus based on this.
The present invention solves the technical scheme that its technical matters adopts, the direct interface method of a kind of MIL-STD-1773 bus and high-speed intelligent unibus, and its characteristics may further comprise the steps:
1) the MIL-STD-1553B bus data is converted into the MIL-STD-1773 bus data.
Signal flow: the MIL-STD-1553B bus data carries out being directly coupled on the MIL-STD-1773 bus network after detection, shaping, switch, modulation and electricity/light conversion through behind the isolating transformer again.
2) the MIL-STD-1773 bus data is converted into the MIL-STD-1553B bus data.
Signal flow: the MIL-STD-1773 bus data carries out being coupled on the MIL-STD-1553B bus network through isolating transformer after straight, amplification, detection, switch, modulation through after the opto-electronic conversion again.
3) the MIL-STD-1553B bus data is converted into high-speed intelligent unibus data.
Adopt transformer coupled device that the signal on the MIL-STD-1553B bus network is delivered to the MIL-STD-1553B bus controller, the MIL-STD-1553B bus controller receives input, and the signal that receives is carried out Data Receiving by the MIL-STD-1553B bus protocol carry out protocol analysis and data extract, and the data of extracting are passed to high-speed intelligent unibus protocol element by FPDP.High-speed intelligent unibus protocol element is encoded according to pre-configured bus protocol to the data of the total line drawing of MIL-STD-1553B, and the data after will encoding write fixed area among the high speed dual-port SRAM with low-speed clock, and notice high speed monitor unit.When the high speed monitor unit stopped in high speed dual-port SRAM write data at intelligent bus, at first the read-write clock with high speed dual-port SRAM switched to high-frequency clock, triggered string at a high speed and converting unit then and read data among the high speed dual-port SRAM.At a high speed after string and the converting unit reading of data, data are carried out and go here and theres conversion, afterwards data are coupled to directly transmission on the optical fiber.
4) high-speed intelligent unibus data conversion is the MIL-STD-1553B bus data.
Adopt at a high speed string and converting unit the signal on the high-speed intelligent unibus network is gone here and there and to change, with high-frequency clock the data that receive are write fixed area among the dual-port SRAM and notice high speed monitor unit then.When the high speed monitor unit stops in high speed dual-port SRAM write data at a high speed string and conversion, the clock of high speed dual-port SRAM is switched to low-speed clock, and trigger high-speed intelligent unibus protocol element reading data.High-speed intelligent unibus protocol element receives after the triggering, data among the high speed dual-port SRAM are read, and carry out Frame decoding and valid data extract according to pre-configured bus protocol, then with the data payment MIL-STD-1553B bus controller that extracts.The MIL-STD-1553B bus controller is at first intercepted bus state, at one's leisure, the data of paying is passed to the MIL-STD-1553B transceiver after according to MIL-STD-1553B bus protocol coding.The MIL-STD-1553B transceiver carries out data after the level format adjustment, data is coupled on the MIL-STD-1553B network send.
The invention has the beneficial effects as follows: owing to adopt high speed string and conversion to realize the high speed string and the conversion of high-speed intelligent unibus data, adopt LSL cell configuration high-speed intelligent unibus agreement, adopt high speed dual-port SRAM to carry out metadata cache, adopt the high speed monitor unit that the read-write clock of high speed dual-port SRAM is carried out the intelligence switching, the method that adopts directly modulation to amplify opto-electronic conversion realizes the interface of MIL-STD-1553B and MIL-STD-1773, the method and the direct interaction data of MIL-STD-1553B bus that adopt the FPDP of the FPDP of MIL-STD-1553 controller and high-speed intelligent unibus directly to join are again realized the direct interface of MIL-STD-1773 and high-speed intelligent unibus based on this.The present invention at first based on the flexible configuration characteristic of high-speed intelligent unibus agreement, has realized that the convenience of MIL-STD-1773 and other buses is interconnected in its problem of solution; Reduced the bus quantity of interconnected bus medium on a large scale once more; Because only at the high speed dual-port SRAM that joins with the high-speed intelligent unibus, string and converting unit, high speed monitor unit adopt the very high frequency(VHF) device at a high speed, and remainder can adopt conventional device, thereby has reduced power consumption, the cost expense of system.
Below in conjunction with drawings and Examples the present invention is elaborated.
Description of drawings
Fig. 1 is the direct interface structural drawing of MIL-STD-1773 bus and high-speed intelligent unibus.
Fig. 2 is the mutual transition diagram of MIL-STD-1553B bus and MIL-STD-1773 bus.
Fig. 3 is that the MIL-STD-1553B bus is changeed high-speed intelligent unibus figure.
Fig. 4 is that the high-speed intelligent unibus changes the total line chart of MIL-STD-1553B.
Embodiment
With reference to Fig. 1～4, describe the present invention in detail.
MIL-STD-1553B bus coupling transformer of the present invention can adopt B-3226, and the MIL-STD-1553B bus controller adopts BU-61688; Structure shown in Figure 2 is adopted in the mutual conversion of MIL-STD-1773 and MIL-STD-1553B; Adopt the high speed two-port RAM to adopt IDT70V3079; High-speed intelligent unibus protocol element realizes based on the LSL device, as the EP1C12 Series FPGA; The high speed monitor unit adopts the high speed logic device to realize, as the high speed logic device of Hittite company; String and converting unit can adopt BCM8152 to realize the data transmit-receive speed of 10Gbps at a high speed.By write the MIL-STD-1553B controller configuration facility (CCF), at a high speed string and converting unit configurator make MIL-STD-1553B bus and string and converting unit can work independently at a high speed; By realizing that in the high speed logic device clock switch unit, high speed monitor unit make the clock of dual-port SRAM intelligence to switch.
The present invention mainly comprises transforming and MIL-STD-1553B bus and the directly conversion mutually of high-speed intelligent unibus mutually of MIL-STD-1773 and MIL-STD-1553B bus.
1) the mutual conversion between MIL-STD-1553B and the MIL-STD-1773
MIL-STD-1553B changes the MIL-STD-1773 signal flow: the MIL-STD-1553B bus data carries out being directly coupled on the MIL-STD-1773 bus network after detection, shaping, switch, modulation and electricity/light conversion through behind the isolating transformer again; MIL-STD-1773 changes the MIL-STD-1553B signal flow: the MIL-STD-1773 bus data carries out being coupled on the MIL-STD-1553B bus network through isolating transformer after straight, amplification, detection, switch, modulation through after the opto-electronic conversion again.
2) the mutual conversion between MIL-STD-1553B and the high-speed intelligent unibus
MIL-STD-1553B changes the process of transmitting of high-speed intelligent unibus: adopt the MIL-STD-1553B bus transceiver that the signal on the MIL-STD-1553B network is carried out the level format adjustment, then the result is inputed to the MIL-STD-1553B controller.The MIL-STD-1553B controller will be imported according to the MIL-STD-1553B bus protocol and carry out data decode, and give high-speed intelligent unibus protocol element with the data transfer that receives.The data of high-speed intelligent unibus protocol element after to the MIL-STD-1553B bus encoding/decoding are encoded according to pre-configured bus protocol, and the data after will encoding write fixed area among the high speed dual-port SRAM with low-speed clock, and notice high speed monitor unit.When the high speed monitor unit stopped in high speed dual-port SRAM write data at intelligent bus, at first the read-write clock with high speed dual-port SRAM switched to high-frequency clock, triggered string at a high speed and converting unit then and read data among the high speed dual-port SRAM.At a high speed after string and the converting unit reading of data, data are carried out and gone here and there conversion, data are coupled on the optical fiber send afterwards.The high-speed intelligent unibus changes the receiving course of MIL-STD-1553B: employing high speed string and converting unit are gone here and there to the signal on the high-speed intelligent unibus network and are changed, with high-frequency clock the data that receive are write fixed area among the dual-port SRAM then, and notice high speed monitor unit.When the high speed monitor unit stops in high speed dual-port SRAM write data at a high speed string and conversion, the clock of high speed dual-port SRAM is switched to low-speed clock, and trigger high-speed intelligent unibus protocol element reading data.High-speed intelligent unibus protocol element receives after the triggering, data among the high speed dual-port SRAM are read, and carry out Frame decoding and load data extracts according to pre-configured bus protocol, then with the data payment MIL-STD-1553B bus controller that extracts.The MIL-STD-1553B bus passes to the MIL-STD-1553B transceiver after the data of paying are encoded according to the MIL-STD-1553B bus protocol.The MIL-STD-1553B transceiver carries out data after the level format adjustment, data is coupled on the MIL-STD-1553B network send.
The present invention at first based on the flexible configuration characteristic of high-speed intelligent unibus agreement, has realized that the convenience of MIL-STD-1773 and other buses is interconnected in its problem of solution; Once more multiple bus medium being merged becomes a branch of optical fiber, has reduced the bus quantity of interconnected bus medium on a large scale; Once more because only at the high speed dual-port SRAM that joins with the high-speed intelligent unibus, string and converting unit, high speed monitor unit adopt the very high frequency(VHF) device at a high speed, and remainder can adopt conventional device, thereby has reduced power consumption, the cost expense of system.
Claims (1)
1. the direct interface method of MIL-STD-1773 bus and high-speed intelligent unibus is characterized in that may further comprise the steps:
(a) the MIL-STD-1553B bus data carries out being directly coupled on the MIL-STD-1773 bus network after detection, shaping, switch, modulation and electricity/light conversion through behind the isolating transformer again;
(b) the MIL-STD-1773 bus data carries out being coupled on the MIL-STD-1553B bus network through isolating transformer after straight, amplification, detection, switch, modulation through after the opto-electronic conversion again;
(c) adopt transformer coupled device that the signal on the MIL-STD-1553B bus network is delivered to the MIL-STD-1553B bus controller, the MIL-STD-1553B bus controller receives input, and the signal that receives is carried out Data Receiving by the MIL-STD-1553B bus protocol carry out protocol analysis and data extract, and the data of extracting are passed to high-speed intelligent unibus protocol element by FPDP; High-speed intelligent unibus protocol element is encoded according to pre-configured bus protocol to the data of the total line drawing of MIL-STD-1553B, and the data after will encoding write fixed area among the high speed dual-port SRAM with low-speed clock, and notice high speed monitor unit; When the high speed monitor unit stopped in high speed dual-port SRAM write data at intelligent bus, at first the read-write clock with high speed dual-port SRAM switched to high-frequency clock, triggered string at a high speed and converting unit then and read data among the high speed dual-port SRAM; At a high speed after string and the converting unit reading of data, data are carried out and go here and theres conversion, afterwards data are coupled to directly transmission on the optical fiber;
(d) adopt at a high speed string and converting unit the signal on the high-speed intelligent unibus network is gone here and there and to change, with high-frequency clock the data that receive are write fixed area among the dual-port SRAM and notice high speed monitor unit then; When the high speed monitor unit stops in high speed dual-port SRAM write data at a high speed string and conversion, the clock of high speed dual-port SRAM is switched to low-speed clock, and trigger high-speed intelligent unibus protocol element reading data; High-speed intelligent unibus protocol element receives after the triggering, data among the high speed dual-port SRAM are read, and carry out Frame decoding and valid data extract according to pre-configured bus protocol, then with the data payment MIL-STD-1553B bus controller that extracts; The MIL-STD-1553B bus controller is at first intercepted bus state, at one's leisure, the data of paying is passed to the MIL-STD-1553B transceiver after according to MIL-STD-1553B bus protocol coding; The MIL-STD-1553B transceiver carries out data after the level format adjustment, data is coupled on the MIL-STD-1553B network send.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103235769A (en) * | 2013-03-27 | 2013-08-07 | 中国航天科技集团公司第九研究院第七七一研究所 | High speed 1553 bus protocol processor |
| CN106301525A (en) * | 2016-09-18 | 2017-01-04 | 北京机械设备研究所 | 1553B sub-line repeater and the relay processing method of 1553B signal |
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| US6014729A (en) * | 1997-09-29 | 2000-01-11 | Firstpass, Inc. | Shared memory arbitration apparatus and method |
| US6122747A (en) * | 1997-09-05 | 2000-09-19 | First Pass Inc. | Intelligent subsystem interface for modular hardware system |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6122747A (en) * | 1997-09-05 | 2000-09-19 | First Pass Inc. | Intelligent subsystem interface for modular hardware system |
| US6014729A (en) * | 1997-09-29 | 2000-01-11 | Firstpass, Inc. | Shared memory arbitration apparatus and method |
Non-Patent Citations (2)
| Title |
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| 《光通信技术》 19910228 曹德述等 高性能的MIL-STD-1773光纤数据总线系统 66-70 1 , 第1,2期 2 * |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103235769A (en) * | 2013-03-27 | 2013-08-07 | 中国航天科技集团公司第九研究院第七七一研究所 | High speed 1553 bus protocol processor |
| CN103235769B (en) * | 2013-03-27 | 2016-01-13 | 中国航天科技集团公司第九研究院第七七一研究所 | A kind of 1553 bus protocol processors at a high speed |
| CN106301525A (en) * | 2016-09-18 | 2017-01-04 | 北京机械设备研究所 | 1553B sub-line repeater and the relay processing method of 1553B signal |
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| CN102023950B (en) | 2012-05-30 |
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