CN101398467A - Internal integrate circuit bus interface test system and method - Google Patents

Internal integrate circuit bus interface test system and method Download PDF

Info

Publication number
CN101398467A
CN101398467A CNA2007102018565A CN200710201856A CN101398467A CN 101398467 A CN101398467 A CN 101398467A CN A2007102018565 A CNA2007102018565 A CN A2007102018565A CN 200710201856 A CN200710201856 A CN 200710201856A CN 101398467 A CN101398467 A CN 101398467A
Authority
CN
China
Prior art keywords
signal
circuit bus
integrate circuit
main frame
internal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2007102018565A
Other languages
Chinese (zh)
Other versions
CN101398467B (en
Inventor
陈军民
彭朝东
廖翼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
Original Assignee
Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hongfujin Precision Industry Shenzhen Co Ltd, Hon Hai Precision Industry Co Ltd filed Critical Hongfujin Precision Industry Shenzhen Co Ltd
Priority to CN2007102018565A priority Critical patent/CN101398467B/en
Publication of CN101398467A publication Critical patent/CN101398467A/en
Application granted granted Critical
Publication of CN101398467B publication Critical patent/CN101398467B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The invention provides a method for testing a bus interface of an internal integrated circuit. The method includes the following steps: a universal serial bus controller in a host is started for leading the host to generate a universal serial bus signal; the universal serial bus signal is transmitted to a signal converting device which is connected with the host by a universal serial bus interface; the signal converting device receives the universal serial bus signal and converts the universal serial bus signal into an internal integrated circuit bus signal; the internal integrated circuit bus signal is transmitted to a serial existence detecting chip in the host by an internal integrated circuit bus interface; whether the internal integrated circuit bus signal can carry out operation on the serial existence detecting chip is judged to determine whether the internal integrated circuit bus interface test is passed. Furthermore, the invention also provides an internal integrated circuit bus interface testing system.

Description

Internal integrate circuit bus interface test system and method
Technical field
The present invention relates to a kind of internal integrate circuit bus interface test system and method.
Background technology
Improving and the assurance product quality, is the important content in the business activity.In order to improve and to guarantee product quality, enterprise must implement test to obtain the quality information of product and manufacture process thereof to product, according to these information the manufacture process of product is implemented control---revise and the compensation activity, make waster and reprocessed products rate drop to minimum level, finally guarantee the stability and the output consistency of product thereof of product quality forming process.
As everyone knows, since internal integrate circuit bus (I2C:Inter-Integrated Circuit) simplicity and validity with and interface directly on assembly, I2C, the bus occupation space is very little, reduce the space of circuit board and the quantity of chip pin, reduced interconnected cost.Therefore, on personal computer (PC:Personal Computer), the I2C interface is installed more and more widely.In addition, because USB (universal serial bus) (USB:Universal Serial Bus) allows the outer hot plug under the open state that is located at, can be connected in series 127 peripheral hardwares at most, transmission speed can reach 480MB/S, and provide 5 volts of power supplys to low-voltage equipment, simultaneously can reduce personal computer (PC:Personal Computer) I/O interface quantity, therefore USB interface nearly all is installed on PC.
At present, when the I2C interface is tested, all be separately it to be tested, and can not after the USB interface test passes, the I2C interface be tested by the signal that USB interface sends.So not only time-consuming but also expensive, testing cost increases.
Summary of the invention
In view of above content, be necessary to provide a kind of internal integrate circuit bus interface test system, it can be tested internal integrate circuit bus interface by the signal that USB (universal serial bus) sends.
In view of above content, also be necessary to provide a kind of internal integrate circuit bus interface method of testing, it can be tested internal integrate circuit bus interface by the signal that USB (universal serial bus) sends.
A kind of internal integrate circuit bus interface test system, this system comprises main frame and signal conversion equipment, described main frame comprises that USB controller, USB (universal serial bus), serial exist detection chip and internal integrate circuit bus interface, described signal conversion equipment is used for converting universal serial bus signal to internal integrated circuit bus signal, described main frame also comprises: start module, the startup USB controller that is used for main frame makes it produce universal serial bus signal; Delivery module is used for sending the universal serial bus signal of above-mentioned generation to link to each other with main frame signal conversion equipment by USB (universal serial bus); Described delivery module, the internal integrated circuit bus signal that is used for that also signal conversion equipment is converted to sends serial to by internal integrate circuit bus interface and has detection chip; Judge module is used to judge whether the signal of described internal integrate circuit bus can exist detection chip to operate to determine whether the internal integrate circuit bus interface test is passed through to serial.
A kind of internal integrate circuit bus interface method of testing, this method comprises the steps: to start the USB controller in the main frame, makes it produce universal serial bus signal; Send described universal serial bus signal to link to each other signal conversion equipment by USB (universal serial bus) with main frame; Signal conversion equipment converts the universal serial bus signal that receives to internal integrated circuit bus signal; There is detection chip in this internal integrated circuit bus signal by the serial that internal integrate circuit bus interface sends in the main frame; Judge whether described internal integrated circuit bus signal can exist detection chip to operate to determine whether the internal integrate circuit bus interface test is passed through to serial.
Compared to prior art, described internal integrate circuit bus interface test system and method, it can be tested the I2C interface by the signal that USB interface sends after the USB interface test passes, saves testing cost and test duration.
Description of drawings
Fig. 1 is the hardware structure figure of internal integrate circuit bus interface test system preferred embodiment of the present invention.
Fig. 2 is the functional block diagram of main frame shown in Fig. 1.
Fig. 3 is the process flow diagram of internal integrate circuit bus interface method of testing of the present invention preferred embodiment.
Embodiment
As shown in Figure 1, be the system architecture diagram of internal integrate circuit bus interface test system preferred embodiment of the present invention.This system mainly comprises main frame 1, signal conversion equipment 6 and display device 7.Include USB (universal serial bus) (USB:Universal Serial Bus) controller 2, USB (universal serial bus) 3, serial existence detection (SPD:SerialPresence Detect) chip 4, internal integrate circuit bus (I2C:Inter-Integrated Circuit) interface 5 in the described main frame 1.Described USB controller 2 connects signal conversion equipment 6 by USB interface 3, and this signal conversion equipment 6 connects SPD chip 4 by I2C interface 5.Described main frame 1 also is connected with display device 7.
Described USB controller 2 is used for sending signal by USB interface 3, and USB controller 2 is integrated on the South Bridge chip of main frame 1 usually.
Described SPD chip 4 is used to preserve the configuration information (parameter informations such as speed, capacity, voltage and row, column address bandwidth) of internal memory module, the EEPROM that it is 256 bytes that described configuration information leaves a capacity in (Electrically ErasableProgrammable Read Only Memory, electrically erasable programmable ROM) in, and links to each other with I2C interface 5.
The usb signal that described main frame 1 is used for USB controller 2 is sent sends signal conversion equipment 6 to by USB interface 3.
The usb signal that described signal conversion equipment 6 is used for receiving converts the signal of I2C to.
Described main frame 1 also is used for sending the I2C of signal conversion equipment 6 conversion to SPD chip 4 by I2C interface 5, and whether whether the I2C signal by conversion can carry out operation judges I2C interface 5 to SPD chip 4 qualified.
Described signal conversion equipment 6 is used for the conversion of signals of USB is become the signal of I2C.
Described display device 7 is used to show the result of test.Described display device 7 can be a display, also can be other any appropriate display device.
As shown in Figure 2, be the functional block diagram of main frame shown in Fig. 11.Described main frame 1 comprises startup module 210, delivery module 211, judge module 212, display module 213.The alleged module of the present invention is to finish the computer program code segments of a specific function, be more suitable in describing the implementation of software in computing machine than program, therefore below the present invention to all describing in the software description with module.
Wherein, described startup module 210 is used to start USB controller 2, makes it produce usb signal.Described USB controller is used for USB interface is sent signal, and the USB controller is integrated on the South Bridge chip of main frame 1 usually.
Described delivery module 211 is used for sending the usb signal that USB controller 2 produces to signal conversion equipment 6 by USB interface 3.This signal conversion equipment 6 becomes the conversion of signals of this USB the signal of I2C.
The I2C signal that described delivery module 211 also is used for signal conversion equipment 6 is converted to sends SPD chip 4 to by I2C interface 5.
Described judge module 212 is used to judge whether the signal of described I2C can be operated SPD chip 4.Described operation is meant that the signal of I2C reads or revises the information on the SPD chip 4, for example: read the voltage on the SPD chip 4.
Described display module 213 is used for when the signal of described I2C can be operated SPD chip 4, with display device 7 that main frame 1 links to each other on show that 5 tests of I2C interface pass through.Particularly, if it is the usb signal that reads voltage on the SPD chip 4 that USB controller 2 sends, signal conversion equipment 6 these signals of conversion are the I2C signal, pass to SPD chip 4 by the I2C interface afterwards, and the I2C signal of process conversion can read the voltage on the SPD chip 4, show that to carry out signal transmission by I2C interface 5 normal, then described I2C interface 5 is qualified, shows 5 tests " PASS " of I2C interface on the display device 7.
Described display module 213 also is used for when the signal of described I2C can not be operated SPD chip 4, with display device 7 that main frame 1 links to each other on show that 5 tests of I2C interface are unusual.Particularly, if it is the usb signal that reads voltage on the SPD chip 4 that USB controller 2 sends, signal conversion equipment 6 these signals of conversion are the I2C signal, pass to SPD chip 4 by I2C interface 5 afterwards, and the I2C signal of process conversion can not read the voltage on the SPD chip 4, show by I2C interface 5 and carry out the signal transmission abnormality, then described I2C interface 5 is defective, shows 5 tests " FAIL " of I2C interface on the display device 7.
As shown in Figure 3, be the process flow diagram of internal integrate circuit bus interface method of testing of the present invention preferred embodiment.
Step S10 at first, starts module 210 and starts USB controller 2, makes it produce usb signal.Described USB controller 2 is used for sending signal by USB interface 3, and generally speaking, USB controller 2 is integrated on the South Bridge chip of main frame 1.
Step S11, delivery module 211 sends the usb signal that USB controller 2 produces to signal conversion equipment 6 by USB interface 3.
Step S12, signal conversion equipment 6 converts the usb signal that receives to the I2C signal.
Step S13, delivery module 211 sends the I2C signal that signal conversion equipment 6 converts to SPD chip 4 by I2C interface 5.
Step S14, judge module 212 judge whether the signal of described I2C can be operated SPD chip 4.Described operation is meant that the signal of I2C reads or revises the information on the SPD chip 4, for example: read the voltage on the SPD chip 4.
Step S15, when the signal of described I2C can be operated SPD chip 4, with display device 7 that main frame 1 links to each other on show that 5 tests of I2C interface pass through.Particularly, if it is the usb signal that reads voltage on the SPD chip 4 that USB controller 2 sends, signal conversion equipment 6 these signals of conversion are the I2C signal, pass to SPD chip 4 by I2C interface 5 afterwards, and the I2C signal of process conversion can read the voltage on the SPD chip 4, show that to carry out signal transmission by I2C interface 5 normal, then described I2C interface 5 is qualified, shows I2C interface testing " PASS " on the display device 7.
Step S16, when the signal of described I2C can not be operated SPD chip 4, with display device 7 that main frame 1 links to each other on show that 5 tests of I2C interface are unusual.Particularly, if it is the usb signal that reads voltage on the SPD chip 4 that USB controller 2 sends, signal conversion equipment 6 these signals of conversion are the I2C signal, pass to SPD chip 4 by I2C interface 5 afterwards, and the I2C signal of process conversion can not read the voltage on the SPD chip 4, show by I2C interface 5 and carry out the signal transmission abnormality, then described I2C interface 5 is defective, shows 5 tests " FAIL " of I2C interface on the display device 7.
USB controller, USB (universal serial bus), serial on display device, main frame, signal conversion equipment and the main frame that internal integrate circuit bus interface test system of the present invention and method utilization connect successively exists detection chip to judge whether the internal integrate circuit bus interface on the main frame is qualified, to reach the function of testing inner integrate circuit bus interface.
It should be noted last that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to above preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and scope of technical solution of the present invention.

Claims (6)

  1. [claim 1] a kind of internal integrate circuit bus interface test system, this system comprises main frame and signal conversion equipment, described main frame comprises that USB controller, USB (universal serial bus), serial exist detection chip and internal integrate circuit bus interface, described signal conversion equipment is used for converting universal serial bus signal to internal integrated circuit bus signal, it is characterized in that described main frame also comprises:
    Start module, be used for the startup USB controller of main frame, make it produce universal serial bus signal;
    Delivery module is used for sending the universal serial bus signal of above-mentioned generation to link to each other with main frame signal conversion equipment by USB (universal serial bus);
    Described delivery module, the internal integrated circuit bus signal that is used for that also signal conversion equipment is converted to sends serial to by internal integrate circuit bus interface and has detection chip; And
    Judge module is used to judge whether the signal of described internal integrate circuit bus can exist detection chip to operate to determine whether the internal integrate circuit bus interface test is passed through to serial.
  2. [claim 2] internal integrate circuit bus interface test system as claimed in claim 1 is characterized in that described USB controller is integrated on the South Bridge chip of main frame.
  3. [claim 3] internal integrate circuit bus interface test system as claimed in claim 1, it is characterized in that, described main frame also comprises display module, described display module is used for when the signal of described internal integrate circuit bus can exist detection chip to operate to serial, with display device that main frame links to each other on show that the internal integrate circuit bus interface test passes through, when the signal of described internal integrate circuit bus can not exist detection chip to operate to serial, with display device that main frame links to each other on show that the internal integrate circuit bus interface test is unusual.
  4. [claim 4] a kind of internal integrate circuit bus interface method of testing is characterized in that this method comprises the steps:
    Start the USB controller in the main frame, make it produce universal serial bus signal;
    Send described universal serial bus signal to link to each other signal conversion equipment by USB (universal serial bus) with main frame;
    Signal conversion equipment converts the universal serial bus signal that receives to internal integrated circuit bus signal;
    There is detection chip in this internal integrated circuit bus signal by the serial that internal integrate circuit bus interface sends in the main frame; And
    Judge whether described internal integrated circuit bus signal can exist detection chip to operate to determine whether the internal integrate circuit bus interface test is passed through to serial.
  5. [claim 5] internal integrate circuit bus interface method of testing as claimed in claim 4 is characterized in that described series bus controller is integrated on the South Bridge chip of main frame.
  6. [claim 6] internal integrate circuit bus interface method of testing as claimed in claim 4 is characterized in that this method also comprises step:
    When the signal of described internal integrate circuit bus can exist detection chip to operate to serial, with display device that main frame links to each other on show that the internal integrate circuit bus interface test passes through;
    When the signal of described internal integrate circuit bus can not exist detection chip to operate to serial, with display device that main frame links to each other on show that the internal integrate circuit bus interface test is unusual.
CN2007102018565A 2007-09-26 2007-09-26 Internal integrate circuit bus interface test system and method Expired - Fee Related CN101398467B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2007102018565A CN101398467B (en) 2007-09-26 2007-09-26 Internal integrate circuit bus interface test system and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2007102018565A CN101398467B (en) 2007-09-26 2007-09-26 Internal integrate circuit bus interface test system and method

Publications (2)

Publication Number Publication Date
CN101398467A true CN101398467A (en) 2009-04-01
CN101398467B CN101398467B (en) 2011-01-05

Family

ID=40517164

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007102018565A Expired - Fee Related CN101398467B (en) 2007-09-26 2007-09-26 Internal integrate circuit bus interface test system and method

Country Status (1)

Country Link
CN (1) CN101398467B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102608520A (en) * 2012-03-08 2012-07-25 无锡华大国奇科技有限公司 Chip testing system based on USB-IIC (universal serial bus to inter-integrated circuit) protocol
CN102628921A (en) * 2012-03-01 2012-08-08 华为技术有限公司 Integrated circuit and method for monitoring bus state in integrated circuit
CN104076811A (en) * 2014-06-12 2014-10-01 武汉精测电子技术股份有限公司 Test device and method of simulation iic chip
CN109189619A (en) * 2018-08-13 2019-01-11 光梓信息科技(上海)有限公司 I2C bus compatible test method, system, storage medium and equipment

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1290875A (en) * 1999-09-30 2001-04-11 台达电子工业股份有限公司 I2C test unit
US6829726B1 (en) * 2000-03-06 2004-12-07 Pc-Doctor, Inc. Method and system for testing a universal serial bus within a computing device
CN100573466C (en) * 2005-09-09 2009-12-23 鸿富锦精密工业(深圳)有限公司 The test macro of host interface and method
CN1770883A (en) * 2005-09-16 2006-05-10 深圳创维-Rgb电子有限公司 Method and apparatus for carrying out debugging for 12C component characteristic parameter
CN2888537Y (en) * 2006-04-19 2007-04-11 武汉电信器件有限公司 A digital communication interface conversion module

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102628921A (en) * 2012-03-01 2012-08-08 华为技术有限公司 Integrated circuit and method for monitoring bus state in integrated circuit
CN102628921B (en) * 2012-03-01 2014-12-03 华为技术有限公司 Integrated circuit and method for monitoring bus state in integrated circuit
US9201753B2 (en) 2012-03-01 2015-12-01 Huawei Technologies Co., Ltd. Integrated circuit and method for monitoring bus status in integrated circuit
CN102608520A (en) * 2012-03-08 2012-07-25 无锡华大国奇科技有限公司 Chip testing system based on USB-IIC (universal serial bus to inter-integrated circuit) protocol
CN104076811A (en) * 2014-06-12 2014-10-01 武汉精测电子技术股份有限公司 Test device and method of simulation iic chip
CN104076811B (en) * 2014-06-12 2017-01-25 武汉精测电子技术股份有限公司 Test device and method of simulation iic chip
CN109189619A (en) * 2018-08-13 2019-01-11 光梓信息科技(上海)有限公司 I2C bus compatible test method, system, storage medium and equipment
CN109189619B (en) * 2018-08-13 2023-03-17 光梓信息科技(上海)有限公司 I2C bus compatibility test method, system, storage medium and equipment

Also Published As

Publication number Publication date
CN101398467B (en) 2011-01-05

Similar Documents

Publication Publication Date Title
CN111063386A (en) DDR chip testing method and device
US20120137027A1 (en) System and method for monitoring input/output port status of peripheral devices
CN101398467B (en) Internal integrate circuit bus interface test system and method
CN113778055B (en) TBOX detection method and detection system
CN101599035A (en) USB port proving installation and method
CN102053898A (en) Method for testing bus interface on PCIE (Peripheral Component Interface Express) slot of host and read-write test method thereof
CN101446913B (en) Method and device for detecting equipment faults
US20090313504A1 (en) Bios test system and test method thereof
CN102662808B (en) Method and device for realizing hardware fault detection on PCIE (peripheral component interconnect express)
CN108806761A (en) A kind of SSD function test methods, system and computer storage media
CN109710479B (en) Processing method, first device and second device
US8102180B2 (en) CPU voltage testing system and method thereof
CN113434442A (en) Switch and data access method
CN102103536A (en) Board test device and method
CN110570897B (en) Memory detection system, memory detection method and error mapping table establishing method
CN101452415B (en) Auxiliary device and method for testing embedded system
CN102819473B (en) A kind of method of detection computations machine fault, computing machine and display device
CN103365735A (en) Transmission interface and method for determining transmission signal
CN109885437A (en) Baseboard management controller BMC, terminal and power-up state diagnotic module, method
CN101452417A (en) Monitor method and monitor device thereof
CN111459730A (en) PCH (physical channel) end parameter adjusting method and system under Whitley platform
CN113567834A (en) Small card circuit path testing method and device, computer equipment and storage medium
CN102221650A (en) Testing module for adapter element
US20100008476A1 (en) Testing system and method for testing a modem interface function of a computer
CN113869108B (en) Method and related device for identifying equipment connected with hard disk backboard

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110105

Termination date: 20140926

EXPY Termination of patent right or utility model