CN100484364C

CN100484364C - Near-end crosstalk compensation at multi-stages

Info

Publication number: CN100484364C
Application number: CNB2004800074832A
Authority: CN
Inventors: 鲁克·阿德里思; 阿米德·哈西姆; 特洛伊·朗
Original assignee: Commscope Solutions Properties LLC
Current assignee: Commscope Inc of North Carolina
Priority date: 2003-03-21
Filing date: 2004-03-17
Publication date: 2009-04-29
Anticipated expiration: 2024-03-17
Also published as: CN1762184A

Abstract

A connector is provided for simultaneously improving both the NEXT high frequency performance when low crosstalk plugs are used and the NEXT low frequency performance when high crosstalk plugs are used. The connector includes PCB substrates made of materials having different dielectric frequency characteristics.

Description

Near-end crosstalk compensation at multi-stages

The application requires the priority of the U.S. Provisional Application submitted to on March 21st, 2003 number 60/456236, and its full content is incorporated by reference herein.

Technical field

The present invention relates to near-end crosstalk (NEXT) compensation in communications connectors, more particularly, the technology of NEXT is eliminated or reduced to the substrate that relates to use such as the printed circuit board (PCB) of being made up of the differing dielectric constant material (PCB).

Background technology

Noise in connector between the conductor or signal disturb and are called as cross-talk.Cross-talk is a common difficult problem in the communication device that uses connector.Especially, in modulus plug through being usually used in computer and the close-fitting communication system of modular jack, the conductor wire of socket and/or plug inside (conductor) causes near-end crosstalk (NEXT), that is, and and the cross-talk in short distance on the approaching conductor wire in position.A plug is because the form that its structure or cable end at this plug can produce high cross-talk or low cross-talk.There is the plug of high cross-talk to be called as high crosstalk plug in this article, and has the plug of low cross-talk to be called as low crosstalk plug at this paper.

Authorize people's such as Adriaenssens U.S. Patent number 5997358 (hereinafter referred to as " ' 358 patent ") and described a secondary pattern that is used to compensate this NEXT.The full content of ' 358 patents is incorporated by reference herein.Further, U.S. Patent number 5915989; 6042427; 6050843; Also be incorporated by reference herein with 6270381 subject content.

' 358 patents usually by adds in socket with two-stage conductor wire that synthetic or artificial cross-talk reduces the modulus plug between NEXT (initial cross-talk), thereby eliminate cross-talk or reduce the overall cross talk that plug and socket makes up.Synthetic cross-talk is called as compensation crosstalk at this paper.This method generally by the circuit of the inner conductor of connector and the circuit of inner another conductor of connector are intersected twice, provides two-stage NEXT compensation thus.To add the pattern of compensation than single-stage more efficient reducing aspect the NEXT for this pattern, especially except after certain time-delay with external compensation can not be introduced into generally all the more so.

Although effectively, but the NEXT compensation scheme of ' 358 patents has a shortcoming, just, on low frequency (being lower than about 100MHz), degenerate when high crosstalk plug is used to socket with telecommunication TIA (TIA) the relevant NEXT tolerance limit of limit line, and when low crosstalk plug is used to socket, on high-frequency (surpassing about 250MHz), degenerate.More particularly, when the clean compensation crosstalk in the jack of secondary compensation is less than initial cross-talk (promptly, when high crosstalk plug is inserted in the jack) time, the plug-socket combination is considered to undercompensation, and before on zero-bit is arranged on by the big or small determined Frequency point of inter-stage delay and compensated stage, result's NEXT frequency characteristic will reach peak value on low frequency.In the case, relevant with TIA limit line NEXT tolerance limit is the poorest on low frequency.On the other hand, when the clean compensation crosstalk in this socket is higher than initial cross-talk (promptly, when low crosstalk plug is inserted into) time, the plug and socket combination is considered to overcompensate, and result's NEXT frequency characteristic will not have zero-bit, and the slope of NEXT frequency characteristic will little by little increase towards the 60dB/ decade on the high-frequency very much, considerably beyond the decimal limit slope of the 20dB/ of TIA.In the case, relevant with TIA limit line NEXT tolerance limit is the poorest on high-frequency.

Thereby although low frequency margin (low frequency characteristic of connector) can improve by increasing compensation level when high crosstalk plug is used to socket, this behavior meeting causes high frequency margin further to degenerate when low crosstalk plug is used to socket.On the contrary, although high frequency margin can improve by reducing compensation level when low crosstalk plug is used to socket, this behavior meeting causes low frequency margin further to degenerate when high crosstalk plug is used to socket.

Therefore just exist a kind of technical need, this technology can reduce simultaneously or eliminate when hang down crosstalk plug when being used such as 250MHz or on high-frequency, and when high crosstalk plug is used such as 100MHz or under low frequency on NEXT.

Summary of the invention

The present invention has overcome a difficult problem and the limitation that reduces the correlation technique of the NEXT in the connector.Specifically, the invention provides a kind of apparatus and method, by with the different substrate of the multistage bucking-out system of made with different dielectric frequency characteristics, the NEXT low frequency performance when improving the NEXT high frequency performance when using low crosstalk plug simultaneously and using high crosstalk plug.Therefore, the present invention had both improved the low frequency of modulus output and panel (for example, 1-100MHz) the cross-talk performance had improved high frequency (for example, 250-500MHz again; Or 500MHz and Geng Gao) the cross-talk performance.

Description of drawings

By with reference to the accompanying drawings from the following detailed description of embodiments of the invention, various aspects of the present invention will become apparent, wherein:

Fig. 1 (a) is the end view according to the connector of the first embodiment of the present invention;

Fig. 1 (b) is the printed circuit board (PCB) of the Fig. 1 (a) according to the first embodiment of the present invention and the plan view from above of compensation condenser;

Fig. 2 is the plan view from above of the printed circuit board (PCB) and the compensation condenser of connector according to a second embodiment of the present invention;

Fig. 3 (a) is the end view of printed circuit board (PCB) of the connector of a third embodiment in accordance with the invention;

Fig. 3 (b) is the printed circuit board (PCB) of Fig. 3 (a) of a third embodiment in accordance with the invention and the plan view from above of compensation condenser;

Fig. 4 (a) is the end view of printed circuit board (PCB) of the connector of a fourth embodiment in accordance with the invention;

Fig. 4 (b) is the printed circuit board (PCB) of Fig. 4 (a) of a fourth embodiment in accordance with the invention and the plan view from above of compensation condenser; With

Fig. 5 is the end view of connector according to a fifth embodiment of the invention.

Embodiment

Now will be in detail with reference to the example in the preferred embodiments of the present invention explanation accompanying drawing.In this application, " level " is meant the place of carrying out the compensation of generation on compensating delay point.

The invention provides the printed circuit board (PCB) (PCB) of multiple structure, the printed circuit board (PCB) of this structure can replace the printed substrate of Fig. 7 A in ' 358 patents.In certain embodiments, PCB of the present invention constitutes by stacked a plurality of substrates with differing dielectric constant (DK).

According to the first embodiment of the present invention, Fig. 1 (a) is the end view of connector, and Fig. 1 (b) is the printed circuit board (PCB) of Fig. 1 (a) and the plan view from above of compensation condenser.

With reference to figure 1 (a) and 1 (b), connector comprises the contact 30 with jumper 14 and mixes PCB10, closely cooperates with connector at this place's plug 20.Plug 20 can be the modulus plug, such as being used for telephone wire or personal computer being connected to the plug of the end of the patch cord of accessory power outlet on the wall.Can be soldered or be pressed into the electroplating ventilating hole that is fitted on the appropriate location that is arranged in PCB10 and can be the spring wire contact in contact 30.In addition, contact 30 has current carrying part 30b and non-current carry part 30a, indicates the line of demarcation BD between these parts 30a and the 30b in Fig. 1 (a).Contact 30 and PCB10 can be positioned in the shell such as modular jack, when plug 20 enters socket, the electric contact on the plug 20 are closely cooperated via the electric contact on contact 30 and the PCB10.

PCB10 according to first embodiment is made up of alternately laminated five substrates (S1-S5) and six metal layers (ML1-ML6).More specifically, substrate and metal layer are stacked with following order (from top to bottom): ML1, S1, ML2, S2, ML3, S3, ML4, S4, ML5, S5 and ML6.Half of the first substrate S1, the second substrate S2 and the 3rd substrate S3/part is made by the material with low slope DK (that is, dielectric constant is low with respect to the rate of descent of frequency).Dielectric constant is the well-known term that material stores the ability of electrostatic energy that is used to describe.Second half of the 3rd substrate S3/partly, the 4th substrate S4 and the 5th substrate S5 are made by the material with high slope DK (that is, dielectric constant is with respect to the rate of descent height of frequency).The use of two different DK materials of substrate S1-S5 is by hatched existence and do not have expression.

Metal layer ML1-ML6 represents to be formed on the metallized conductive pattern on the substrate surface respectively, and this substrate directly is in the below of respective metal layer.In Fig. 1 (b), the contact 30 with the jumper 14 shown in Fig. 1 (a) for example is represented as conductor wire to 12, and is shown as and is formed on the first metal layer ML1.As the interdigital capacitor 40a of first order compensation condenser with 40b is respectively formed at the 4th and the 5th metal layer ML4 and ML5 goes up or as their part.As the interdigital capacitor 42a of second level compensation condenser with 42b is respectively formed at the second and the 3rd metal layer ML2 and ML3 goes up or as their part.Interdigital capacitor is the capacitor with isoplanar arrangement of two intermeshing metal combs on each comfortable different electromotive force, and known.

In this embodiment,

capacitor

40a and 40b are replicated on layer ML4 and the ML5, and

capacitor

42a and 42b are replicated on layer ML2 and the ML3.In this application, relevant with compensation condenser " duplicating " meaning is to be replicated on the metal layer of whole appointments identically.In other words, capacitor 40a will have the identical shape and size with capacitor 40b, and with capacitor 40b vertical alignment.Similarly, capacitor 42a will have the identical shape and size with capacitor 42b, and with capacitor 42b vertical alignment.The reason of duplicating interdigital capacitor is to increase footprint (surface coverage) in order to increase capacitance.Can not need such duplicating with the interdigital capacitor of bigger footprint yet.On the other hand, if printed circuit board (PCB) has been configured to more metal layer, interdigital capacitor can be replicated in more than on two the metal layer so, can make littler footprint if desired.

According to the present invention, if when being used for the interdigital capacitor of the use of different DK materials of substrate and metal layer and jumper conductor wire right use can the minimizing plug of being introduced by plug 20 20 and being low crosstalk plug in high-frequency, and if plug 20 NEXT on low frequency when being high crosstalk plug.How work was carried out being explained as follows.

NEXT is by owing to two factors: capacitive coupling and inductance coupling high.Article two, conductor wire closely near causing capacitive coupling, and the electric current that flows through these conductor wires causes inductance coupling high.Thereby plug 20 has been introduced capacitive coupling and inductance coupling high when itself and contact 30 closely cooperate, and therefore produces NEXT.

In order to reduce or to compensate the NEXT that is caused by inductance coupling high, conductor wire has jumper 14 to 12 (contacts 30).This is known and come out with in ' 358 patents.

In order to reduce or to compensate the NEXT that is caused by capacitive coupling, PCB10 comprises the capacitance compensation factor of two-stage.In Fig. 1 (a) and 1 (b), the first order is in from the minimum delay part that initial cross-talk begins, on the part of PCB10, the first order is directly electrically connected to the place of the intercepting contact 30, contact of plug 20 via the non-current carry part 30a of contact 30 on this part everywhere for this.The second level is in some that begin from the first order and postpones part, and this is everywhere on the part of PCB10, and the current carrying part 30b via contact 30 removes this part from the place of the intercepting contact 30, contact of plug 20.

In a plurality of embodiment of the present invention, interdigital or parallel plate capacitors are placed on the metal layer that the substrate with high slope DK material is made of the first order combines.The capacitor that plane-parallel capacitor is made up of two parallel metal sheets on different electromotive forces, and be known capacitor.In the second level, interdigital or parallel plate capacitors be placed in hang down the metal layer that substrate that slope DK material makes combines on.For example, in first embodiment, because substrate S4 and S5 make by high slope DK material, thereby

interdigital capacitor

40a and 40b are respectively placed on the metal layer ML4 and ML5 in first order zone.Same because substrate S1 and S2 are made by low slope DK material, thereby

interdigital capacitor

42a and 42b are respectively placed on the metal layer ML2 and ML3 in zone, the second level.

In the present invention, by in having the PCB substrate of high DK slope, settling first order interdigital capacitor (or capacitor of other type) to make the capacity coupled size of the first order along with frequency descends.On the other hand, by in having the PCB substrate of low DK slope, settling second level interdigital capacitor (or capacitor of other type) to make second level capacitive coupling with the frequency relatively flat.As a result, the clean compensation crosstalk (synthetic cross-talk) that deducts the connector that second level compensation crosstalk forms by first order compensation crosstalk is along with the frequency increase of frequency (that is, along with) descends.In other words, clean compensation crosstalk depends on changeable frequency, thereby make the present invention provide low-level compensation crosstalk to make that the overcompensate of cross-talk minimizes in the connector, thereby and provide high-caliber compensation crosstalk that the crosstalk compensation deficiency in the connector is minimized at low frequency at high frequency.The high frequency margin of connector when being inserted into socket by provide low-level compensation crosstalk, the present invention to improve low crosstalk plug at high frequency.On the other hand, the low frequency margin of connector when providing high-caliber compensation crosstalk, the present invention to improve high crosstalk plug to be inserted into socket at low frequency.

Fig. 2 is the printed circuit board (PCB) of Fig. 1 (a) according to a second embodiment of the present invention and the plan view from above of compensation condenser.Second embodiment and first embodiment are identical except using dissimilar compensation condensers.That is, first order compensation condenser uses plane-

parallel capacitor

46a and 46b to realize, second level compensation condenser uses plane-parallel capacitor 48a and 48b to realize.Plane-

parallel capacitor

46a and 46b are respectively formed on the metal layer ML4 and ML5 of Fig. 1 (a), and plane-parallel capacitor 48a and 48b are respectively formed on metal layer ML2 and the ML3.As a result, second embodiment is to turn round with the same mode of first embodiment and to obtain above-mentioned identical benefit.

A third embodiment in accordance with the invention, Fig. 3 (a) is the end view of the printed circuit board (PCB) of connector, Fig. 3 (b) is the printed circuit board (PCB) of Fig. 3 (a) and the plan view from above of compensation condenser.The 3rd embodiment is similar to first embodiment, and wherein connector comprises the plug of contact 30 and PCB and admittance such as plug 20.Yet, replace as using the mixing PCB10 that makes by high slope and low slope DK material among first embodiment, in the 3rd embodiment, use the PCB50 of homogeneity, wherein all substrates of PCB are all made by high slope DK material.Equally, replace and pass through among the PCB to use interdigital or parallel plate capacitors integrated capacitor, can use the capacitor of surface installing type in zone, the second level.

Particularly, with reference to figure 3 (a), form by alternately laminated four substrate S1-S4 and five metal layer ML1-ML5 according to the PCB50 of the 3rd embodiment.Whole four substrate S1-S4 are made by high DK material.30 not do not show among Fig. 3 (a) in the contact on the first metal layer ML1, still in Fig. 3 (b), be shown as have jumper 14 conductor wire to 12.

With reference to figure 3 (b), in the first order,

parallel plate capacitors

60a and 60b are respectively formed at that the second and the 3rd metal layer ML2 and ML3 go up or as their part, and wherein two of each

capacitor plate

60a and 60b are parallel to each other.In the second level,

surface mount capacitor

62a and 62b are installed in the first metal layer ML1 and go up (or being installed under the last metal layer).

In this embodiment, the capacity coupled size of the first order is along with frequency descends, because first order

parallel plate capacitors

60a and 60b are among the PCB50 with high DK slope.On the other hand, second level capacitive coupling is along with the frequency relatively flat, because second level electric capacity uses discrete surface mount capacitor to realize.As a result, deduct clean compensation crosstalk that second level compensation crosstalk forms along with frequency descends by first order compensation crosstalk.By low-level compensation crosstalk is provided in high frequency, the high frequency margin of connector when the present invention has improved low crosstalk plug and is inserted into socket.On the other hand, by high-caliber compensation crosstalk is provided in low frequency, the low frequency margin of connector when the present invention has improved high crosstalk plug and is inserted into socket.

A fourth embodiment in accordance with the invention, Fig. 4 (a) is the end view of the printed circuit board (PCB) of connector, Fig. 4 (b) is the printed circuit board (PCB) of Fig. 4 (a) and the plan view from above of compensation condenser.

The 4th embodiment is similar to first embodiment, and wherein connector comprises the plug of contact 30 and admittance such as plug 20.Yet, replace and use the mixing PCB10 that makes by high and low DK material as among first embodiment, the PCB of two homogeneities is set in the connector in the 4th embodiment, wherein all substrates of a PCB are all made by high slope DK material, and all substrates of the 2nd PCB are all made by low slope DK material.

Particularly, with reference to figure 4 (a), in the 4th embodiment, a PCB70 is made up of alternately laminated four substrate S1-S4 and five metal layer ML1-ML5.Four substrate S1-S4 of in a PCB70 all are made by high slope DK material.The 2nd PCB72 is made up of alternately laminated four substrate S1-S4 and five metal layer ML1-ML5.Four substrate S1-S4 of in the 2nd PCB72 all are made by low slope DK material.Contact 30 on the first metal layer ML1 is not presented among Fig. 4 (a), but in Fig. 4 (b), be shown as have jumper 14 conductor wire to 12.

With reference to figure 4 (b), in the first order,

capacitor

80a and 80b are respectively formed at the second and the 3rd metal layer ML2 of a PCB70 and ML3 goes up or as the interdigital capacitor of their parts.In the second level,

capacitor

82a and 82b are respectively formed at the second and the 3rd metal layer ML2 of the 2nd PCB72 and ML3 goes up or as the interdigital capacitor of their parts.

In this embodiment, the capacity coupled size of the first order is along with frequency descends, because first order interdigital capacitor is among the PCB70 with high DK slope.On the other hand, second level capacitive coupling is along with frequency is quite smooth, because second level interdigital capacitor is among the PCB72 with low DK slope.As a result, deduct clean compensation crosstalk that second level compensation crosstalk forms along with frequency descends by first order compensation crosstalk.The high frequency margin of connector when being inserted into socket by provide low-level compensation crosstalk, the present invention to improve low crosstalk plug at high frequency.On the other hand, the low frequency margin of connector when providing high-caliber compensation crosstalk, the present invention to improve high crosstalk plug to be inserted into socket at low frequency.

Fig. 5 is the end view of connector according to a fifth embodiment of the invention.The 5th embodiment is similar to first embodiment, and wherein connector comprises the plug of contact 30 and PCB and admittance such as plug 20.Yet, being substituted in and having five substrates among the PCB, PCB90 has four substrates in the 5th embodiment.

Particularly, with reference to figure 5, mix PCB90 and form by alternately laminated four substrate S1-S4 and five metal layer ML1-ML5.The first and second substrate S1 and S2 are made by high slope DK material, and the third and fourth substrate S3 and S4 are made by low slope DK material.In the first order, interdigital capacitor 94a is formed on that metal layer ML2 goes up or as its part.In the second level, interdigital capacitor 96a is formed on that metal layer ML4 goes up or as its part.

In this embodiment, the capacity coupled size of the first order descends along with frequency, because first order interdigital capacitor is between the substrate S1 and S2 with high DK slope.On the other hand, second level capacitive coupling is not along with frequency obviously descends, because second level interdigital capacitor is between the substrate S3 and S4 with low DK slope.As a result, deducting the clean compensation crosstalk that second level compensation crosstalk forms by first order compensation crosstalk descends along with frequency.By low-level compensation crosstalk is provided in high frequency, the high frequency margin of connector when the present invention has improved low crosstalk plug and is inserted into socket.On the other hand, by high-caliber compensation crosstalk is provided in low frequency, the low frequency margin of connector when the present invention has improved high crosstalk plug and is inserted into socket.

In various embodiment of the present invention, the high slope DK material that is used to the PCB substrate preferably has and equals or about 4.0 dielectric constant at 1MHz, and the every decimal rate of descent of the frequency of this dielectric constant is 0.4 between 1MHz and 1GHz.The low slope DK material that is used to the PCB substrate preferably has and equals or about 4.0 dielectric constant, and wherein the frequency range planted agent at 1MHz and 1GHz keeps smooth.As an example, can be used as the PCB substrate such as the material of FR-4 and/or Teflon.Other can be used by commercial height and the low slope DK material that obtains.For example, Nelco N4000-7 is the high slope DK examples of material that can be used for PCB substrate of the present invention, and Nelco N4000-13 SI is the low DK slope examples of material that can be used for PCB substrate of the present invention.Nelco N4000-7 has at 1MHz and is 4.5 and is 3.9 dielectric constant at 1GHz, and Nelco N4000-13 SI has at 1MHz and is 3.6 and is 3.5 dielectric constant at 1GHz.Also have, if desired, the dielectric constant level of these materials can be adjusted at an easy rate by the foot-print areas of regulating interdigital or parallel plate capacitors.Like this, can use the material of the dielectric constant in 1MHz has about 3.0 to 5.0 scopes.Obviously also can use other materials.

Usually, the dielectric constant of most of printed circuit board material (DK) is along with frequency descends.In 2 grades of bucking-out systems of routine, owing to first and second compensated stages at same material substrate deploy reversed polarity, the effect of this decline is weakened to a great extent.This makes first and second grades identical DK rate of descent is arranged.The present invention has the first order of being intended to use to have the material of very precipitous DK rate of descent and has the material of very low DK rate of descent in second level use.This has the tendency of this sample loading mode with regard to the capacitive coupling that makes the result, promptly along with frequency increases the aggregate level that reduces compensation, thereby has improved high frequency NEXT performance.

Although four or five PCB substrates have been described, it is evident that very the PCB substrate of any other quantity and/or metal layer can be used to PCB.An importance is that when relatively being used to make the material of low slope DK substrate and high slope DK substrate, there is big difference in the DK slope.Difference between high DK slope and the low DK slope can be in the scope of every decade 0.15 to 0.45 of frequency.

Owing to have the material of two different DK slopes, suppress the NEXT of connector better thereby the designer of connector has the design/greater flexibility of raising capacitor value.Further, each grade of suppressing of NEXT can be positioned on the substrate with very different DK slopes/substrate between.Result's of the present invention connector can combine with shell, insulation displacement connector, jack spring contact etc.

Also have, various structures of the foregoing description and feature can be combined or be replaced by other embodiment.For example, parallel plate capacitors 60a, the 60b in Fig. 3 (b) can replace with interdigital capacitor.

Interdigital capacitor

80a, 80b, 82a, 82b in Fig. 4 (b) can replace with parallel plate capacitors.No matter where interdigital capacitor is used in, and this capacitor can be replicated with respect to corresponding other interdigital capacitor.In a connector, some interdigital capacitor can be implemented on the single metal layer or on several metal layer.Further, as indicated above, can use any amount of metalized layers/substrates that is used for one or more PCB; The position of high and/or low slope DK material can change; The position of compensation condenser can change according to the use and the position of high and/or low DK slope material; And can use dissimilar capacitor (for example, parallel-plate-type, interdigital, surface installing type etc.).

Although the present invention describes by the embodiment shown in the above-mentioned accompanying drawing, but should be appreciated that common in the art those skilled in the art, the present invention is not limited to these embodiment, and can carry out various variations or modification to it without departing from the spirit of the invention.

Claims

1, a kind of printed circuit board (PCB) (PCB) structure can be used for reducing cross-talk in the connector, it is characterized in that, this PCB structure comprises:

At least one PCB, this PCB comprises a plurality of substrates and a plurality of metal layers between substrate, this substrate comprises at least one first substrate made by first material and at least one second substrate of being made by second material, first material has first dielectric constant, and second material has second dielectric constant that is lower than first dielectric constant on the rate of descent with frequency;

Be arranged on described at least one first on-chip at least one first capacitor in the first order zone of PCB structure; With

Be arranged on described at least one second on-chip at least one second capacitor in the zone, the second level of PCB structure.

2, PCB structure as claimed in claim 1 is characterized in that, wherein, first dielectric constant is 4.0 at 1MHz, and the every decimal rate of descent of the frequency of this first dielectric constant is 0.4 between 1MHz and 1GHz.

3, PCB structure as claimed in claim 1 is characterized in that, wherein, second dielectric constant is 4.0, remains unchanged in the frequency range of 1MHz and 1GHz.

4, PCB structure as claimed in claim 1 is characterized in that, wherein, the substrate of PCB is five mutual stacked substrates,

The part of first substrate, second substrate and the 3rd substrate make by second material and

The part of the 3rd substrate, the 4th substrate and the 5th substrate are made by first material.

5, PCB structure as claimed in claim 4 is characterized in that, wherein, described at least one first capacitor comprises the 4th and the 5th on-chip two first capacitor elements in the first order zone that is formed on the PCB structure.

6, PCB structure as claimed in claim 5 is characterized in that, wherein, and described two first capacitor boards that capacitor element is interdigital capacitor or parallel plate capacitors.

7, PCB structure as claimed in claim 4 is characterized in that, wherein, described at least one second capacitor comprises the second and the 3rd on-chip two second capacitor elements in the zone, the second level that is formed on the PCB structure.

8, PCB structure as claimed in claim 7 is characterized in that, wherein, and described two second capacitor boards that capacitor element is interdigital capacitor or parallel plate capacitors.

9, PCB structure as claimed in claim 1 is characterized in that, wherein, the substrate of PCB is four substrates that are laminated to each other,

First substrate and second substrate make by first material and

The 3rd substrate and the 4th substrate are made by second material.

10, PCB structure as claimed in claim 9 is characterized in that, wherein, described at least one first capacitor comprises second on-chip first capacitor in the first order zone that is formed on the PCB structure.

11, PCB structure as claimed in claim 9 is characterized in that, wherein, described at least one second capacitor comprises the 4th on-chip second capacitor in the zone, the second level that is formed on the PCB structure.

12, PCB structure as claimed in claim 1 is characterized in that, wherein, described at least one PCB comprises first and second PCB, and a PCB comprises the substrate of being made by first material, and the 2nd PCB comprises the substrate of being made by second material.

13, PCB structure as claimed in claim 12 is characterized in that, wherein, described at least one first capacitor comprises at least two on-chip two first capacitor elements of a PCB in the first order zone that is formed on the PCB structure.

14, PCB structure as claimed in claim 13 is characterized in that, wherein, two first capacitor elements are capacitor boards of interdigital capacitor or parallel plate capacitors.

15, PCB structure as claimed in claim 12 is characterized in that, wherein, described at least one second capacitor comprises at least two on-chip two second capacitor elements of the 2nd PCB in the zone, the second level that is formed on the PCB structure.

16, PCB structure as claimed in claim 15 is characterized in that, wherein, and described two second capacitor boards that capacitor element is interdigital capacitor or parallel plate capacitors.

17, a kind of printed circuit board (PCB) (PCB) structure can be used for reducing cross-talk in the connector, it is characterized in that, this PCB structure comprises:

Printed circuit board (PCB) (PCB) comprises stacked a plurality of substrates and a plurality of metal layers between substrate, and this substrate is made by the material that has the dielectric constant of first rate of descent with frequency;

Be arranged on one of them on-chip at least one first capacitor in the first order zone of PCB structure; With

Be arranged on one of them on-chip at least one second capacitor in the zone, the second level of PCB structure.

18, PCB structure as claimed in claim 17 is characterized in that, wherein, substrate material has 4.0 dielectric constant at 1MHz, and between 1MHz and 1GHz, described first rate of descent is 0.4 every decade frequency.

19, PCB structure as claimed in claim 17 is characterized in that, wherein, described at least one first capacitor comprises at least two on-chip two first capacitor elements in the first order zone that is formed on the PCB structure.

20, PCB structure as claimed in claim 19 is characterized in that, wherein, and described two first capacitor boards that capacitor element is interdigital capacitor or parallel plate capacitors.

21, PCB structure as claimed in claim 17 is characterized in that, wherein, described at least one second capacitor comprises on first substrate in the zone, the second level that is surface mounted in the PCB structure or the second independent discrete capacitor under last substrate.

22, a kind of connector that is used to reduce cross-talk is characterized in that, comprising:

At least one printed circuit board (PCB) (PCB), this PCB comprises a plurality of substrates and a plurality of metal layers between substrate, this substrate comprises at least one first substrate made by first material and at least one second substrate of being made by second material, first material has first dielectric constant, and second material has second dielectric constant that is lower than first dielectric constant on the rate of descent with frequency;

Be arranged on described at least one first on-chip at least one first capacitor in the first order zone of connector;

Be arranged on described at least one second on-chip at least one second capacitor in the zone, the second level of connector; With

Be arranged at least one conductive contact on the PCB.

23, connector as claimed in claim 22 is characterized in that, wherein, first dielectric constant is 4.0 at 1MHz, and the every decimal rate of descent of the frequency of this dielectric constant is 0.4 between 1MHz and 1GHz.

24, connector as claimed in claim 22 is characterized in that, wherein, second dielectric constant is 4.0, remains unchanged in the frequency range of 1MHz and 1GHz.

25, connector as claimed in claim 22 is characterized in that, wherein, the substrate of PCB is five mutual stacked substrates,

26, connector as claimed in claim 25 is characterized in that, wherein, described at least one first capacitor comprises the 4th and the 5th on-chip two first capacitor elements in the first order zone that is formed on connector.

27, connector as claimed in claim 25 is characterized in that, wherein, described at least one second capacitor comprises the second and the 3rd on-chip two second capacitor elements in the zone, the second level that is formed on connector.

28, connector as claimed in claim 22 is characterized in that, wherein, the substrate of PCB is four mutual stacked substrates,

First substrate and second substrate make by first material and

The 3rd substrate and the 4th substrate are made by second material.

29, connector as claimed in claim 28 is characterized in that, wherein, described at least one first capacitor comprises second on-chip first capacitor in the first order zone that is formed on connector.

30, connector as claimed in claim 28 is characterized in that, wherein, described at least one second capacitor comprises the 4th on-chip second capacitor in the zone, the second level that is formed on connector.

31, connector as claimed in claim 22 is characterized in that, wherein, described at least one PCB comprises first and second PCB, and a PCB comprises the substrate of being made by first material, and the 2nd PCB comprises the substrate of being made by second material.

32, connector as claimed in claim 31 is characterized in that, wherein, described at least one first capacitor comprises at least two on-chip two first capacitor elements of a PCB in the first order zone that is formed on connector.

33, connector as claimed in claim 31 is characterized in that, wherein, described at least one second capacitor comprises at least two on-chip two second capacitor elements of the 2nd PCB in the zone, the second level that is formed on connector.

34, a kind of connector that is used to reduce cross-talk is characterized in that, comprising:

Printed circuit board (PCB) (PCB) comprises a plurality of stacked substrates and a plurality of metal layers between substrate, and this substrate is made by the material that has the dielectric constant of first rate of descent with frequency;

Be arranged on one of them on-chip at least one first capacitor in connector first order zone;

Be arranged on one of them on-chip at least one second capacitor in zone, the connector second level; With

Be arranged at least one conductive contact on the PCB.

35, connector as claimed in claim 34 is characterized in that, wherein, substrate material has 4.0 dielectric constant at 1MHz, and between 1MHz and 1GHz, described first rate of descent is 0.4 every decade frequency.

36, connector as claimed in claim 34 is characterized in that, wherein, described at least one first capacitor comprises at least two on-chip two first capacitor elements in the first order zone that is formed on connector.

37, connector as claimed in claim 36 is characterized in that, wherein, and described two first capacitor boards that capacitor element is interdigital capacitor or parallel plate capacitors.

38, connector as claimed in claim 34 is characterized in that, wherein, described at least one second capacitor comprises on first substrate in the zone, the second level that is surface mounted in connector or the second independent discrete capacitor under last substrate.

39, a kind of printed circuit board (PCB) is used for providing crosstalk compensation at electric power connector, it is characterized in that, comprising:

A plurality of leads;

First collocation structure, the first crosstalk compensation signal that will have first amplitude offers first in described a plurality of conductive traces; With

Second collocation structure, the second crosstalk compensation signal that will have second amplitude offer in described a plurality of conductive traces described first;

Wherein, the ratio of described first amplitude and second amplitude is with frequency shift.

40, printed circuit board (PCB) as claimed in claim 39, it is characterized in that, described first collocation structure comprises the capacitor that has first dielectric constant material with first rate of descent that descends with frequency, described second collocation structure comprises the capacitor that has second dielectric constant material with second rate of descent that descends with frequency, and the difference between described first rate of descent and described second rate of descent is in the scope of the every decade 0.15 to 0.45 of frequency.

41, printed circuit board (PCB) as claimed in claim 40 is characterized in that, is 0.2 at 1MHz described first rate of descent of the every decade of frequency in the frequency range of 1GHz.

42, printed circuit board (PCB) as claimed in claim 40 is characterized in that, is 0.4 at 1MHz described first rate of descent of the every decade of frequency in the frequency range of 1GHz.

43, printed circuit board (PCB) as claimed in claim 40 is characterized in that, 1MHz in the frequency range of 1GHz described second rate of descent along with frequency is smooth.

44, printed circuit board (PCB) as claimed in claim 39 is characterized in that, described first collocation structure comprise have with described second collocation structure in electric capacity be in a ratio of the capacitor of high slope dielectric constant material.

45, printed circuit board (PCB) as claimed in claim 39 is characterized in that, described second collocation structure comprise have with described first collocation structure in electric capacity be in a ratio of the capacitor of low slope dielectric constant material.

46, printed circuit board (PCB) as claimed in claim 39 is characterized in that, the described first crosstalk compensation signal has different polarity with the described second crosstalk compensation signal, and life period postpones between the described first and second crosstalk compensation signals.

47, a kind of method that designs electric connector is characterized in that, this method comprises:

To offer the conductor of described electric connector with first ratio with first compensating signal of frequency shift;

To offer the described conductor of described electric connector with second ratio different with described first ratio with second compensating signal of frequency shift; And

When use in the described electric connector be high crosstalk plug the time, select in the frequency range of 100MHz described first and second ratios to reduce near-end crosstalk on the described conductor at 1MHz; When use in the described electric connector is low crosstalk plug the time, select described first and second ratios to reduce described near-end crosstalk on the described conductor in the frequency more than the 250MHz.

48, method as claimed in claim 47, it is characterized in that, provide to comprise being provided at first compensating signal of frequency shift with first ratio and provide at least one to comprise the capacitor of the dielectric constant material of slope in the described electric connector with the every decade at least 0.15 of frequency.

49, method as claimed in claim 48 is characterized in that, provides to comprise being provided at second compensating signal of frequency shift with second ratio and provide at least one to comprise capacitor with the dielectric constant material of frequency-flat in the described electric connector.

50, method as claimed in claim 47, it is characterized in that, provide and comprise with first compensating signal of frequency shift with first ratio first collocation structure is provided, this first collocation structure comprises the capacitor of first dielectric constant material with first decreasing ratio that descends with frequency, and provide and comprise with second compensating signal of frequency shift with second ratio second collocation structure is provided, this second collocation structure comprises the capacitor of second dielectric constant material with second decreasing ratio that descends with frequency, and the difference between described first decreasing ratio and described second decreasing ratio is in the scope of the every decade 0.15 to 0.45 of frequency.

51, a kind of printed circuit board (PCB) is used for electric connector, it is characterized in that, this printed circuit board (PCB) comprises:

A plurality of conductors;

Be electrically connected to first first capacitor in the described conductor, described first capacitor has first dielectric of the first dielectric constant slope; With

Be electrically connected described first second capacitor in the described conductor, described second capacitor has second dielectric of the second dielectric constant slope;

Difference between wherein said first dielectric constant slope and the described second dielectric constant slope is the every decimal system at least 0.15 of frequency.

52, printed circuit board (PCB) as claimed in claim 51 is characterized in that, in described first dielectric constant slope and the described second dielectric constant slope is constant in 1MHz arrives the frequency range of 1GHz.

53, a kind of method that designs electric connector is characterized in that, this method comprises:

Provide and have first compensated stage of first electric capacity response as frequency function; And

Provide and have second compensated stage of second electric capacity response as frequency function;

Wherein said first compensated stage and described second compensated stage provide clean compensation, and select the clean compensation level of raising to be provided and the clean compensation level of decline is provided in high-frequency in low frequency as described first electric capacity response of frequency function with as described second electric capacity response of frequency function.

54, a kind of printed circuit board (PCB) is characterized in that, comprising:

Extend to a plurality of conductive paths of each output of described printed circuit board (PCB) from each input of described printed circuit board (PCB);

Be used for having crosstalk compensation capacitive coupling first compensated stage on first path of described a plurality of conductive paths of first polarity, described first compensated stage comprises that at least one comprises having first capacity cell that changes first dielectric constant material of ratio with first of frequency shift; With

Be used for to have crosstalk compensation capacitive coupling second compensated stage on described first path of described a plurality of conductive paths with the first opposite polarity polarity, described second compensated stage comprises that at least one comprises second capacity cell that has with second dielectric constant material of the second change rate of frequency shift, and the difference of wherein said first change rate and the described second change rate is between the every decade 0.15 to 0.45 of frequency.

55, printed circuit board (PCB) as claimed in claim 54 is characterized in that, is 0.2 in 1MHz described first change rate of the every decade of frequency in the frequency range of 1GHz.

56, printed circuit board (PCB) as claimed in claim 54 is characterized in that, is 0.4 in 1MHz described first change rate of the every decade of frequency in the frequency range of 1GHz.

57, printed circuit board (PCB) as claimed in claim 54 is characterized in that, is smooth in 1MHz described second change rate in the frequency range of 1GHz with frequency.

58, printed circuit board (PCB) as claimed in claim 54, it is characterized in that, when high crosstalk plug is electrically connected described each input, reduce near-end crosstalk on described first path of described a plurality of conductive paths in 1MHz preselected described first and second change rates in the frequency range of 100MHz; When low crosstalk plug is electrically connected described each input, select the described first and second change rates to reduce near-end crosstalk on described first path of described a plurality of conductive paths in the frequency more than the 250MHz.