CN100416241C - 使用三阱结构的有源像素单元成像矩阵中的颜色分离 - Google Patents
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Abstract
一种利用不同波长(400-490nm，490-575nm，575-700nm)的光在硅中的吸收长度的差异进行颜色分离的数字成像仪装置。一种优选成像阵列(102，104，106)基于使用了一种三阱结构(100)的三色像素传感器。该阵列通过测量同一位置处各个像素内的三原色(RGB)来消除颜色混淆。
Description
本发明涉及到彩色成像，以及，更具体地，涉及到一种有源像素MOS成像阵列中利用不同波长的光在硅中的吸收长度的差异进行的颜色分离。依据本发明的有源像素成像阵列通过使用一种三阱结构来确保阵列中的每个像素传感器只测量同一位置处三原色(R-G-B)中的一种颜色，从而减少了数字图像中的颜色混淆假象。
与本发明相关的现有技术一般可归类为：用作彩色传感器的堆栈式光电二极管，具有堆栈传感器的成像阵列，以及其他彩色成像阵列方法。
第一类包括用于测量光的颜色的非成像器件。根据光子吸收深度随波长的变化，已经利用各种技术发展了这些器件。在名为“半导体辐射波长探测器”的美国专利No.4,011,016和名为“用于检测光的波长和强度的装置”的美国专利No.4,309,604中公布了一些例子。这两个专利既没有公布三色集成电路彩色传感器的结构，也没有公布成像阵列。
第二类包括具有多个用于积累和转移光电荷的掩埋沟道的CCD器件。这些器件难于制作，且制作费用昂贵，并且也不适用于三色应用。在名为“采用依赖于波长的半导体光学吸收的彩色响应成像器件”的美国专利No.4,613,895中公布了一个例子。该类也包括使用了涂敷在成像器集成电路上面的多个薄膜光敏材料层的器件。该技术的例子公布在名为“彩色传感器”的美国专利No.4,677,289和名为“具有堆栈单元结构的可见光/红外成像器件”的美国专利No.4,651,001中。这些结构也难于制作，且制作费用昂贵，因此没有成为实用技术。
第三类包括使用滤色片马赛克以便在不同光传感器位置选择不同波长段的彩色成像集成电路。在名为“彩色成像阵列”的美国专利No.3,971,065中公布了该技术的一个例子。
正如Parulski等人在文章“可用于数字像机家族的技术”，156/SPIE Vo.2654，1996中讨论的那样，在数字像机中通常使用的像素马赛克图案是拜耳滤色片阵列(CFA)图案。如图1所示，拜耳CFA具有50％的绿色像素，它们分布在一个方格图案中，而红色和蓝色像素线交替填充在图案的剩余部分中。
如图2所示，拜耳CFA图案可得到一个钻石形状的绿色奈奎斯特区域和较小的矩形形状的红色和蓝色奈奎斯特区域。人眼对发光的空间频率要比对色度的空间频率更敏感，而发光主要由绿光构成。因此，由于拜耳CFA像单色图像仪那样，为水平和垂直空间频率提供了相同的奈奎斯特频率，所以它改善了数字图像的可察觉清晰度。
这些马赛克方法在与严重的颜色混淆问题相关联的技术中是已知的，这个问题的起因是这样一种事实：由于传感器小于它们之间的间距，使得它们只能对图像信号进行局域采样，而且不同颜色的传感器位于不同的位置，使得采样在不同颜色之间不能对准。奈奎斯特区域外的图像频率分量都混入了被采样的图像，而且只有微小的衰减，并且颜色之间的相关性也很微弱。
相应地，本发明的一个目标是提供一种彩色成像阵列，在该彩色成像阵列中，三个颜色波段由在同一位置处只有一个、且敏感区域相对于它们之间的间隔不是太小的探测器来测量，从而衰减了混淆的图像分量，并且在颜色之间对准了颜色采样。
本发明更进一步的目标是提供一种可按照标准的现代CMOS存储器工艺制作的有源像素彩色成像阵列。
参看图3，许多现代CMOS集成电路制作工艺使用一种“双阱”或“双盆”结构，在这种结构中，使用掺杂浓度大约为1017原子/cm2的P阱区域10和N阱区域12作为在其中分别制作N-沟道和P-沟道晶体管的区域。衬底材料14典型地是更轻度掺杂的P-型硅(1015原子/cm2)，所以P阱10并没有与衬底14隔离。形成于P阱10中的N-沟道FET16包括杂质浓度＞1018原子/cm2的N+垂直源/漏扩散18和浓度大约为1018原子/cm2的N-型浅轻度掺杂漏(LDD)区20。形成于N阱区12中的P-沟道FET22类似地由杂质浓度相近的垂直P+源/漏区24和浅LDD区26构成。
参看图4，在称为“三阱”的改进后的现代工艺中，使用另外一个深N隔离阱28来提供P阱10和P衬底14之间的结隔离。N隔离阱28的杂质浓度(1016原子/cc)介于P衬底14和P阱10的杂质浓度(分别为1015原子/cc和1017原子/cc)之间。在名为“制作具有三阱结构的半导体器件的方法”的美国专利No.5,397,734中公布了三阱技术的一个例子。
由于能够提供动态电荷存储节点与可能通过衬底扩散的杂散载流子之间的有效隔离，所以三阱工艺正在成为生产MOS存储器(DRAM)器件的流行和商用技术。
本发明旨在实现一种有源像素MOS成像阵列中的颜色分离，这种有源像素MOS成像阵列使用了三阱像素单元结构，以便利用不同波长的光在硅中的吸收长度的差异来测量位于同一位置处的不同颜色，而且传感区与它们之间的间隔一般大。
相应地，本发明的一个优选实施例提供了一种形成于P-型硅衬底中的、用于分离蓝、绿和红光的彩色光传感器结构。该光传感器结构包括一个形成于衬底中的深N-掺杂区，从而使N-区和衬底之间的pn结在衬底中大约等于红光在硅中的吸收长度的深度处形成一个红-敏感的光电二极管。在N-区中形成一个P-掺杂区，从而使P-区和N-区之间的np结在衬底中大约等于绿光在硅中的吸收长度的深度处形成一个绿-敏感的光电二极管。在P-区中形成一个浅N-掺杂区，从而使浅N-区和P-区之间的pn结在衬底中大约等于蓝光在硅中的吸收长度的深度处形成一个蓝-敏感的光电二极管。传感电路系统与红、绿和蓝光光电二极管相连接，以便测量各个光电二极管电流。
由于能够提供一种制作垂直式PNPN器件的实用方法，而且该PNPN器件又是制作三重堆栈光电二极管所必需的，因此在本发明中三阱工艺是有用的。尽管在同一芯片中、成像器单元阵列的外面使用三阱工艺中的普通N阱可能是有用的，但在本发明的像素单元中并没有使用。三重堆栈光电二极管所需的深N-掺杂区就是一个上面所指的N隔离阱。
本发明通过确保成像阵列中所有像素都测量像素单元同一位置处的红、绿和蓝颜色响应的方法，减小了颜色混淆假象。利用红、绿和蓝光在硅中的吸收长度的差异来实现颜色过滤。
除了减小颜色混淆之外，本发明还具有另一些优点。例如，它可放弃在现有技术中普遍使用的络合物聚合物滤色片阵列工艺步骤。取而代之的是半导体工业中普遍应用的三阱工艺。另外，可用光子的总使用效率增加了。使用传统方法，不能穿过滤光片材料的光子将在滤光片中被吸收，从而被浪费掉了。使用本发明的方法，虽然颜色由吸收深度分离，但都被收集并使用。这可使以量子效率的总改进超过三倍。
本发明提供了使用传统CCD技术难以完成的一种成像仪的优异例子。另外，从每个三色像素中有许多支持晶体管的角度看，本发明得益于规模CMOS工艺的可利用性。
在以下的详细描述和附图中，使用本发明的概念建立了示意实施例，参考它们可以更好地理解本发明的特征和优点。
图1显示的是广为人知的拜耳滤色片阵列(CFA)图案。
图2显示的是由拜耳CFA得到的红、绿和蓝奈奎斯特区。
图3是传统的双阱CMOS结构的局部横截面图。
图4是传统的三阱CMOS结构的局部横截面图。
图5是硅中光吸收长度与波长之间的关系曲线。
图6是依据本发明的理念使用了三阱结构的三色像素传感器的局部横截面图。
图7是图6中的三色像素传感器结构的平面图，图中也给出了相关联的光电流传感电路系统的一个实施例的示意图。
图8是图6所示的依据本发明的三阱光电二极管结构的估计敏感性曲线。
图9是显示了依据本发明的一个成像阵列中的一部分的局部示意图，在该成像阵列中，每个单元的光电二极管和读出放大器电路都安排在一个阵列中，其中的每个单元都具有一条行选择线和三条列输出线。
图10是显示有依据本发明的一个成像阵列中的一部分的局部示意图，在该成像阵列中，每个单元的光电二极管和读出放大器电路都安排在一个阵列中，其中的每个单元具有三条行选择线和一条列输出线。
图11是图10所示的具有三条行选择线和一条列输出线的像素传感器单元的实施例的示意图。
图12A是图11所示单元的硅层的布置图，向上直到并包括接触，即从硅到第一金属。
图12B是图11所示单元的三个金属互联层，包括接触和布线的布置图。
图13A是如图12A/B所示单元的、并带有一个上金属光屏蔽层的理想硅表面的横截面图。
图13B是具有N-区外扩散的如图12A/B所示单元的、并带有一个上金属光屏蔽层的理想硅表面的横截面图。
众所周知，入射到硅衬底上的光的波长越大，在被吸收之前光穿透进入硅的距离越大。图5显示的是可见光在硅中的光吸收长度。正如图5所示，波长为400-490nm的蓝光在硅衬底中大约0.2-0.5微米的深度最先被吸收。波长为490-575nm的绿光在硅衬底中大约0.5-1.5微米的深度被吸收。波长为575-700nm的红光在硅衬底中大约1.5-3.0微米的深度被吸收。
利用不同波长的光在硅中的吸收深度的差异，如图6所示，本发明的一个优选实施例提供了一种形成于P-型(大约1016原子/cm2)硅衬底100中的三阱彩色光传感器结构。该彩色光传感器结构包括一个形成于P-型硅衬底100中的深N-型掺杂阱区102(大约1016原子/cm2)。N-掺杂区102的结深大约在1.5-3.0微米之间，最好是大约2微米，换言之，相当于红光的近似吸收长度。因此，深N-掺杂区102和P-型硅衬底100之间的pn结在这两个区之间形成一个红-敏感的光电二极管。
类似地，在N-掺杂区102中形成一个P-型(大约1017原子/cm2)深阱区104。在大约0.5-1.5微米，最好是大约0.6微米，换言之，相当于绿光在硅中的近似吸收长度的深度处形成P-掺杂区104和N-掺杂102之间的pn结。因此，P-区104和深N-区102之间的pn结在这两个区之间形成一个绿-敏感的光电二极管。
进一步如图6所示，在P-掺杂区104中形成一个延伸至大约0.2-0.5微米，最好是大约0.2微米，换言之，相当于蓝光在硅中的吸收长度的深度的N-型(大约1018原子/cm2)浅掺杂区106。因此，浅N-掺杂区106和P-区104之间的pn结在这两个区之间形成一个蓝-敏感的光电二极管。
该技术领域中的技术人员会认识到，正如上所述，上述二极管的敏感耗尽区将延伸至结深之上或之下的某个位置。
该技术领域中的技术人员也会认识到，也可以使用相反的导电性构成上述三阱结构，换言之，在N-衬底中形成一个深P-掺杂区，在这个深P-区中形成一个N-掺杂区，并在该N-区中形成一个浅P-掺杂区。不过，在工业中不常使用这种结构，相反，由于可以使用标准MOS存储器技术，图6所示的结构是优选的。
图6进一步显示出，彩色光传感器结构也包括一种与分别用于测量红、绿和蓝光电流的红、绿和蓝光电二极管相连接、并跨过这三种光电二极管的传感机构108。
图6显示了一个包括与用于测量红光电流ir跨接的红光电二极管的第一电流计110的概念性装置。第二电流计112与用于测量绿光电流ig的绿光电二极管跨接。第三电流计114与用于测量蓝光电流ib的蓝光电二极管跨接。
假定在耗尽区中收集了光电二极管中的大部分电流，该技术领域中的技术人员会清楚地认识到，电流ib主要由可见光谱蓝端的入射光子的光电流构成；电流ig主要是来自绿光子的光电流，电流ir反映了来自红光子的光电流。
正如图6所示，假定有一个隔离的P-阱工艺，而且所示的表面结是一个很浅的nldd(N-型轻度掺杂漏)层以便使蓝光响应最大化。
图7显示的是上述三阱光传感器结构的布局的一种近似。该技术领域中的技术人员会认识到，三阱结构可能大于现有技术的单像素传感器单元，但由于传统的像素阵列图案的混合颜色的性质，图7中像素的区域一定相当于三个传统的像素单元。
在该技术中，常常使用一种结合有一个光电二极管的“有源像素”电路。图7显示的是三个这种光电流传感电路的示意图，每个光电二极管都拥有一个这种电路。在图7所示的实施例中，这些电路是传统的三晶体管电流传感器(该技术领域中的技术人员会认识到，也可以使用其他电流传感器电路)。有源像素电路通过在光电二极管和相关联的电路节点的电容器上积分光电流，然后通过一个读出放大器缓冲得到的电压的方法来检测光致电荷。
如上所述，典型地使用三个晶体管：复位晶体管(Re)可将电容器上的电压复位到一个表征黑态的参考电压。源极跟随器放大器晶体管B缓冲光电二极管上的电压。在选择读出一个单元所在的行时，选择晶体管S将该单元与一个列输出线相连接。
如图7所示，在本发明的三重背靠背堆栈光电二极管的情况下，二极管节点中的两个的复位电压(Vn)相对于P衬底基本上是正的，中间节点的复位电压(Vp)也是正的，但其值要稍小一些(即Vn＞Vp)，所以全部三个二极管都从反向偏压状态开始。当光电二极管暴露在光线中时，它们的反向偏压会变小，甚至在某种程度上，在“溢出”之前可能会变为正向偏压。根据各个光电二极管和电路的杂散电容的值，所检测的这三个电压对应于电致电荷的不同线性组合。这些线性组合会影响得到的电压输出的敏感曲线，因此在随后的矩阵变换中需要修正这些线性组合以产生量热敏感的最终输出。
图8以可见光谱中波长的函数的形式，给出了依据本发明的三重堆栈光电二极管装置的一套估计的敏感性曲线。正如图所示，这些曲线都是宽调谐的，而在其他一些基于滤色片的颜色分离方法中，这些曲线都是锐调谐的。不过，正如彩色成像技术领域中熟知的那样，不可能通过适当的矩阵化将来自这样一套曲线的三个测量结果转换为更接近量热正确的一套红、绿和蓝的强度值。估计适当的矩阵转换的方法在该技术领域中是已知的，作为例子，可参考名为“颜色性能优化的数字成像器件”的美国专利No.5,668,596。
以上结合图6描述的三光电二极管颜色传感器结构，和其关联的光电流传感电路，例如以上结合图7描述的，可以用来提供一种基于三阱结构的有源像素单元成像阵列。这样的成像矩阵包括一个含多个行和列的光电池的矩阵，而且其中的每个光电池包括一个三阱结构和关联光传感电路系统。该矩阵的每个行具有三个与之相关联、并与该行中光传感电路按照某种方式，举例来说，如图7所示的方式连接的读取选择线。类似地，该矩阵的每个列具有三个与之相关联、并与该列中光传感电路按照某种方式，举例来说，如图7所示的方式连接的列输出线。
不过，在依据本发明的成像阵列中，每个光电池的三个行选择线和三个列输出线并非全部都单独引出，如图7所示。
作为一种替代方案，通过分别如图9和图10所示的或将行选择线共线连接或将列输出线共线连接的方法，分别如图9和图10所示，可将三个颜色传感器和读出放大器作为行或列的短部分引线。在图9和图10中并没有给出阵列中所有单元共有的信号线，如复位和电源信号。
图11显示的是依据图10所示的阵列机制的一个像素的完整示意图，该像素具有分别为红、绿和蓝传感器测量/读出结构中的三个行选择线RowR，RowG，RowB，以及一个共用列输出线。图11中示意图的排列使MOS晶体管M1到M9的位置和方向与如图12A/12B所示的布置中它们的位置和方向相吻合。在这个实施例中，读出电源Vcc和图7中的复位参考电压Vn是共享的，而Vp保持独立。
图12A/12B显示的是图11中的电路的实验性布局，为使图示清楚，使用点画图案将掩膜层分成两套。图12A显示的是可使硅-有源区，阱，注入，多晶硅栅极和接触切口-感光的掩膜层，这对该技术领域中的普通技术人员是一目了然的。图12B显示的是接触切口和三个金属连线和两个通孔掩膜层。如图12A/12B所示，使用金属1作像素内部连线，金属2作行线，金属3作列线，多晶硅作行复位线。第四金属层最好用作光屏蔽，以便使光仅照射在光电二极管上，但在图中没有画出该金属层。
有源像素传感器技术领域中的普通技术人员会认识到，复位功能常由行连接，以便使一行中像素的卷帘式电子快门定时在要读出对应的列某一特定时间值之前被复位，这与全局复位功能相反。因此，像素阵列最好如同图12A/12B所示的实施例那样水平连接复位线。同样也可认识到，当显示的布局中的单元在阵列内相邻时，晶体管所在的P阱完全包围着堆栈光电二极管；最左下边的像素最好由阵列外的一条P阱构成。
图13A/13B显示的是通过依据如图12所示布局的像素中心的横截面图，包括硅的下层掺杂区域，并包括一个光屏蔽层，但是省略了金属连线和氧化物中间层；图中也包括有左侧相邻单元的一部分。
图13A显示的是理想化的阱，同时也显示出可利用相同的掩膜和制作步骤，使用标准的三阱CMOS工艺来确定光传感器中的P阱和读出电路中的P阱。类似地，可以使用相同的掩膜和制作步骤来制作光传感器中的浅N+掺杂区，并将之作为读出电路的浅N+源/漏区。根据实验设计选择(横截面可以解释为穿过源/漏区的任何部分)，这些N+区可以是CMOS工艺中标准的强N+掺杂有源区，或者是NLDD轻掺杂漏区。
图13B显示的是具有中度N-阱注入外扩散的像素中掺杂区域的可能形状。本发明通过将堆栈光传感器与CMOS中的有源像素传感和读出电路集成在一起的方法，使其中建立有读出电路的P阱起深N阱间有效隔离势垒的作用。如图13B所示，N阱是隔开的，从而使它们既使在没有插入的P阱或有源像素传感和读出电路系统存在的情况下，也不能外扩散很多，以致于改变它们之间的从P到N的间隔。这意味着不能将N阱放置得过于相互靠近，否则会有相邻的红-敏感光电二极管短路的危险。N阱光电二极管之间的P阱条可更安全地隔离它们，并且提供一个“自由”区，在其中可以建立N-型场效应晶体管，以用作传感和读出电路。因此，相对于已知的现有技术，在三阱CMOS工艺中堆栈硅光电二极管与CMOS电路系统的这种新的结合具有令人吃惊并引人注目的优点。
应该理解，也可以采用这里描述的本发明的实施例的各种替代方案来实现本发明。本发明的范围由下面的权利要求书限定，以及这些权利要求及其等同物范围之内的方法和结构也被其覆盖。
Claims (7)
1. 一种形成于第一种导电类型硅衬底中的、用于分离不同波长的光的彩色光传感结构，该彩色光传感结构包括：
第一个形成于硅衬底中的、与第一种导电类型相反的第二种导电类型的阱，在距离所述硅衬底的上表面大约第一个光波长在硅中的光吸收长度的深度处形成第一个阱与硅衬底之间的结，以便形成第一个光电二极管；
第二个形成于第一个阱中的第一种导电类型的阱，在距离硅衬底的上表面大约第二个光波长在硅中的光吸收长度的深度处形成第二个阱和第一个阱之间的结，以便形成第二个光电二极管；
一个形成于第二个阱中的第二种导电类型的掺杂区，在距离所述硅衬底的上表面大约第三个光波长在硅中的光吸收长度的深度处形成所述掺杂区和第二个阱之间的结，以便形成第三个光电二极管；和
与所述第一个光电二极管耦接的第一个集成的电容性的光电流传感器；
与所述第二个光电二极管耦接的第二个集成的电容性的光电流传感器；
与所述第三个光电二极管耦接的第三个集成的电容性的光电流传感器，
其特征在于：
第一个阱和硅衬底之间的结形成于距离硅衬底上表面大约2.0微米的深度处；
第二个阱和第一个阱之间的结形成于距离硅衬底上表面大约0.6微米的深度处；并且
所述掺杂区和第二个阱之间的结形成于距离硅衬底上表面大约0.2微米的深度处。
2. 根据权利要求1的彩色光传感结构，其特征在于：所述掺杂区是轻掺杂漏区。
3. 一种形成于P-型导电硅衬底中的、用于分离蓝、绿和红波长的光的彩色光传感结构，该彩色光传感结构包括：
一个形成于P-型硅衬底中的N-型导电阱，在距离P-型硅衬底上表面大约红光在硅中的光吸收长度的深度处形成N-型导电阱与P-型硅衬底之间的结，以便形成红光电二极管；
一个形成于N-型导电阱中的P-型导电阱，在距离P-型硅衬底上表面大约绿光在硅中的光吸收长度的深度处形成P-型导电阱和N-型导电阱之间的结，以便形成绿光电二极管；
一个形成于P-型导电阱中的浅N-型导电区，在距离P-型硅衬底上表面大约蓝光在硅中的光吸收长度的深度处形成浅N-型导电区和P-型导电阱之间的结，以便形成蓝光电二极管；和
分别与红、绿和蓝光电二极管跨接，以便集中在所述红、绿和蓝光电二极管中产生的红、绿和蓝光电流的光电流传感装置。
其特征在于：
所述N-型导电阱和P-型硅衬底之间的结形成于距离P-型硅衬底上表面大约2.0微米的深度处；
所述P-型导电阱和所述N-型导电阱之间的结形成于距离P-型硅衬底上表面大约0.6微米的深度处；并且
所述浅N-型导电区和所述P-型导电阱之间的结形成于距离P-型硅衬底上表面大约0.2微米的深度处。
4. 根据权利要求3的彩色光传感结构，其特征在于：所述浅N-型导电是轻掺杂漏区。
5. 一种有源像素成像阵列，该阵列包括：
(a)一个包括多行和多列的、形成于第一种导电类型硅衬底中的彩色光传感结构的矩阵，其中每个彩色光传感结构包括：
(i)一个形成于硅衬底中的、与第一种导电类型相反的第二种导电类型的第一阱，在距离硅衬底的上表面大约第一个光波长在硅中的光吸收长度的深度处形成的第一阱与硅衬底之间的结，以便形成第一个光电二极管；
(ii)形成于第一阱中的第一种导电类型的第二阱，在距离硅衬底的上表面大约第二个光波长在硅中的光吸收长度的深度处形成第二阱和第一阱之间的结，以便形成第二个光电二极管；
(iii)形成于第二阱中的第二种导电类型的一个掺杂区，在距离硅衬底的上表面大约第三个光波长在硅中的光吸收长度的深度处形成所述掺杂区和第二阱之间的结，以便形成第三个光电二极管；和
(iv)与所述第一个光电二极管耦接的第一个集成的电容性的光电流传感器；与所述第二个光电二极管耦接的第二个集成的电容性的光电流传感器和与所述第三个光电二极管耦接的第三个集成的电容性的光电流传感器；
(b)用于上述矩阵每一行的，与上述行中每个彩色光传感结构相连接的、用于选择性地指令输出代表产生于上述行里彩色光传感结构中的第一、第二和第三光电流的输出信号的行选择电路系统；
(c)用于上述矩阵每一列的，与上述列中每个彩色光传感结构相连接的、用于选择性地输出代表产生于上述列里彩色光传感结构中的第一、第二和第三光电流的输出信号的列输出电路系统。
其特征在于在每个所述彩色光传感结构中：
第一阱和硅衬底之间的结形成于距离硅衬底的上表面大约2.0微米的深度处；
第二阱和第一阱之间的结形成于距离硅衬底的上表面大约0.6微米的深度处；和
所述掺杂区和第二阱之间的结形成于距离硅衬底的上表面大约0.2微米的深度处。
6. 权利要求5所述的有源像素成像阵列，其特征在于：
上述行选择电路系统包括一个与上述行中每个彩色光传感结构中的光电流传感器相连接的、用于指定要输出的第一、第二和第三光电流的行选择线；和
上述列输出电路系统包括与上述列中每个彩色光传感结构中的光电流传感器相连接的、分别用于输出第一、第二和第三光电流的第一、第二和第三列输出线。
7. 权利要求5所述的有源像素成像阵列，其特征在于：
上述行选择电路系统包括与上述行中每个彩色光传感结构中的光电流传感器相连接的、分别用于指定要输出的第一、第二和第三光电流的第一、第二和第三行选择线；和
上述列输出电路系统包括一个与上述列中每个彩色光传感结构中的光电流传感器相连接的、用于输出第一、第二和第三光电流的列输出线。
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/065,939 | 1998-04-24 | ||
| US09/065,939 US5965875A (en) | 1998-04-24 | 1998-04-24 | Color separation in an active pixel cell imaging array using a triple-well structure |
| US09/065939 | 1998-04-24 |
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| EP (1) | EP1078233A4 (zh) |
| JP (1) | JP2002513145A (zh) |
| KR (1) | KR20010034780A (zh) |
| CN (1) | CN100416241C (zh) |
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Also Published As
| Publication number | Publication date |
|---|---|
| JP2002513145A (ja) | 2002-05-08 |
| KR20010034780A (ko) | 2001-04-25 |
| EP1078233A1 (en) | 2001-02-28 |
| WO1999056097A1 (en) | 1999-11-04 |
| US5965875A (en) | 1999-10-12 |
| CN1298483A (zh) | 2001-06-06 |
| TW407428B (en) | 2000-10-01 |
| EP1078233A4 (en) | 2001-08-08 |
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