CN100367411C - 半导体存储装置和存储单元的写入以及擦除方法 - Google Patents
半导体存储装置和存储单元的写入以及擦除方法 Download PDFInfo
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- CN100367411C CN100367411C CNB2003101195969A CN200310119596A CN100367411C CN 100367411 C CN100367411 C CN 100367411C CN B2003101195969 A CNB2003101195969 A CN B2003101195969A CN 200310119596 A CN200310119596 A CN 200310119596A CN 100367411 C CN100367411 C CN 100367411C
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- 230000015654 memory Effects 0.000 title claims abstract description 66
- 239000004065 semiconductor Substances 0.000 title claims abstract description 59
- 238000000034 method Methods 0.000 title claims description 20
- 238000001514 detection method Methods 0.000 claims abstract description 10
- 238000003860 storage Methods 0.000 claims description 173
- 230000007246 mechanism Effects 0.000 claims description 36
- 230000000694 effects Effects 0.000 claims description 13
- 230000009471 action Effects 0.000 claims description 12
- 238000009792 diffusion process Methods 0.000 claims description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 7
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052748 manganese Inorganic materials 0.000 claims description 6
- 239000011572 manganese Substances 0.000 claims description 6
- 239000011159 matrix material Substances 0.000 abstract 1
- 238000012795 verification Methods 0.000 description 18
- 230000006870 function Effects 0.000 description 7
- 102000054766 genetic haplotypes Human genes 0.000 description 5
- 230000008569 process Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000001960 triggered effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- AMWRITDGCCNYAT-UHFFFAOYSA-L hydroxy(oxo)manganese;manganese Chemical compound [Mn].O[Mn]=O.O[Mn]=O AMWRITDGCCNYAT-UHFFFAOYSA-L 0.000 description 2
- 241001269238 Data Species 0.000 description 1
- 101000912503 Homo sapiens Tyrosine-protein kinase Fgr Proteins 0.000 description 1
- 102000001332 SRC Human genes 0.000 description 1
- 108060006706 SRC Proteins 0.000 description 1
- 102100026150 Tyrosine-protein kinase Fgr Human genes 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 230000008676 import Effects 0.000 description 1
- 230000005415 magnetization Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5685—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using storage elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0038—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0064—Verifying circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0097—Erasing, e.g. resetting, circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
- G11C2013/0054—Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0064—Verifying circuits or methods
- G11C2013/0066—Verify correct writing whilst writing is in progress, e.g. by detecting onset or cessation of current flow in cell and using the detector output to terminate writing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5624—Concurrent multilevel programming and programming verification
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/79—Array wherein the access device being a transistor
Abstract
Description
Claims (32)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
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JP2002353053 | 2002-12-04 | ||
JP2002353053 | 2002-12-04 | ||
JP2003018645 | 2003-01-28 | ||
JP2003018645A JP4249992B2 (ja) | 2002-12-04 | 2003-01-28 | 半導体記憶装置及びメモリセルの書き込み並びに消去方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1505052A CN1505052A (zh) | 2004-06-16 |
CN100367411C true CN100367411C (zh) | 2008-02-06 |
Family
ID=32314124
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2003101195969A Expired - Fee Related CN100367411C (zh) | 2002-12-04 | 2003-12-04 | 半导体存储装置和存储单元的写入以及擦除方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7006371B2 (zh) |
EP (1) | EP1426969A3 (zh) |
JP (1) | JP4249992B2 (zh) |
KR (1) | KR100593325B1 (zh) |
CN (1) | CN100367411C (zh) |
TW (1) | TWI245290B (zh) |
Families Citing this family (145)
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JP3894030B2 (ja) * | 2002-04-17 | 2007-03-14 | ソニー株式会社 | 抵抗変化記憶素子を用いた記憶装置及び同装置の参照抵抗値決定方法 |
US7085154B2 (en) * | 2003-06-03 | 2006-08-01 | Samsung Electronics Co., Ltd. | Device and method for pulse width control in a phase change memory device |
JP5121859B2 (ja) * | 2003-09-12 | 2013-01-16 | ルネサスエレクトロニクス株式会社 | 記憶装置 |
US7050319B2 (en) * | 2003-12-03 | 2006-05-23 | Micron Technology, Inc. | Memory architecture and method of manufacture and operation thereof |
KR100618836B1 (ko) * | 2004-06-19 | 2006-09-08 | 삼성전자주식회사 | 반도체 메모리 장치 및 반도체 메모리 장치의 프로그래밍방법 |
TWI288931B (en) * | 2004-06-19 | 2007-10-21 | Samsung Electronics Co Ltd | Phase-change memory element driver circuits using measurement to control current and methods of controlling drive current of phase-change memory elements using measurement |
JP2006134398A (ja) * | 2004-11-04 | 2006-05-25 | Sony Corp | 記憶装置及び半導体装置 |
KR100576369B1 (ko) * | 2004-11-23 | 2006-05-03 | 삼성전자주식회사 | 전이 금속 산화막을 데이타 저장 물질막으로 채택하는비휘발성 기억소자의 프로그램 방법 |
JP4546842B2 (ja) * | 2005-01-20 | 2010-09-22 | シャープ株式会社 | 不揮発性半導体記憶装置及びその制御方法 |
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KR100674983B1 (ko) | 2005-07-13 | 2007-01-29 | 삼성전자주식회사 | 구동전압 레벨을 변경할 수 있는 상 변화 메모리 장치 |
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Publication number | Publication date |
---|---|
JP2004234707A (ja) | 2004-08-19 |
TW200418034A (en) | 2004-09-16 |
US7006371B2 (en) | 2006-02-28 |
KR20040048864A (ko) | 2004-06-10 |
KR100593325B1 (ko) | 2006-06-26 |
US20040114444A1 (en) | 2004-06-17 |
CN1505052A (zh) | 2004-06-16 |
EP1426969A2 (en) | 2004-06-09 |
EP1426969A3 (en) | 2005-11-16 |
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