CA2586961A1 - Thermal process for creation of an in-situ junction layer in cigs - Google Patents
Thermal process for creation of an in-situ junction layer in cigs Download PDFInfo
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- 238000000034 method Methods 0.000 title abstract description 18
- 230000008569 process Effects 0.000 title abstract description 14
- 238000011065 in-situ storage Methods 0.000 title abstract description 4
- 238000004519 manufacturing process Methods 0.000 claims abstract description 18
- 239000006096 absorbing agent Substances 0.000 claims description 25
- 239000004065 semiconductor Substances 0.000 claims description 24
- 239000000758 substrate Substances 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 6
- 239000010409 thin film Substances 0.000 abstract description 9
- 230000015572 biosynthetic process Effects 0.000 abstract description 6
- 239000000463 material Substances 0.000 description 17
- 150000001875 compounds Chemical class 0.000 description 13
- 239000011669 selenium Substances 0.000 description 13
- 229910052733 gallium Inorganic materials 0.000 description 10
- 229910052738 indium Inorganic materials 0.000 description 10
- 229910052711 selenium Inorganic materials 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 239000010949 copper Substances 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 239000002243 precursor Substances 0.000 description 5
- 239000003513 alkali Substances 0.000 description 4
- 238000000224 chemical solution deposition Methods 0.000 description 4
- 229910052717 sulfur Inorganic materials 0.000 description 4
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 description 3
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical group [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 3
- KTSFMFGEAAANTF-UHFFFAOYSA-N [Cu].[Se].[Se].[In] Chemical compound [Cu].[Se].[Se].[In] KTSFMFGEAAANTF-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 239000011593 sulfur Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical group [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 240000002329 Inga feuillei Species 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052793 cadmium Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- DVRDHUBQLOKMHZ-UHFFFAOYSA-N chalcopyrite Chemical compound [S-2].[S-2].[Fe+2].[Cu+2] DVRDHUBQLOKMHZ-UHFFFAOYSA-N 0.000 description 1
- 229910052951 chalcopyrite Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000000750 constant-initial-state spectroscopy Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000010924 continuous production Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- -1 for example Substances 0.000 description 1
- 239000002920 hazardous waste Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000008204 material by function Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000013082 photovoltaic technology Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- SBIBMFFZSBJNJF-UHFFFAOYSA-N selenium;zinc Chemical compound [Se]=[Zn] SBIBMFFZSBJNJF-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000007669 thermal treatment Methods 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
- 230000035899 viability Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1876—Particular processes or apparatus for batch treatment of the devices
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/56—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
- C23C14/562—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks for coating elongated substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/56—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
- C23C14/568—Transferring the substrates through a series of coating stations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/032—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
- H01L31/0322—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312 comprising only AIBIIICVI chalcopyrite compounds, e.g. Cu In Se2, Cu Ga Se2, Cu In Ga Se2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
- H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
- H01L31/03926—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate comprising a flexible substrate
- H01L31/03928—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate comprising a flexible substrate including AIBIIICVI compound, e.g. CIS, CIGS deposited on metal or polymer foils
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
- H01L31/0749—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type including a AIBIIICVI compound, e.g. CdS/CulnSe2 [CIS] heterojunction solar cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/541—CuInSe2 material PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The present invention relates generally to the field of photovoltaics and more specifically to manufacturing thin-film solar cells using a thermal process.
Specifically, a method is disclosed to manufacture a CIGS solar cell by an in-situ junction formation process.
Specifically, a method is disclosed to manufacture a CIGS solar cell by an in-situ junction formation process.
Description
THERMAL PROCESS FOR CREATION OF AN IN-SITU JUNCTION
LAYER IN CIGS
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority from U.S. Provisional Patent Application Ser. No.
60/626,843, filed November 10, 2004.
FIELD OF THE INVENTION
[0002] The invention disclosed herein relates generally to the field of photovoltaics and more specifically to creating thin-film solar cells using an in-situ junction process.
BACKGROUND OF THE INVENTION
LAYER IN CIGS
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority from U.S. Provisional Patent Application Ser. No.
60/626,843, filed November 10, 2004.
FIELD OF THE INVENTION
[0002] The invention disclosed herein relates generally to the field of photovoltaics and more specifically to creating thin-film solar cells using an in-situ junction process.
BACKGROUND OF THE INVENTION
[0003] Relatively efficient photovoltaic ("PV") cells can be manufactured in the laboratory;
however, it has proven difficult to commercially scale these processes with the consistent repeatability and efficiency critical for commercial viability. The lack of an efficient thin-film manufacturing process has contributed to the failure of PV cells to effectively replace traditional energy sources in the market. Translating laboratory batch processing methods into effective industrial processes that are both cheaper and better controlled would help advance PV
technology to mainstream markets.
however, it has proven difficult to commercially scale these processes with the consistent repeatability and efficiency critical for commercial viability. The lack of an efficient thin-film manufacturing process has contributed to the failure of PV cells to effectively replace traditional energy sources in the market. Translating laboratory batch processing methods into effective industrial processes that are both cheaper and better controlled would help advance PV
technology to mainstream markets.
[0004] Without an efficient thin-film manufacturing process, PV cells cannot effectively replace current energy sources. To manufacture a PV cell, a thin semiconductor layer of PV
materials is deposited on a supporting layer such as glass, metal, or plastic foil. Since thin-film direct bandgap semiconductor materials have higher light absorptivity than indirect bandgap crystalline semiconductor materials, PV materials are deposited in extremely thin consecutive layers of atoms, molecules, or ions. The basic photovoltaic stack design exemplifies the typical structure of a PV cell. In that design, the cell comprises a substrate, a barrier layer, a back contact layer, a semiconductor layer, alkali materials, an n-type junction buffer layer, an intrinsic transparent oxide layer, and a conducting transparent oxide layer.
materials is deposited on a supporting layer such as glass, metal, or plastic foil. Since thin-film direct bandgap semiconductor materials have higher light absorptivity than indirect bandgap crystalline semiconductor materials, PV materials are deposited in extremely thin consecutive layers of atoms, molecules, or ions. The basic photovoltaic stack design exemplifies the typical structure of a PV cell. In that design, the cell comprises a substrate, a barrier layer, a back contact layer, a semiconductor layer, alkali materials, an n-type junction buffer layer, an intrinsic transparent oxide layer, and a conducting transparent oxide layer.
[0005] Compounds of copper indium diselenide (CIS) with gallium substituted for all or part of the indium (CIGS) and / or sulfur substituted for all or part of the selenium (CISS) have the most promise for use in absorber layers in thin-film solar cells. CIGS cells have demonstrated the highest efficiencies and good stability as compared to other absorber layer compounds.
Typically, CIGS films are deposited by vacuum-based techniques. However, the multiple layers comprising a PV device offer challenges to a mass production system.
Presently, there is no proven technology for continuously producing CIGS devices. Additionally, the typical PV cell manufacturing technique involves batch processing that necessitates touch labor, high capital costs, and low manufacturing output. In contrast, a continuous process can minimize capital costs and touch labor while maximizing product throughput and yields.
[00061 CIGS systems, in particular, pose unique challenges to manufacturers.
As discussed by Ramanathan, et. al., Oct. 14, 2002, processes used for large area module manufacture involve deposition of metallic precursor stacks and the subsequent formation of the compound in a selenium and sulfur ambient. In photovoltaic applications, the p-type CIGS
layer is combined with an n-type CdS layer to form a p-n heterojunction CdS/CIGS device.
However, this process is problematic. The band gap of the CdS layer is still low enough to limit the short wavelength part of the solar spectrum that can reach the absorber, and this leads to a reduction in the current that can be collected. This reduction becomes proportionally more severe for higher band gap CIGS cells. Moreover, this process creates hazardous waste, the disposal of which is a challenge to potential manufacture. Thus, finding a practical alternative to the chemical bath deposition ("CBD") CdS processes is desired in the art.
[0007] While some alternatives to the CBD CdS process have been proposed, none are viable options in the context of large scale continuous manufacturing. Some of these include the addition of layers composed of, among others, ZnS, ZnO, Zn(S,O), ZnSe, In2S3, and In(OH)xSy.
However, inserting these alternative buffer layers often involve more chemical steps, as well as post deposition anneals or light soaking to become fully active. Adding these post-deposition steps decreases the efficiency of the manufacturing process, and subjects the product to potential mishandling and contamination. Thus, a process for manufacturing thin-film solar cells using an alternative to CBD CdS technology to insert a buffer layer - without additional chemical steps - is desired in the art.
SUMMARY OF THE INVENTION
100081 The present invention relates to new methods for manufacturing photovoltaic devices, and the photovoltaic devices made there from.
[0009] In a preferred embodiment, the n-type layer is formed as a continuation of a treatment whereby the CIGS is being exposed to an activity of In, Ga and Se at elevated temperatures less than 460 C. In such an embodiment, the activity of In, Ga and Se does not substantially change, but the temperature of the substrate is decreased either intentionally, or as a consequence of natural cooling from higher temperatures, to the point where the activity of In, Ga and Se no longer reacts with the CIGS absorber layer. Instead, these elements deposit and form its own compound in the form of an (In,Ga)ySe n-type layer that serves both as a junction partner and as a buffer between the CIGS and the intrinsic ZnO layer that follows. The intrinsic transparent oxide layer supports a transparent conducting oxide layer and a top metal grid.
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] FIG 1 shows an embodiment of a thin-film solar cell in accordance with the present invention with respect to the deposition of a photovoltaic stack design where the absorber layer is CIGS and the junction buffer layer is formed by the invention process.
DETAILED DESCRIPTION OF THE INVENTION
[0011] Chalcopyrite ternary thin films of copper-indium-diselenide (CuInSe2) and copper-indium-gallium-diselenide (CuInl_X Ga, Se2), both of which are generically referred to as Cu(In, Ga)Se2, or CIGS, have become the subject of considerable interest and study for semiconductor devices in recent years. Sulfur can also be, and sometimes is, substituted for selenium, so the compound is sometimes also referred to even more generically as Cu(In,Ga)(Se, S) 2 so as to encompass all of these possible combinations. These devices are also referred to as I-III-VI2 devices according to their constituent elemental groups. These devices are of particular interest for photovoltaic device or solar cell absorber applications. For photovoltaic applications, the p-type CIGS layer is combined with an n-type CdS layer to form a p-n heterojunction CIGS/CdS
device.
[0012] The direct energy gap of CIGS results in a large optical absorption coefficient, which in turn permits the use of thin layers on the order of 1-2 m. An additional advantage of CIGS
devices is their long-term stability.
[0013] Viewing FIG. 1, all layers are deposited on a substrate 105 which may comprise one of a plurality of functional materials, for example, glass, metal, ceramic, or plastic. It is contemplated that the substrate thickness may range from approximately 10.0 m -10mm, and may be rigid or flexible. Preferably, the substrate functions as the back contact for interconnection.
[0014] Deposited directly on the substrate 105 is a barrier layer 110. The barrier layer 110 comprises a thin conductor or very thin insulating material and serves to block the out diffusion of undesirable elements or compounds from the substrate to the rest of the cell. This barrier layer 110 may comprise chromium, titanium, silicon oxide, titanium nitride and related materials that have the requisite conductivity and durability. It is preferable to have a thinner barrier layer 110.
[0015] The next deposited layer is the back contact layer 120 comprising non-reactive metals such as molybdenum. The back contact layer is the electrical contact for the solar cell. The layer may further serve to prevent the diffusion of chemical compounds from the other layers to the solar cell structure. The layer also serves as a thermal expansion buffer between the substrate 105 and the solar cell structure.
[0016] The next layer is deposited upon the back contact layer 120 and is a p-type semiconductor layer 130 to improve adhesion between the absorber and the back contact. The p-type semiconductor layer 130 may be a I-IIIa,b-VI isotype semiconductor, but the preferred composition is Cu:Ga:Se, Cu:Al:Se or Cu:In:Se alloyed with either of the previous compounds.
[0017] In this embodiment, the formation of a p-type absorber layer 155 involves the inter-diffusion of a number of discrete layers. Ultimately, as seen in FIG. 1, the p-type semiconductor layers 130 and 150 combine into a single composite layer 155 which serves as the prime absorber of solar energy. In this embodiment, alkali materials 140 are added for the purpose of seeding the growth of subsequent layers as well as increasing the carrier concentration and grain size of the absorber layer 155, thereby increasing the conversion efficiency of the PV cell.
[0018] Referring still to Figure 1, the next layer comprises another semiconductor layer 150, also known as the CIGS absorber layer. The layer 150 may comprise a compound or compounds, that includes a Type I element (such as Cu, or Ag), and/or a Type III element (such as In, Ga, or AI) and/or a Type VI element (such as Se, and/or S). Preferably, the p-type layer 150 comprises a I-(IIIa,IIIb)-VI2 layer (IIIa = In, IIIe = Ga, Al) where the 0.0<IIIb/(IIIa + IIIb) <
0.4. Preferably, the p-type absorber layer comprises Culnl_X:Ga,t:Sez where x ranges between 0.2 to 0.3 wherein the thickness ranges from about 1 m to about 3 m.
[0019] The semiconductor layer 150 is formed by delivery of the I, III, and VI
precursor materials or the reacted I-III-VI compound on top of the alkali materials 140.
The semiconductor layer or layers may be formed as a mixture or a series of thin layers.
[0020] In an alternate embodiment, the semiconductor layers may consist of a graded absorber layer comprising multiple layers of various combinations of sputter target precursors.
For example, Cu2Se:Ga2Se3:In2Se3 or any like combinations. In an alternate embodiment none of the layers include Se.
[0021] Group I, III, VI precursor materials are subsequently reacted at temperatures of about 400 C to about 600 C to form a I-III-VI2 compound material. The presence of the p-type semiconductor 130 enables optimal I-III-VI2 compound formation kinetics by providing a like chemical and physical surface on which the p-type absorber layer 155 can be formed. At temperatures of about 400 C to about 600 C, the p-type semiconductor layer 130 and p-type semiconductor layer 150 will inter-diffuse by the exchange of the type III
elements.
Additionally, the Na contained in the alkali materials 140 will diffuse out and into the semiconductor layer 150, thus improving the growth of the p-type absorber layer 155 of the completed device. Once deposited, the layers are thermally treated at a temperature of about 400 C - 600 C.
[0022] After the thermal treatment of the p-type absorber layer 150, the photovoltaic production process is continued by the deposition of an n-type junction layer 160. This layer 160 will ultimately interact with the semiconductor layer 150 to form the necessary p-n junction 165. Preferably, the junction buffer layer is formed in the present invention by providing In, Se, Ga, for a period of time and at a lower temperature so that the material rather than react to form a CIGS material, instead deposits an n type material. Typically this takes place when temperature goes below about 450 C and continues to about 300 C. One or more of the constituents of the n-type junction layer may diffuse in whole or in part into the p-type absorber layer aiding in the formation of the p-n junction. Thickness ranges from about 50 nm to about 500 nm for this layer.
The bandgap of the junction layer may or may not be greater than that of the p-type absorber layer. The junction layer may be formed at an ambient temperature that is less than the maximum temperature previously achieved, such as during the upstream p-type absorber layer formation step, specifically in the range of 300 C to 450 C.
[0023] In one embodiment, the lower temperature junction process may be delivered in the same chamber in which the p-type absorber layer is thermally formed. According to this embodiment, the completed p-type absorber layer is exposed to In, Ga, Se vapor for an additional period of time. Concurrently, the temperature is lowered from a first temperature to a preferred range of about 300 C to 450 C. More preferably, the lower temperature range is about 350 C to 400 C. According to this embodiment, a new buffer layer (InGa)ySe is created. In this embodiment, a chamber may thus be configured to anneal the p-type absorber precursor materials in a higher temperature region, and subsequently form a junction layer in a lower-temperature downstream region in the same chamber.
100241 The next layer is an intrinsic transparent oxide layer 170. The transparent intrinsic oxide layer 170 is deposited next to serve as a hetero-junction with the absorber. Preferably, the transparent oxide layer 170 includes a II-VI or a IIIx VIy compound that serves as the hetero-junction partner to the I-III-VI2 absorber. For example, an oxide is typically an oxide of In, Sn or Zn. Preferably, the intrinsic layer 170 comprises a thickness of about 10 nm to about 50 nm.
[0025] Finally, a conducting transparent oxide layer 180 is deposited to function as the top of the electrode of the cell. The oxide is doped to make it both conductive and.
transparent that serves to carry the current to the grid structure. For example, the transparent conducting oxide layer 180 may comprise ZnO or ITO deposited by CVD or sputter. The top conducting layer is preferably transparent, conductive, and contains a compound that includes a Type II element (such as Cd or Zn), and/or a Type III element (such as In, or Al), and/or a Type IV element (such as Sn), and/or a Type VI element (such as Oxygen).
[0026] A grid structure is deposited on top of the conducting transparent oxide layer and is comprised of a metallic layer in a pattern designed to optimize collection and minimize obscuration. Preferably, the grid includes a thin metal layer of type A to assure good ohmic contact between grid structure and transparent conducting oxide and a second metal type B to carry the current to the external circuit. A typical grid metal comprises type A: nickel (lOnm to about 50 nm) and type B: aluminum or silver (3 to 5 um).
[0027] While the invention has been described with reference to particular embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the scope of the invention.
[0028] Therefore, it is intended that the invention not be limited to the particular embodiments disclosed as the best mode contemplated for carrying out this invention, but that the invention will include all embodiments falling within the scope and spirit of the appended claims.
Typically, CIGS films are deposited by vacuum-based techniques. However, the multiple layers comprising a PV device offer challenges to a mass production system.
Presently, there is no proven technology for continuously producing CIGS devices. Additionally, the typical PV cell manufacturing technique involves batch processing that necessitates touch labor, high capital costs, and low manufacturing output. In contrast, a continuous process can minimize capital costs and touch labor while maximizing product throughput and yields.
[00061 CIGS systems, in particular, pose unique challenges to manufacturers.
As discussed by Ramanathan, et. al., Oct. 14, 2002, processes used for large area module manufacture involve deposition of metallic precursor stacks and the subsequent formation of the compound in a selenium and sulfur ambient. In photovoltaic applications, the p-type CIGS
layer is combined with an n-type CdS layer to form a p-n heterojunction CdS/CIGS device.
However, this process is problematic. The band gap of the CdS layer is still low enough to limit the short wavelength part of the solar spectrum that can reach the absorber, and this leads to a reduction in the current that can be collected. This reduction becomes proportionally more severe for higher band gap CIGS cells. Moreover, this process creates hazardous waste, the disposal of which is a challenge to potential manufacture. Thus, finding a practical alternative to the chemical bath deposition ("CBD") CdS processes is desired in the art.
[0007] While some alternatives to the CBD CdS process have been proposed, none are viable options in the context of large scale continuous manufacturing. Some of these include the addition of layers composed of, among others, ZnS, ZnO, Zn(S,O), ZnSe, In2S3, and In(OH)xSy.
However, inserting these alternative buffer layers often involve more chemical steps, as well as post deposition anneals or light soaking to become fully active. Adding these post-deposition steps decreases the efficiency of the manufacturing process, and subjects the product to potential mishandling and contamination. Thus, a process for manufacturing thin-film solar cells using an alternative to CBD CdS technology to insert a buffer layer - without additional chemical steps - is desired in the art.
SUMMARY OF THE INVENTION
100081 The present invention relates to new methods for manufacturing photovoltaic devices, and the photovoltaic devices made there from.
[0009] In a preferred embodiment, the n-type layer is formed as a continuation of a treatment whereby the CIGS is being exposed to an activity of In, Ga and Se at elevated temperatures less than 460 C. In such an embodiment, the activity of In, Ga and Se does not substantially change, but the temperature of the substrate is decreased either intentionally, or as a consequence of natural cooling from higher temperatures, to the point where the activity of In, Ga and Se no longer reacts with the CIGS absorber layer. Instead, these elements deposit and form its own compound in the form of an (In,Ga)ySe n-type layer that serves both as a junction partner and as a buffer between the CIGS and the intrinsic ZnO layer that follows. The intrinsic transparent oxide layer supports a transparent conducting oxide layer and a top metal grid.
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] FIG 1 shows an embodiment of a thin-film solar cell in accordance with the present invention with respect to the deposition of a photovoltaic stack design where the absorber layer is CIGS and the junction buffer layer is formed by the invention process.
DETAILED DESCRIPTION OF THE INVENTION
[0011] Chalcopyrite ternary thin films of copper-indium-diselenide (CuInSe2) and copper-indium-gallium-diselenide (CuInl_X Ga, Se2), both of which are generically referred to as Cu(In, Ga)Se2, or CIGS, have become the subject of considerable interest and study for semiconductor devices in recent years. Sulfur can also be, and sometimes is, substituted for selenium, so the compound is sometimes also referred to even more generically as Cu(In,Ga)(Se, S) 2 so as to encompass all of these possible combinations. These devices are also referred to as I-III-VI2 devices according to their constituent elemental groups. These devices are of particular interest for photovoltaic device or solar cell absorber applications. For photovoltaic applications, the p-type CIGS layer is combined with an n-type CdS layer to form a p-n heterojunction CIGS/CdS
device.
[0012] The direct energy gap of CIGS results in a large optical absorption coefficient, which in turn permits the use of thin layers on the order of 1-2 m. An additional advantage of CIGS
devices is their long-term stability.
[0013] Viewing FIG. 1, all layers are deposited on a substrate 105 which may comprise one of a plurality of functional materials, for example, glass, metal, ceramic, or plastic. It is contemplated that the substrate thickness may range from approximately 10.0 m -10mm, and may be rigid or flexible. Preferably, the substrate functions as the back contact for interconnection.
[0014] Deposited directly on the substrate 105 is a barrier layer 110. The barrier layer 110 comprises a thin conductor or very thin insulating material and serves to block the out diffusion of undesirable elements or compounds from the substrate to the rest of the cell. This barrier layer 110 may comprise chromium, titanium, silicon oxide, titanium nitride and related materials that have the requisite conductivity and durability. It is preferable to have a thinner barrier layer 110.
[0015] The next deposited layer is the back contact layer 120 comprising non-reactive metals such as molybdenum. The back contact layer is the electrical contact for the solar cell. The layer may further serve to prevent the diffusion of chemical compounds from the other layers to the solar cell structure. The layer also serves as a thermal expansion buffer between the substrate 105 and the solar cell structure.
[0016] The next layer is deposited upon the back contact layer 120 and is a p-type semiconductor layer 130 to improve adhesion between the absorber and the back contact. The p-type semiconductor layer 130 may be a I-IIIa,b-VI isotype semiconductor, but the preferred composition is Cu:Ga:Se, Cu:Al:Se or Cu:In:Se alloyed with either of the previous compounds.
[0017] In this embodiment, the formation of a p-type absorber layer 155 involves the inter-diffusion of a number of discrete layers. Ultimately, as seen in FIG. 1, the p-type semiconductor layers 130 and 150 combine into a single composite layer 155 which serves as the prime absorber of solar energy. In this embodiment, alkali materials 140 are added for the purpose of seeding the growth of subsequent layers as well as increasing the carrier concentration and grain size of the absorber layer 155, thereby increasing the conversion efficiency of the PV cell.
[0018] Referring still to Figure 1, the next layer comprises another semiconductor layer 150, also known as the CIGS absorber layer. The layer 150 may comprise a compound or compounds, that includes a Type I element (such as Cu, or Ag), and/or a Type III element (such as In, Ga, or AI) and/or a Type VI element (such as Se, and/or S). Preferably, the p-type layer 150 comprises a I-(IIIa,IIIb)-VI2 layer (IIIa = In, IIIe = Ga, Al) where the 0.0<IIIb/(IIIa + IIIb) <
0.4. Preferably, the p-type absorber layer comprises Culnl_X:Ga,t:Sez where x ranges between 0.2 to 0.3 wherein the thickness ranges from about 1 m to about 3 m.
[0019] The semiconductor layer 150 is formed by delivery of the I, III, and VI
precursor materials or the reacted I-III-VI compound on top of the alkali materials 140.
The semiconductor layer or layers may be formed as a mixture or a series of thin layers.
[0020] In an alternate embodiment, the semiconductor layers may consist of a graded absorber layer comprising multiple layers of various combinations of sputter target precursors.
For example, Cu2Se:Ga2Se3:In2Se3 or any like combinations. In an alternate embodiment none of the layers include Se.
[0021] Group I, III, VI precursor materials are subsequently reacted at temperatures of about 400 C to about 600 C to form a I-III-VI2 compound material. The presence of the p-type semiconductor 130 enables optimal I-III-VI2 compound formation kinetics by providing a like chemical and physical surface on which the p-type absorber layer 155 can be formed. At temperatures of about 400 C to about 600 C, the p-type semiconductor layer 130 and p-type semiconductor layer 150 will inter-diffuse by the exchange of the type III
elements.
Additionally, the Na contained in the alkali materials 140 will diffuse out and into the semiconductor layer 150, thus improving the growth of the p-type absorber layer 155 of the completed device. Once deposited, the layers are thermally treated at a temperature of about 400 C - 600 C.
[0022] After the thermal treatment of the p-type absorber layer 150, the photovoltaic production process is continued by the deposition of an n-type junction layer 160. This layer 160 will ultimately interact with the semiconductor layer 150 to form the necessary p-n junction 165. Preferably, the junction buffer layer is formed in the present invention by providing In, Se, Ga, for a period of time and at a lower temperature so that the material rather than react to form a CIGS material, instead deposits an n type material. Typically this takes place when temperature goes below about 450 C and continues to about 300 C. One or more of the constituents of the n-type junction layer may diffuse in whole or in part into the p-type absorber layer aiding in the formation of the p-n junction. Thickness ranges from about 50 nm to about 500 nm for this layer.
The bandgap of the junction layer may or may not be greater than that of the p-type absorber layer. The junction layer may be formed at an ambient temperature that is less than the maximum temperature previously achieved, such as during the upstream p-type absorber layer formation step, specifically in the range of 300 C to 450 C.
[0023] In one embodiment, the lower temperature junction process may be delivered in the same chamber in which the p-type absorber layer is thermally formed. According to this embodiment, the completed p-type absorber layer is exposed to In, Ga, Se vapor for an additional period of time. Concurrently, the temperature is lowered from a first temperature to a preferred range of about 300 C to 450 C. More preferably, the lower temperature range is about 350 C to 400 C. According to this embodiment, a new buffer layer (InGa)ySe is created. In this embodiment, a chamber may thus be configured to anneal the p-type absorber precursor materials in a higher temperature region, and subsequently form a junction layer in a lower-temperature downstream region in the same chamber.
100241 The next layer is an intrinsic transparent oxide layer 170. The transparent intrinsic oxide layer 170 is deposited next to serve as a hetero-junction with the absorber. Preferably, the transparent oxide layer 170 includes a II-VI or a IIIx VIy compound that serves as the hetero-junction partner to the I-III-VI2 absorber. For example, an oxide is typically an oxide of In, Sn or Zn. Preferably, the intrinsic layer 170 comprises a thickness of about 10 nm to about 50 nm.
[0025] Finally, a conducting transparent oxide layer 180 is deposited to function as the top of the electrode of the cell. The oxide is doped to make it both conductive and.
transparent that serves to carry the current to the grid structure. For example, the transparent conducting oxide layer 180 may comprise ZnO or ITO deposited by CVD or sputter. The top conducting layer is preferably transparent, conductive, and contains a compound that includes a Type II element (such as Cd or Zn), and/or a Type III element (such as In, or Al), and/or a Type IV element (such as Sn), and/or a Type VI element (such as Oxygen).
[0026] A grid structure is deposited on top of the conducting transparent oxide layer and is comprised of a metallic layer in a pattern designed to optimize collection and minimize obscuration. Preferably, the grid includes a thin metal layer of type A to assure good ohmic contact between grid structure and transparent conducting oxide and a second metal type B to carry the current to the external circuit. A typical grid metal comprises type A: nickel (lOnm to about 50 nm) and type B: aluminum or silver (3 to 5 um).
[0027] While the invention has been described with reference to particular embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the scope of the invention.
[0028] Therefore, it is intended that the invention not be limited to the particular embodiments disclosed as the best mode contemplated for carrying out this invention, but that the invention will include all embodiments falling within the scope and spirit of the appended claims.
Claims (11)
1. A process for preparing a photovolatiac device comprising the steps of:
a. providing a p-type semiconductor layer of CIGS on a substrate;
b. exposing said p-type semiconductor layer to In+Se+Ga vapor for a period of 2 to 4 minutes in a temperature range of between about 300 °C to about 450 °C
to produce an n-type semiconductor layer to form a p-n junction.
a. providing a p-type semiconductor layer of CIGS on a substrate;
b. exposing said p-type semiconductor layer to In+Se+Ga vapor for a period of 2 to 4 minutes in a temperature range of between about 300 °C to about 450 °C
to produce an n-type semiconductor layer to form a p-n junction.
2. A process for preparing a photovolatiac device comprising the steps of:
a. providing a p-type semiconductor layer of CIGS on a substrate;
b. exposing said p-type semiconductor layer to In+Se+Ga vapor resulting in a thickness of about 50 nm to about 500 nm to produce an n-type semiconductor layer to form a p-n junction.
a. providing a p-type semiconductor layer of CIGS on a substrate;
b. exposing said p-type semiconductor layer to In+Se+Ga vapor resulting in a thickness of about 50 nm to about 500 nm to produce an n-type semiconductor layer to form a p-n junction.
3.) A photovoltaic device comprising:
a. a substrate with a CIGS layer; and b. an n-type junction made by providing In+Se+Ga for a period of 2 to 4 minutes in a temperature range between about 300 °C to about 450 °C.
a. a substrate with a CIGS layer; and b. an n-type junction made by providing In+Se+Ga for a period of 2 to 4 minutes in a temperature range between about 300 °C to about 450 °C.
4. A photovoltaic device comprising:
a. a substrate with a CIGS layer:
b. and an n- type junction made by providing In+Se+Ga resulting in a thickness of about 50 nm to about 500 nm to produce an n-type layer to form a p-n junction.
a. a substrate with a CIGS layer:
b. and an n- type junction made by providing In+Se+Ga resulting in a thickness of about 50 nm to about 500 nm to produce an n-type layer to form a p-n junction.
5. A photovoltaic device where a p-type absorber layer is thermally formed and then exposed to In+Se+Ga vapor for an additional period of time, and concurrently the temperature is lowered from a first temperature to a range of about 300 °C to 450 °C.
6. The device of claim 3 wherein the temperature range is about 350 °C
to 400 °C.
to 400 °C.
7. The device of claim 5 wherein the temperature range is about 350 °C
to 400 °C.
to 400 °C.
8. The device of claim 3 wherein the device is exposed to In+Se+Ga vapor for sufficient time within said temperature range to deposit a(In x Ga1-x)2Se3 layer.
9. The device of claim 5 wherein the device is exposed to In+Se+Ga vapor for sufficient time within said temperature range to deposit a(In x Ga1-x)2Se3 layer.
10. The device of claim 3 wherein deposition of said (In x Ga1-x)2Se3 layer is deposited at 350 °C to 370 °C.
11. The device of claim 5 wherein deposition of said (In x Ga1-x)2Se3 layer is deposited at 350 °C to 370 °C.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US62684304P | 2004-11-10 | 2004-11-10 | |
US60/626,843 | 2004-11-10 | ||
PCT/US2005/040575 WO2006053032A1 (en) | 2004-11-10 | 2005-11-10 | Thermal process for creation of an in-situ junction layer in cigs |
US11/271,583 | 2005-11-10 | ||
US11/271,583 US7576017B2 (en) | 2004-11-10 | 2005-11-10 | Method and apparatus for forming a thin-film solar cell using a continuous process |
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CA2586961A1 true CA2586961A1 (en) | 2006-05-18 |
Family
ID=36315037
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CA002586961A Abandoned CA2586961A1 (en) | 2004-11-10 | 2005-11-10 | Thermal process for creation of an in-situ junction layer in cigs |
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Country | Link |
---|---|
US (1) | US7576017B2 (en) |
EP (1) | EP1817113A1 (en) |
JP (1) | JP2008520101A (en) |
CA (1) | CA2586961A1 (en) |
WO (1) | WO2006053032A1 (en) |
Families Citing this family (94)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SE0400582D0 (en) * | 2004-03-05 | 2004-03-05 | Forskarpatent I Uppsala Ab | Method for in-line process control of the CIGS process |
US20060219288A1 (en) * | 2004-11-10 | 2006-10-05 | Daystar Technologies, Inc. | Process and photovoltaic device using an akali-containing layer |
TW200633241A (en) * | 2004-11-10 | 2006-09-16 | Daystar Technologies Inc | Vertical production of photovoltaic devices |
US20100326429A1 (en) * | 2006-05-19 | 2010-12-30 | Cumpston Brian H | Hermetically sealed cylindrical solar cells |
DE602007003216D1 (en) * | 2006-04-18 | 2009-12-24 | Dow Corning | PHOTOVOLTAIC ARRANGEMENT ON COPPER-INDIUM-DISELENID BASE AND MANUFACTURING METHOD THEREFOR |
JP2009534841A (en) * | 2006-04-18 | 2009-09-24 | ダウ・コーニング・コーポレイション | Photovoltaic devices based on copper indium diselenide and methods for making the same |
US9105776B2 (en) * | 2006-05-15 | 2015-08-11 | Stion Corporation | Method and structure for thin film photovoltaic materials using semiconductor materials |
US8017860B2 (en) * | 2006-05-15 | 2011-09-13 | Stion Corporation | Method and structure for thin film photovoltaic materials using bulk semiconductor materials |
US8092601B2 (en) * | 2006-12-13 | 2012-01-10 | Ascentool, Inc. | System and process for fabricating photovoltaic cell |
WO2008093122A1 (en) * | 2007-02-02 | 2008-08-07 | G24 Innovations Limited | Web processing |
US20080300918A1 (en) * | 2007-05-29 | 2008-12-04 | Commercenet Consortium, Inc. | System and method for facilitating hospital scheduling and support |
US8071179B2 (en) | 2007-06-29 | 2011-12-06 | Stion Corporation | Methods for infusing one or more materials into nano-voids if nanoporous or nanostructured materials |
US7919400B2 (en) * | 2007-07-10 | 2011-04-05 | Stion Corporation | Methods for doping nanostructured materials and nanostructured thin films |
US8648253B1 (en) | 2010-10-01 | 2014-02-11 | Ascent Solar Technologies, Inc. | Machine and process for continuous, sequential, deposition of semiconductor solar absorbers having variable semiconductor composition deposited in multiple sublayers |
US8465589B1 (en) | 2009-02-05 | 2013-06-18 | Ascent Solar Technologies, Inc. | Machine and process for sequential multi-sublayer deposition of copper indium gallium diselenide compound semiconductors |
EP2188406B1 (en) | 2007-09-12 | 2018-03-07 | Flisom AG | Method for manufacturing a compound film |
US8614396B2 (en) * | 2007-09-28 | 2013-12-24 | Stion Corporation | Method and material for purifying iron disilicide for photovoltaic application |
US20090087939A1 (en) * | 2007-09-28 | 2009-04-02 | Stion Corporation | Column structure thin film material using metal oxide bearing semiconductor material for solar cell devices |
US8759671B2 (en) * | 2007-09-28 | 2014-06-24 | Stion Corporation | Thin film metal oxide bearing semiconductor material for single junction solar cell devices |
US8058092B2 (en) | 2007-09-28 | 2011-11-15 | Stion Corporation | Method and material for processing iron disilicide for photovoltaic application |
US8287942B1 (en) | 2007-09-28 | 2012-10-16 | Stion Corporation | Method for manufacture of semiconductor bearing thin film material |
US8771419B2 (en) * | 2007-10-05 | 2014-07-08 | Solopower Systems, Inc. | Roll to roll evaporation tool for solar absorber precursor formation |
US7998762B1 (en) | 2007-11-14 | 2011-08-16 | Stion Corporation | Method and system for large scale manufacture of thin film photovoltaic devices using multi-chamber configuration |
US8163090B2 (en) * | 2007-12-10 | 2012-04-24 | Solopower, Inc. | Methods structures and apparatus to provide group VIA and IA materials for solar cell absorber formation |
US8323408B2 (en) * | 2007-12-10 | 2012-12-04 | Solopower, Inc. | Methods and apparatus to provide group VIA materials to reactors for group IBIIIAVIA film formation |
DE212009000031U1 (en) * | 2008-03-05 | 2010-11-04 | Global Solar Energy, Inc., Tuscon | Device for applying a thin-layer buffer layer to a flexible carrier |
US9252318B2 (en) | 2008-03-05 | 2016-02-02 | Hanergy Hi-Tech Power (Hk) Limited | Solution containment during buffer layer deposition |
WO2009111052A1 (en) * | 2008-03-05 | 2009-09-11 | Global Solar Energy, Inc. | Heating for buffer layer deposition |
US8062922B2 (en) * | 2008-03-05 | 2011-11-22 | Global Solar Energy, Inc. | Buffer layer deposition for thin-film solar cells |
WO2009111055A1 (en) * | 2008-03-05 | 2009-09-11 | Global Solar Energy, Inc. | Feedback for buffer layer deposition |
US8642138B2 (en) | 2008-06-11 | 2014-02-04 | Stion Corporation | Processing method for cleaning sulfur entities of contact regions |
US9087943B2 (en) * | 2008-06-25 | 2015-07-21 | Stion Corporation | High efficiency photovoltaic cell and manufacturing method free of metal disulfide barrier material |
US8003432B2 (en) | 2008-06-25 | 2011-08-23 | Stion Corporation | Consumable adhesive layer for thin film photovoltaic material |
US9157145B2 (en) | 2008-07-29 | 2015-10-13 | Intevac, Inc. | Processing tool with combined sputter and evaporation deposition sources |
KR100984701B1 (en) | 2008-08-01 | 2010-10-01 | 엘지전자 주식회사 | Method for Manufacturing Solar Cell |
KR100992304B1 (en) | 2008-08-29 | 2010-11-05 | 삼성전기주식회사 | Roll-to-roll type thin film pattern formation apparatus |
US7855089B2 (en) | 2008-09-10 | 2010-12-21 | Stion Corporation | Application specific solar cell and method for manufacture using thin film photovoltaic materials |
US8404047B2 (en) * | 2008-09-16 | 2013-03-26 | United Technologies Corporation | Electron beam vapor deposition apparatus and method |
US8008110B1 (en) | 2008-09-29 | 2011-08-30 | Stion Corporation | Bulk sodium species treatment of thin film photovoltaic cell and manufacturing method |
US8008112B1 (en) | 2008-09-29 | 2011-08-30 | Stion Corporation | Bulk chloride species treatment of thin film photovoltaic cell and manufacturing method |
US8476104B1 (en) | 2008-09-29 | 2013-07-02 | Stion Corporation | Sodium species surface treatment of thin film photovoltaic cell and manufacturing method |
US8236597B1 (en) | 2008-09-29 | 2012-08-07 | Stion Corporation | Bulk metal species treatment of thin film photovoltaic cell and manufacturing method |
US8394662B1 (en) | 2008-09-29 | 2013-03-12 | Stion Corporation | Chloride species surface treatment of thin film photovoltaic cell and manufacturing method |
US8501521B1 (en) | 2008-09-29 | 2013-08-06 | Stion Corporation | Copper species surface treatment of thin film photovoltaic cell and manufacturing method |
US8026122B1 (en) | 2008-09-29 | 2011-09-27 | Stion Corporation | Metal species surface treatment of thin film photovoltaic cell and manufacturing method |
US7910399B1 (en) | 2008-09-30 | 2011-03-22 | Stion Corporation | Thermal management and method for large scale processing of CIS and/or CIGS based thin films overlying glass substrates |
US7947524B2 (en) | 2008-09-30 | 2011-05-24 | Stion Corporation | Humidity control and method for thin film photovoltaic materials |
US7964434B2 (en) * | 2008-09-30 | 2011-06-21 | Stion Corporation | Sodium doping method and system of CIGS based materials using large scale batch processing |
US7863074B2 (en) | 2008-09-30 | 2011-01-04 | Stion Corporation | Patterning electrode materials free from berm structures for thin film photovoltaic cells |
US8383450B2 (en) | 2008-09-30 | 2013-02-26 | Stion Corporation | Large scale chemical bath system and method for cadmium sulfide processing of thin film photovoltaic materials |
US8425739B1 (en) | 2008-09-30 | 2013-04-23 | Stion Corporation | In chamber sodium doping process and system for large scale cigs based thin film photovoltaic materials |
US8741689B2 (en) | 2008-10-01 | 2014-06-03 | Stion Corporation | Thermal pre-treatment process for soda lime glass substrate for thin film photovoltaic materials |
US20110018103A1 (en) * | 2008-10-02 | 2011-01-27 | Stion Corporation | System and method for transferring substrates in large scale processing of cigs and/or cis devices |
US8435826B1 (en) | 2008-10-06 | 2013-05-07 | Stion Corporation | Bulk sulfide species treatment of thin film photovoltaic cell and manufacturing method |
US8003430B1 (en) | 2008-10-06 | 2011-08-23 | Stion Corporation | Sulfide species treatment of thin film photovoltaic cell and manufacturing method |
USD625695S1 (en) | 2008-10-14 | 2010-10-19 | Stion Corporation | Patterned thin film photovoltaic module |
US8168463B2 (en) | 2008-10-17 | 2012-05-01 | Stion Corporation | Zinc oxide film method and structure for CIGS cell |
US8344243B2 (en) * | 2008-11-20 | 2013-01-01 | Stion Corporation | Method and structure for thin film photovoltaic cell using similar material junction |
US20100170566A1 (en) * | 2009-01-06 | 2010-07-08 | Arthur Don Harmala | Apparatus and method for manufacturing polymer solar cells |
US8134069B2 (en) | 2009-04-13 | 2012-03-13 | Miasole | Method and apparatus for controllable sodium delivery for thin film photovoltaic materials |
US7785921B1 (en) * | 2009-04-13 | 2010-08-31 | Miasole | Barrier for doped molybdenum targets |
US8241943B1 (en) | 2009-05-08 | 2012-08-14 | Stion Corporation | Sodium doping method and system for shaped CIGS/CIS based thin film solar cells |
US8372684B1 (en) | 2009-05-14 | 2013-02-12 | Stion Corporation | Method and system for selenization in fabricating CIGS/CIS solar cells |
USD628332S1 (en) | 2009-06-12 | 2010-11-30 | Stion Corporation | Pin striped thin film solar module for street lamp |
USD662040S1 (en) | 2009-06-12 | 2012-06-19 | Stion Corporation | Pin striped thin film solar module for garden lamp |
USD632415S1 (en) | 2009-06-13 | 2011-02-08 | Stion Corporation | Pin striped thin film solar module for cluster lamp |
USD662041S1 (en) | 2009-06-23 | 2012-06-19 | Stion Corporation | Pin striped thin film solar module for laptop personal computer |
USD652262S1 (en) | 2009-06-23 | 2012-01-17 | Stion Corporation | Pin striped thin film solar module for cooler |
JP2011009557A (en) * | 2009-06-26 | 2011-01-13 | Kyocera Corp | Photoelectric conversion cell and photoelectric conversion module |
US8507786B1 (en) | 2009-06-27 | 2013-08-13 | Stion Corporation | Manufacturing method for patterning CIGS/CIS solar cells |
USD627696S1 (en) | 2009-07-01 | 2010-11-23 | Stion Corporation | Pin striped thin film solar module for recreational vehicle |
US8398772B1 (en) | 2009-08-18 | 2013-03-19 | Stion Corporation | Method and structure for processing thin film PV cells with improved temperature uniformity |
WO2011025715A1 (en) * | 2009-08-24 | 2011-03-03 | First Solar, Inc. | Doped transparent conductive oxide |
US20110067998A1 (en) * | 2009-09-20 | 2011-03-24 | Miasole | Method of making an electrically conductive cadmium sulfide sputtering target for photovoltaic manufacturing |
US8809096B1 (en) | 2009-10-22 | 2014-08-19 | Stion Corporation | Bell jar extraction tool method and apparatus for thin film photovoltaic materials |
US8859880B2 (en) * | 2010-01-22 | 2014-10-14 | Stion Corporation | Method and structure for tiling industrial thin-film solar devices |
US8263494B2 (en) | 2010-01-25 | 2012-09-11 | Stion Corporation | Method for improved patterning accuracy for thin film photovoltaic panels |
US8142521B2 (en) * | 2010-03-29 | 2012-03-27 | Stion Corporation | Large scale MOCVD system for thin film photovoltaic devices |
US9096930B2 (en) | 2010-03-29 | 2015-08-04 | Stion Corporation | Apparatus for manufacturing thin film photovoltaic devices |
US8513050B1 (en) * | 2010-06-15 | 2013-08-20 | U.S. Department Of Energy | Bi-Se doped with Cu, p-type semiconductor |
US8461061B2 (en) | 2010-07-23 | 2013-06-11 | Stion Corporation | Quartz boat method and apparatus for thin film thermal treatment |
US8772076B2 (en) * | 2010-09-03 | 2014-07-08 | Solopower Systems, Inc. | Back contact diffusion barrier layers for group ibiiiavia photovoltaic cells |
US8628997B2 (en) | 2010-10-01 | 2014-01-14 | Stion Corporation | Method and device for cadmium-free solar cells |
US8426725B2 (en) | 2010-12-13 | 2013-04-23 | Ascent Solar Technologies, Inc. | Apparatus and method for hybrid photovoltaic device having multiple, stacked, heterogeneous, semiconductor junctions |
US8950470B2 (en) | 2010-12-30 | 2015-02-10 | Poole Ventura, Inc. | Thermal diffusion chamber control device and method |
US8728200B1 (en) | 2011-01-14 | 2014-05-20 | Stion Corporation | Method and system for recycling processing gas for selenization of thin film photovoltaic materials |
US8998606B2 (en) | 2011-01-14 | 2015-04-07 | Stion Corporation | Apparatus and method utilizing forced convection for uniform thermal treatment of thin film devices |
US8097085B2 (en) * | 2011-01-28 | 2012-01-17 | Poole Ventura, Inc. | Thermal diffusion chamber |
US8436445B2 (en) | 2011-08-15 | 2013-05-07 | Stion Corporation | Method of manufacture of sodium doped CIGS/CIGSS absorber layers for high efficiency photovoltaic devices |
US10043921B1 (en) | 2011-12-21 | 2018-08-07 | Beijing Apollo Ding Rong Solar Technology Co., Ltd. | Photovoltaic cell with high efficiency cigs absorber layer with low minority carrier lifetime and method of making thereof |
US9825197B2 (en) | 2013-03-01 | 2017-11-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming a buffer layer in a solar cell, and a solar cell formed by the method |
CN103515464B (en) * | 2013-11-04 | 2016-03-02 | 宁夏东旭太阳能科技有限公司 | Space efficient superconductive solar battery |
US20180037981A1 (en) * | 2016-08-03 | 2018-02-08 | Beijing Apollo Ding Rong Solar Technology Co., Ltd. | Temperature-controlled chalcogen vapor distribution apparatus and method for uniform cigs deposition |
US11728449B2 (en) * | 2019-12-03 | 2023-08-15 | Applied Materials, Inc. | Copper, indium, gallium, selenium (CIGS) films with improved quantum efficiency |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5187115A (en) | 1977-12-05 | 1993-02-16 | Plasma Physics Corp. | Method of forming semiconducting materials and barriers using a dual enclosure apparatus |
US4392451A (en) * | 1980-12-31 | 1983-07-12 | The Boeing Company | Apparatus for forming thin-film heterojunction solar cells employing materials selected from the class of I-III-VI2 chalcopyrite compounds |
US5258075A (en) * | 1983-06-30 | 1993-11-02 | Canon Kabushiki Kaisha | Process for producing photoconductive member and apparatus for producing the same |
US4576830A (en) | 1984-11-05 | 1986-03-18 | Chronar Corp. | Deposition of materials |
US4663829A (en) | 1985-10-11 | 1987-05-12 | Energy Conversion Devices, Inc. | Process and apparatus for continuous production of lightweight arrays of photovoltaic cells |
US5366554A (en) * | 1986-01-14 | 1994-11-22 | Canon Kabushiki Kaisha | Device for forming a deposited film |
US4863316A (en) * | 1987-07-01 | 1989-09-05 | The Perkin-Elmer Corporation | Closed loop powder flow regulator |
US4851095A (en) | 1988-02-08 | 1989-07-25 | Optical Coating Laboratory, Inc. | Magnetron sputtering apparatus and process |
US5474611A (en) * | 1992-05-20 | 1995-12-12 | Yoichi Murayama, Shincron Co., Ltd. | Plasma vapor deposition apparatus |
US5343012A (en) | 1992-10-06 | 1994-08-30 | Hardy Walter N | Differentially pumped temperature controller for low pressure thin film fabrication process |
US5411592A (en) | 1994-06-06 | 1995-05-02 | Ovonic Battery Company, Inc. | Apparatus for deposition of thin-film, solid state batteries |
US6270861B1 (en) | 1994-07-21 | 2001-08-07 | Ut, Battelle Llc | Individually controlled environments for pulsed addition and crystallization |
US5849162A (en) | 1995-04-25 | 1998-12-15 | Deposition Sciences, Inc. | Sputtering device and method for reactive for reactive sputtering |
US6077722A (en) | 1998-07-14 | 2000-06-20 | Bp Solarex | Producing thin film photovoltaic modules with high integrity interconnects and dual layer contacts |
US6323417B1 (en) | 1998-09-29 | 2001-11-27 | Lockheed Martin Corporation | Method of making I-III-VI semiconductor materials for use in photovoltaic cells |
US6554950B2 (en) | 2001-01-16 | 2003-04-29 | Applied Materials, Inc. | Method and apparatus for removal of surface contaminants from substrates in vacuum applications |
US6881647B2 (en) | 2001-09-20 | 2005-04-19 | Heliovolt Corporation | Synthesis of layers, coatings or films using templates |
WO2004032189A2 (en) | 2002-09-30 | 2004-04-15 | Miasolé | Manufacturing apparatus and method for large-scale production of thin-film solar cells |
US20050056863A1 (en) | 2003-09-17 | 2005-03-17 | Matsushita Electric Industrial Co., Ltd. | Semiconductor film, method for manufacturing the semiconductor film, solar cell using the semiconductor film and method for manufacturing the solar cell |
-
2005
- 2005-11-10 CA CA002586961A patent/CA2586961A1/en not_active Abandoned
- 2005-11-10 JP JP2007541291A patent/JP2008520101A/en active Pending
- 2005-11-10 WO PCT/US2005/040575 patent/WO2006053032A1/en active Application Filing
- 2005-11-10 US US11/271,583 patent/US7576017B2/en not_active Expired - Fee Related
- 2005-11-10 EP EP05848347A patent/EP1817113A1/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
US7576017B2 (en) | 2009-08-18 |
JP2008520101A (en) | 2008-06-12 |
WO2006053032A9 (en) | 2007-08-02 |
US20060096537A1 (en) | 2006-05-11 |
EP1817113A1 (en) | 2007-08-15 |
WO2006053032A1 (en) | 2006-05-18 |
WO2006053032A8 (en) | 2006-06-29 |
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