CA2530067A1 - Semiconductor device including band-engineered superlattice - Google Patents

Semiconductor device including band-engineered superlattice Download PDF

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Publication number
CA2530067A1
CA2530067A1 CA002530067A CA2530067A CA2530067A1 CA 2530067 A1 CA2530067 A1 CA 2530067A1 CA 002530067 A CA002530067 A CA 002530067A CA 2530067 A CA2530067 A CA 2530067A CA 2530067 A1 CA2530067 A1 CA 2530067A1
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CA
Canada
Prior art keywords
semiconductor device
semiconductor
superlattice
base
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002530067A
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French (fr)
Other versions
CA2530067C (en
Inventor
Robert J. Mears
Jean Augustin Chan Sow Fook Yiptong
Marek Hytha
Scott A. Kreps
Ilija Dukovski
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Atomera Inc
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Individual
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Priority claimed from US10/603,696 external-priority patent/US20040262594A1/en
Priority claimed from US10/603,621 external-priority patent/US20040266116A1/en
Application filed by Individual filed Critical Individual
Publication of CA2530067A1 publication Critical patent/CA2530067A1/en
Application granted granted Critical
Publication of CA2530067C publication Critical patent/CA2530067C/en
Expired - Fee Related legal-status Critical Current
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1054Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/155Comprising only semiconductor materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's

Abstract

A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

Claims (20)

1. A semiconductor device comprising:
a superlattice comprising a plurality of stacked groups of layers; and regions for causing transport of charge carriers through said superlattice in a parallel direction relative to the stacked groups of layers;
each group of layers of said superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon;
said energy-band modifying layer comprising at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that said superlattice has a higher charge carrier mobility in the parallel direction than would otherwise be present.
2. A semiconductor device according to Claim 1 wherein said superlattice has a common energy band structure therein.
3. A semiconductor device according to Claim 1 wherein the charge carriers having the higher mobility comprise at least one of electrons and holes.
4. A semiconductor device according to Claim 1 wherein each base semiconductor portion comprises silicon.
5. A semiconductor device according to Claim 1 wherein each energy band-modifying layer comprises oxygen.
6. A semiconductor device according to Claim 1 wherein each energy band-modifying layer is a single monolayer thick.
7. A semiconductor device according to Claim 1 wherein each base semiconductor portion is less than eight monolayers thick.
8. A semiconductor device according to Claim 1 wherein each base semiconductor portion is two to six monolayers thick.
9. A semiconductor device according to Claim 1 wherein said superlattice further has a substantially direct energy bandgap.
10. A semiconductor device according to Claim 1 wherein said superlattice further comprises a base semiconductor cap layer on an uppermost group of layers.
11. A semiconductor device according to Claim 1 wherein all of said base semiconductor portions are a same number of monolayers thick.
12. A semiconductor device according to Claim 1 wherein at least some of said base semiconductor portions are a different number of monolayers thick.
13. A semiconductor device according to Claim 1 wherein all of said base semiconductor portions are a different number of monolayers thick.
14. A semiconductor device according to Claim 1 wherein each non-semiconductor monolayer is thermally stable through deposition of a next layer.
15. A semiconductor device according to Claim 1 wherein each base semiconductor portion comprises a base semiconductor selected from the group consisting of Group IV
semiconductors, Group III-V semiconductors, and Group II-VI
semiconductors.
16. A semiconductor device according to Claim 1 wherein each energy band-modifying layer comprises a non-semiconductor selected from the group consisting of oxygen, nitrogen, fluorine, and carbon-oxygen.
17. A semiconductor device according to Claim 1 further comprising a substrate adjacent said superlattice.
18. A semiconductor device according to Claim 1 wherein the higher charge carrier mobility results from a lower conductivity effective mass for the charge carriers in the parallel direction than would otherwise be present.
19. A semiconductor device according to Claim 18 wherein the lower conductivity effective mass is less than two-thirds the conductivity effective mass that would otherwise occur.
20. A semiconductor device according to Claim 1 wherein said superlattice further comprises at least one type of conductivity dopant therein.
CA2530067A 2003-06-26 2004-06-28 Semiconductor device including band-engineered superlattice Expired - Fee Related CA2530067C (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US10/603,696 US20040262594A1 (en) 2003-06-26 2003-06-26 Semiconductor structures having improved conductivity effective mass and methods for fabricating same
US10/603,696 2003-06-26
US10/603,621 US20040266116A1 (en) 2003-06-26 2003-06-26 Methods of fabricating semiconductor structures having improved conductivity effective mass
US10/603,621 2003-06-26
US10/647,060 2003-08-22
US10/647,060 US6958486B2 (en) 2003-06-26 2003-08-22 Semiconductor device including band-engineered superlattice
PCT/US2004/020652 WO2005034245A1 (en) 2003-06-26 2004-06-28 Semiconductor device including band-engineered superlattice

Publications (2)

Publication Number Publication Date
CA2530067A1 true CA2530067A1 (en) 2005-04-14
CA2530067C CA2530067C (en) 2012-05-01

Family

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CA002530050A Abandoned CA2530050A1 (en) 2003-06-26 2004-06-28 Semiconductor device including band-engineered superlattice
CA2530067A Expired - Fee Related CA2530067C (en) 2003-06-26 2004-06-28 Semiconductor device including band-engineered superlattice

Family Applications Before (1)

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CA002530050A Abandoned CA2530050A1 (en) 2003-06-26 2004-06-28 Semiconductor device including band-engineered superlattice

Country Status (7)

Country Link
US (8) US6830964B1 (en)
EP (2) EP1644984B1 (en)
JP (5) JP4742035B2 (en)
AU (2) AU2004306355B2 (en)
CA (2) CA2530050A1 (en)
DE (4) DE602004023200D1 (en)
WO (2) WO2005013371A2 (en)

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