CA2458572A1 - A method, article and apparatus for providing flexible bandwidth allocation via multiple instantiations of separate buses - Google Patents
A method, article and apparatus for providing flexible bandwidth allocation via multiple instantiations of separate buses Download PDFInfo
- Publication number
- CA2458572A1 CA2458572A1 CA002458572A CA2458572A CA2458572A1 CA 2458572 A1 CA2458572 A1 CA 2458572A1 CA 002458572 A CA002458572 A CA 002458572A CA 2458572 A CA2458572 A CA 2458572A CA 2458572 A1 CA2458572 A1 CA 2458572A1
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- CA
- Canada
- Prior art keywords
- bus
- command
- target
- targets
- push
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
Abstract
A bus mechanism to control information exchanges between bus masters and bus targets over a bus structure that includes separate command, push and pull data buses. Commands are generated by bus masters and are interpreted by bus targets on a per-target basis. Each bus target controls the servicing of a command intended for such target by controlling the transfer of push data ov er the push bus to a bus master specified in the command as a destination, for a push operation type, and by controlling the transfer of pull data over the pull bus to the target from a bus master specified in the command as a destination, for a pull operation type. Arbitration logic associated with ea ch bus is used to control the flow of the information exchanges on that bus.</S DOAB>
Claims (26)
1. ~A method comprising:
transferring a command and a target identification between one or more bus masters and bus targets over a bus structure, the command including information that is interpreted differently by one of the bus targets based on the target identification.
transferring a command and a target identification between one or more bus masters and bus targets over a bus structure, the command including information that is interpreted differently by one of the bus targets based on the target identification.
2. ~The method of claim 1 wherein the target identification is a field in the command.
3. ~The method of claim 1 wherein the bus structure includes a separate command bus, push bus and pull bus.
4. ~The method of claim 1 wherein transferring includes sending the command to all of the bus targets over the command bus so that each bus target can determine if the command is intended for such target.
5. ~The method of claim 3, wherein the bus target identified in the command controls the transfer of information over the push bus to one of the bus masters for a push operation.
6. The method of claim 5 wherein the one of the bus masters is identified in the command by an identifier in a destination field in the command.
7. The method of claim 3 wherein the bus target identified in the command is operable to control transfer of information over the pull bus from one of the master buses to the bus target for a pull operation.
8. The method of claim 7 wherein the one of the bus masters is identified in the command by an identifier in a source field in the command.
9. The method of claim 1 wherein the command is formatted to specify one of a plurality of operation types, and the command includes at least one field that is interpreted according to the which of the plurality of operation types is specified in the command.
10. The method of claim 2 wherein at least one of the units acts as one of the bus masters at times and acts as one of the bus targets at other times.
11. The method of claim 3 wherein the bus structure further includes arbiters, the arbiters including a command arbiter associated with the command bus, a push arbiter associated with the push bus and a pull arbiter associated with the pull bus
12. The method of claim 11 wherein the bus masters arbitrate for use of the command using the command arbiter, and the bus targets arbitrate for use of the push and pull buses using the respective push and pull arbiters.
13. An article comprising:
a storage medium having stored thereon instructions that when executed by a machine result in the following:
transferring a command over a bus to bus targets, the command being formatted to identify one of the bus targets and include information that is interpreted differently based on which one of the bus targets is identified.
a storage medium having stored thereon instructions that when executed by a machine result in the following:
transferring a command over a bus to bus targets, the command being formatted to identify one of the bus targets and include information that is interpreted differently based on which one of the bus targets is identified.
14. The article of claim 13 wherein the bus structure includes a separate command bus, push bus and pull bus.
15. An apparatus comprising:
a plurality of units;
a bus structure to enable communication exchanges between the units connected to the bus structure, with one or more of the units being bus masters and others of the units being bus targets, the bus masters operable to send a command to bus targets over the bus structure, the command formatted to identify one of the bus targets and having information that is interpreted differently based on which one of the bus targets is identified.
a plurality of units;
a bus structure to enable communication exchanges between the units connected to the bus structure, with one or more of the units being bus masters and others of the units being bus targets, the bus masters operable to send a command to bus targets over the bus structure, the command formatted to identify one of the bus targets and having information that is interpreted differently based on which one of the bus targets is identified.
16. The apparatus of claim 15 wherein the bus structure includes a separate command bus, push bus and pull bus.
17. The apparatus of claim 16, wherein the command is sent to all of the bus targets over the command bus to all of the bus targets and each bus target determines if the command is intended for such target.
18. The apparatus of claim 16, wherein the bus target identified in the command is operable to control transfer of information over the push bus to one of the bus masters for a push operation.
19 19. The apparatus of claim 18, wherein the one of the bus masters is identified in the command by an identifier in a destination field in the command.
20. The apparatus of claim 16, wherein the bus target identified in the command is operable to control transfer of information over the pull bus from one of the bus masters to the bus target for a pull operation.
21. The apparatus of claim 20, wherein the one of the bus masters is identified in the command by an identifier in a source field in the command.
22. The apparatus of claim 15 wherein the command is formatted to specify one of a plurality of operation types, and the command includes at least one field that is interpreted according to the which of the plurality of operation types is specified in the command.
23. A apparatus comprising:
a bus master operable to send a command to bus targets over a bus structure, the command being formatted to identify one of the bus targets and including information that is interpreted differently based on which one of the bus targets is identified.
a bus master operable to send a command to bus targets over a bus structure, the command being formatted to identify one of the bus targets and including information that is interpreted differently based on which one of the bus targets is identified.
24. The apparatus of claim 23 wherein the command is formatted to specify one of a plurality of operation types, and the command includes at least one field that is interpreted according to the which of the plurality of operation types is specified in the command.
25. An apparatus comprising:
a bus target operable to receive a command from a bus master over a bus structure, the command being formatted to identify the bus target that receives the command; and logic in the bus target to interpret information that is received by the bus target identified.
a bus target operable to receive a command from a bus master over a bus structure, the command being formatted to identify the bus target that receives the command; and logic in the bus target to interpret information that is received by the bus target identified.
26. The apparatus of claim 25 wherein logic processes the command that is formatted to specify one of a plurality of operation types, and the command includes at least one field interpreted according to the which of the plurality of operation types is specified in the command.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US31514401P | 2001-08-27 | 2001-08-27 | |
US60/315,144 | 2001-08-27 | ||
US10/212,944 | 2002-08-05 | ||
US10/212,944 US7225281B2 (en) | 2001-08-27 | 2002-08-05 | Multiprocessor infrastructure for providing flexible bandwidth allocation via multiple instantiations of separate data buses, control buses and support mechanisms |
PCT/US2002/027430 WO2003019399A1 (en) | 2001-08-27 | 2002-08-27 | A multiprocessor infrastructure for providing flexible bandwidth allocation via multiple instantiations of separate data buses, control buses and support mechanisms |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2458572A1 true CA2458572A1 (en) | 2003-03-06 |
CA2458572C CA2458572C (en) | 2010-03-16 |
Family
ID=26907634
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA2458572A Expired - Fee Related CA2458572C (en) | 2001-08-27 | 2002-08-27 | A method, article and apparatus for providing flexible bandwidth allocation via multiple instantiations of separate buses |
Country Status (8)
Country | Link |
---|---|
US (1) | US7225281B2 (en) |
EP (1) | EP1421504B1 (en) |
AT (1) | ATE368259T1 (en) |
AU (1) | AU2002339857A1 (en) |
CA (1) | CA2458572C (en) |
DE (1) | DE60221406T2 (en) |
TW (1) | TWI249674B (en) |
WO (1) | WO2003019399A1 (en) |
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-
2002
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- 2002-08-27 TW TW091119400A patent/TWI249674B/en not_active IP Right Cessation
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WO2003019399A9 (en) | 2004-01-29 |
US7225281B2 (en) | 2007-05-29 |
WO2003019399A1 (en) | 2003-03-06 |
TWI249674B (en) | 2006-02-21 |
EP1421504A1 (en) | 2004-05-26 |
AU2002339857A1 (en) | 2003-03-10 |
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