CA2319489A1 - Process for synchronising data streams containing atm-cells - Google Patents
Process for synchronising data streams containing atm-cells Download PDFInfo
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- CA2319489A1 CA2319489A1 CA002319489A CA2319489A CA2319489A1 CA 2319489 A1 CA2319489 A1 CA 2319489A1 CA 002319489 A CA002319489 A CA 002319489A CA 2319489 A CA2319489 A CA 2319489A CA 2319489 A1 CA2319489 A1 CA 2319489A1
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- data stream
- data
- streams
- atm cells
- atm
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/15—Interconnection of switching modules
- H04L49/1553—Interconnection of ATM switching modules, e.g. ATM switching fabrics
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
- H04Q11/0478—Provisions for broadband connections
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5625—Operations, administration and maintenance [OAM]
- H04L2012/5627—Fault tolerance and recovery
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5672—Multiplexing, e.g. coding, scrambling
- H04L2012/5674—Synchronisation, timing recovery or alignment
Abstract
In the prior art, redundant data streams containing ATM-cells are reunited by seeking to synchronise them. However, this generally takes a long time. The invention helps in that both data streams are written into the buffer memory and the stored ATM-cells are checked for equality. Send sequence numbers therefore need not be provided.
Description
METHOD FOR SYNCHRONIZING DATA STREAMS COMPRISING ATM
CELLS
The invention is directed to a method according to the preamble of patent claim 1.
In order to be able to transmit information such as, for example, voice information or data via communication networks, the information to be transmitted are combined to form data units. In contemporary communication networks, these data units are fashioned in packets or cells such as, for example, ATM cells.
Care must thereby usually be exercised to see that the sequence of the data units is preserved in the transmission. When the sequence of the data units is not directly assured, for example by employing transmission sequence numbers, serious errors can occur in the communication of the data units. Further errors and losses can occur in that individual data units are either disturbed (modified content) or entirely missing (for example, due to buffer overflows in switching equipment).
In the Prior Art, the dependability of connections in communication networks is enhanced by redundant transmission via two physically separate paths.
What is thereby particularly problematical is the synchronization of the redundant data streams at the receiver and the switching between the data streams.
The publication, Ohta, H., Ueda, E., "Hitless Line Protection Switching 2 0 Method for ATM Networks", International Conference on Communications, Proceedings ICC '93, pp. 272-276, 1993, discloses a method with which the payload data transported in ATM cells are employed for synchronization.
This known method is specifically disclosed for ATM cells. It comprises a total of three operating conditions (search process, confirmation process, out-of 2 5 alignment process). In the "search process" condition, an ATM cell of an arbitrarily selected data stream is stored and compared to all following ATM cells of the other data stream. When two ATM cells agree with one another, then the measured delay is assumed as running time difference between the signals. When no matching ATM
cell for the intermediately stored ATM cell was capable of being found beyond a maximum length, then another ATM cell of the other data stream is intermediately stored and compared.
Since the content of different ATM cells need not necessarily be different, this assumption that identical ATM cells in the two data streams must correspond to one another is not always correct. The assumption is thereby checked by multiple repetition. An ATM cell is thereby respectively stored and compared to the ATM
cell of the other data stream that corresponds to the previously identified delay.
Only then is the next ATM cell stored and compared. The method becomes very slow as a result thereof.
The "confirmation process" condition follows when the search process was successfully run. In this condition, a delay having the size of the measured running time difference is inserted into the leading data stream (that from which the ATM cell was respectively stored). Subsequently, the delayed ATM cells of the leading data stream are compared to the current ATM cells of the trailing data stream.
When this comparison is also repeatedly correct, then the synchronism is considered detected and a switch into the "out-of alignment detection process" condition ensues.
In the "out-of alignment detection process", the delayed ATM cells of the leading data stream continue to be compared to the current ATM cells of the trailing 2 0 data stream. When more than a predetermined plurality of comparisons are successively false, then a re-synchronization is triggered.
The possibility of switching from one data stream to the other at any time that is disclosed in this Prior Art requires that an ATM cell can only be forwarded when it was received from both data streams. This, however, means that a delay 2 5 amounting to the maximum of the two data streams is always inserted. The duration until the synchronism of two data streams has been detected is thus very long given the described method. Moreover, this method has no tolerance with respect to the lack of individual ATM cells, so that every omission of an ATM cell from a data stream triggers a new synchronization process.
CELLS
The invention is directed to a method according to the preamble of patent claim 1.
In order to be able to transmit information such as, for example, voice information or data via communication networks, the information to be transmitted are combined to form data units. In contemporary communication networks, these data units are fashioned in packets or cells such as, for example, ATM cells.
Care must thereby usually be exercised to see that the sequence of the data units is preserved in the transmission. When the sequence of the data units is not directly assured, for example by employing transmission sequence numbers, serious errors can occur in the communication of the data units. Further errors and losses can occur in that individual data units are either disturbed (modified content) or entirely missing (for example, due to buffer overflows in switching equipment).
In the Prior Art, the dependability of connections in communication networks is enhanced by redundant transmission via two physically separate paths.
What is thereby particularly problematical is the synchronization of the redundant data streams at the receiver and the switching between the data streams.
The publication, Ohta, H., Ueda, E., "Hitless Line Protection Switching 2 0 Method for ATM Networks", International Conference on Communications, Proceedings ICC '93, pp. 272-276, 1993, discloses a method with which the payload data transported in ATM cells are employed for synchronization.
This known method is specifically disclosed for ATM cells. It comprises a total of three operating conditions (search process, confirmation process, out-of 2 5 alignment process). In the "search process" condition, an ATM cell of an arbitrarily selected data stream is stored and compared to all following ATM cells of the other data stream. When two ATM cells agree with one another, then the measured delay is assumed as running time difference between the signals. When no matching ATM
cell for the intermediately stored ATM cell was capable of being found beyond a maximum length, then another ATM cell of the other data stream is intermediately stored and compared.
Since the content of different ATM cells need not necessarily be different, this assumption that identical ATM cells in the two data streams must correspond to one another is not always correct. The assumption is thereby checked by multiple repetition. An ATM cell is thereby respectively stored and compared to the ATM
cell of the other data stream that corresponds to the previously identified delay.
Only then is the next ATM cell stored and compared. The method becomes very slow as a result thereof.
The "confirmation process" condition follows when the search process was successfully run. In this condition, a delay having the size of the measured running time difference is inserted into the leading data stream (that from which the ATM cell was respectively stored). Subsequently, the delayed ATM cells of the leading data stream are compared to the current ATM cells of the trailing data stream.
When this comparison is also repeatedly correct, then the synchronism is considered detected and a switch into the "out-of alignment detection process" condition ensues.
In the "out-of alignment detection process", the delayed ATM cells of the leading data stream continue to be compared to the current ATM cells of the trailing 2 0 data stream. When more than a predetermined plurality of comparisons are successively false, then a re-synchronization is triggered.
The possibility of switching from one data stream to the other at any time that is disclosed in this Prior Art requires that an ATM cell can only be forwarded when it was received from both data streams. This, however, means that a delay 2 5 amounting to the maximum of the two data streams is always inserted. The duration until the synchronism of two data streams has been detected is thus very long given the described method. Moreover, this method has no tolerance with respect to the lack of individual ATM cells, so that every omission of an ATM cell from a data stream triggers a new synchronization process.
The invention is based on the object of disclosing a way of how a dependable transmission of information in ATM cells can be assured without thereby deteriorating the dynamics of the transmission event.
Proceeding from the features indicated in patent claim l, the invention is achieved by the features of the characterizing part.
What is especially advantageous about the invention is that the synchronism is very quickly recognized due to the buffering of the data streams.
Moreover, a transmission that is resistant with respect to missing or faulty ATM cells is established by the introduction of a failure recognition phase in the form of an error-tolerant comparison.
Advantageous developments of the invention are recited in the subclaims.
The invention is explained in greater detail below on the basis of an exemplary embodiment.
Shown are:
Figure 1 the block circuit diagram of a device on which the inventive method is run;
Figure 2 the individual stages of the inventive method;
Figure 3 examples of the error correction.
Figure 1 shows a device on which the inventive method is run. In accord 2 0 therewith, an ATM cell stream is split into two redundant data streams that are routed via different paths Wo, W, separately and independently of one another. The data streams are in turn merged in a device according to Figure 1. Buffer memories P~, P, into which the ATM cells of the data streams are written are provided for this purpose. The ATM cells of the data stream D~ are written into the buffer memory Po and the ATM cells of the data stream D, are written into the buffer memory P,.
The ATM cells are compared to one another in a comparison means V. These procedures are controlled and monitored by a control means ST. Based on the criterion of the inventive method, the ATM cells are taken from the buffer memories and supplied to further devices via a path W.
Proceeding from the features indicated in patent claim l, the invention is achieved by the features of the characterizing part.
What is especially advantageous about the invention is that the synchronism is very quickly recognized due to the buffering of the data streams.
Moreover, a transmission that is resistant with respect to missing or faulty ATM cells is established by the introduction of a failure recognition phase in the form of an error-tolerant comparison.
Advantageous developments of the invention are recited in the subclaims.
The invention is explained in greater detail below on the basis of an exemplary embodiment.
Shown are:
Figure 1 the block circuit diagram of a device on which the inventive method is run;
Figure 2 the individual stages of the inventive method;
Figure 3 examples of the error correction.
Figure 1 shows a device on which the inventive method is run. In accord 2 0 therewith, an ATM cell stream is split into two redundant data streams that are routed via different paths Wo, W, separately and independently of one another. The data streams are in turn merged in a device according to Figure 1. Buffer memories P~, P, into which the ATM cells of the data streams are written are provided for this purpose. The ATM cells of the data stream D~ are written into the buffer memory Po and the ATM cells of the data stream D, are written into the buffer memory P,.
The ATM cells are compared to one another in a comparison means V. These procedures are controlled and monitored by a control means ST. Based on the criterion of the inventive method, the ATM cells are taken from the buffer memories and supplied to further devices via a path W.
As can be derived from Figure 2, the method is basically composed of two stages, a synchronization process and a switchover process. The synchronization is implemented with the assistance of the transmitted payload data of the redundant data streams. The synchronization process is fashioned in three phases overall. In the first phase, a synchronization is sought (search phase). The synchronization is checked in the second phase (confirmation phase), and failures are recognized in the third phase (failure recognition phase).
The synchronization is started with the search phase. Which of the two data streams Do, D, is to be considered leading is initially unknown. One data stream l0 is therefore assumed to be leading, either arbitrarily or on the basis of other information not specified in greater detail here (for example, which data stream supplies an ATM cell first, at all). It is then assumed in the present exemplary embodiment, that the data stream D, is to be considered leading.
The ATM cells of the data stream D, assumed to be leading are then written into the buffer memory P,. In the same way, the ATM cells of the data stream Do assumed to be trailing are written into the buffer memory P~. Subsequently, the k oldest, delayed ATM cells of the data stream D, are compared to the k most current, most recently received ATM cells of the data stream Do assumed to be trailing, being . respectively compared upon arrival of an ATM cell of the data stream Do defined as 2 0 trailing. The comparison operations are undertaken in the comparator means V.
Whereas, thus, the ATM cells of the data stream D, assumed to be leading are quasi "retained", the ATM cells of the data stream Do defined as trailing "run"
past and are always compared over a length of k ATM cells. Let the current filling level of the buffer memory P, be l, whereby 1>k applies.
2 5 When the assumption that has been made concerning the property of a data stream as being leading is correct, then coincidence will always prevail when comparing the ATM cells when the filling of the buffer memory P, (data stream assumed to be leading) corresponds to the running time difference 1-k of the data streams.
When the data stream assumed to be trailing is only received after an ATM cell that is newer than the oldest stared ATM cell of the leading data stream, then the comparison can never jibe. A maximum value nmax is therefore provided for the buffer length of the leading data stream.
The synchronization is started with the search phase. Which of the two data streams Do, D, is to be considered leading is initially unknown. One data stream l0 is therefore assumed to be leading, either arbitrarily or on the basis of other information not specified in greater detail here (for example, which data stream supplies an ATM cell first, at all). It is then assumed in the present exemplary embodiment, that the data stream D, is to be considered leading.
The ATM cells of the data stream D, assumed to be leading are then written into the buffer memory P,. In the same way, the ATM cells of the data stream Do assumed to be trailing are written into the buffer memory P~. Subsequently, the k oldest, delayed ATM cells of the data stream D, are compared to the k most current, most recently received ATM cells of the data stream Do assumed to be trailing, being . respectively compared upon arrival of an ATM cell of the data stream Do defined as 2 0 trailing. The comparison operations are undertaken in the comparator means V.
Whereas, thus, the ATM cells of the data stream D, assumed to be leading are quasi "retained", the ATM cells of the data stream Do defined as trailing "run"
past and are always compared over a length of k ATM cells. Let the current filling level of the buffer memory P, be l, whereby 1>k applies.
2 5 When the assumption that has been made concerning the property of a data stream as being leading is correct, then coincidence will always prevail when comparing the ATM cells when the filling of the buffer memory P, (data stream assumed to be leading) corresponds to the running time difference 1-k of the data streams.
When the data stream assumed to be trailing is only received after an ATM cell that is newer than the oldest stared ATM cell of the leading data stream, then the comparison can never jibe. A maximum value nmax is therefore provided for the buffer length of the leading data stream.
5 When the buffer memory P, of the data stream D, assumed to be leading has been filled to this maximum mark n~"~Y without a coinciding region of k ATM
cells having been found in the two data streams, then the original assumption is modified and the other data stream D~ is assumed to be leading. The ATM cells belonging to this data stream continue to be written into the buffer memory Po until a comparison over k ATM cells is correct or the buffer memory P~ is likewise filled. In the latter instance, this is emptied and the original assumption is again modified. This procedure thus corresponds to an alternating sampling.
Alternatively, a simultaneous sampling can be provided. To this end, the search phase is simultaneously implemented for both assumptions. However, more buffer memory must be provided for this. A shortening of the time required until recognition of the synchronization is achieved therewith compared to the alternating sampling.
It is generally true that the probability for an incorrect assumption of the synchronization is all the higher the shorter the comparison length k is. The 2 0 assumption L that has been made is therefore verified L times in the confirmation phase following the search phase in that respectively newly arriving ATM cells of the two data streams D~, D, are compared to one another in pairs. A longer confirmation phase (greater L) again means greater security against missynchronization.
Beginning with the confirmation phase and during the following failure recognition phase, the 2 5 respectively oldest ATM cell of the leading data stream is deleted from the buffer memory given a correct pair-by-pair comparison.
A switch into the failure recognition phase ensues when the confirmation phase was also run error-free. Otherwise, the method begins anew with the search phase. In the failure recognition phase, the ATM cells of the two data streams Do, D, continue to be compared in pairs. When they no longer agree, the reason for this can be that an ATM cell is affected by an error or that individual ATM cells of a data stream are missing. When, in contrast, one data stream fails entirely, then ATM cells of this data stream are no longer received.
Upon recognition of an error in the pair-by-pair comparison of ATM cells during the failure recognition phase, comparisons are implemented with the ATM
cells that were received preceding and following the compared ATM cells in order to identify the type of malfunction. Possible error types are pre-defined for this purpose.
Figure 3a shows the conditions during undisturbed operation. The two 1 o ATM cells to be compared agree with one another here.
It is assumed in Figure 3b that an ATM cell of the trailing data stream D~, has been lost. In this case, the direct comparison of the two ATM cells leads to an inequality. Subsequently, a comparison with the older ATM cell of the leading data stream D, is then implemented. When the comparison of the current ATM cell of the trailing data stream Do to the second-oldest ATM cell of the leading data stream D, leads to an agreement, then it is assumed that an ATM cell was missing in the trailing data stream D~. The corresponding ATM cell of the leading data stream D, is then removed from the buffer memory and the failure recognition phase is continued.
It is assumed in Figure 3c that an ATM cell of the leading data stream D, 2 0 has been lost. In this case, the direct comparison of the two first ATM
cells as well as of the first to the following leads to an inequality. When the comparison of the current ATM cells of the following ATM cell of the trailing data stream Do to the oldest ATM cell of the leading data stream D, leads to no agreement, then it is assumed that an ATM cell had been missing in the leading data stream D,. The 2 5 corresponding ATM cell of the trailing data stream D~ is then overlooked and the failure recognition phase is continued.
It is assumed in Figure 3d that the two ATM cells of the leading data stream D, and of the trailing data stream D~ have been lost. When the comparison of the pair of ATM cells following the current comparison pair leads to agreement, then it is assumed that one of the ATM cells of the current pair is faulty. Both comparison pairs (current, faulty pair and following, correct pair) are then removed from the buffer memory and the failure recognition phase is continued.
When ATM cells are no longer received at all from one of the two data streams, then the synchronization is not longer established and the search phase is begun again. When the delay between the t~.vo data streams Do, D, changes, so that the trailing data stream Do overtakes the leading data stream D,, then the roles are interchanged. Such a change is recognized when two corresponding ATM cells are first simultaneously received and, subsequently, an ATM cell of the previously trailing data stream D~ is received first.
The second stage of the inventive method is subsequently run. This is thereby a matter of the switchover process that was already addressed at the outset. A
selection is thereby made as to which of the ATM cells of the data streams Do, D, are to be supplied to further devices via connecting paths W. The switchover process is run independently of the selected synchronization method.
It is provided in a first development of the invention to select the ATM
cells of the leading data stream D,. Regardless of the fact that they are stored for the synchronization, these are then immediately forwarded to the output when they arrive.
When the delay between the two data streams changes, so that the trailing data stream 2 0 D~ overtakes the leading data stream D,, then the selection is also switched to the other data stream together with the (aforementioned) change in roles in the synchronization.
When one data stream fails completely, then, following a potential changes in roles, the ATM cells are selected from the remaining data stream, which is 2 5 then considered to be leading. An interruption-free switch is thus established given failure of a data stream. After eliminating the failure, the data stream that is again available is synchronized with the existing one. When it thereby turns out that it is the leading data stream, then a switch must occur. This occurs in that the ATM
cells of the leading, non-selected data stream are forwarded via the buffer memory to the output and the buffer memory is emptied by faster readout than entry. The rate of the ATM cells, however, is thereby briefly changed. Given connections having high demands with respect to the continuity of the delay, the compensation procedure must be extended onto a long time span.
In this method, the delay that arises due to synchronization and selection is minimal, since no buffering of the ATM cells occurs and the data stream having the lower running time is always selected. However, faulty or missing ATM cells are also continued in the output data stream since their recognition is only possible later upon arrival of the data units of the trailing data stream.
It is provided in another development of the invention, which is to be considered as an alternative thereto, that the ATM cells of the trailing data stream Do be selected. Upon arrival, the ATM cells of the trailing data stream are compared to those of the leading data stream during the course of the synchronization and are forwarded to the output in the error-free case. When the difference in delay between the two data streams changes, so that the trailing data stream overtakes the leading data stream, then the selection is also switched to the other data stream together with the change in roles in the synchronization.
When missing ATM cells in a data stream are detected in the synchronization tests during the failure recognition phase, then these are supplied to 2 0 the output data stream from the other data stream in the selection. When a data stream completely fails, then one waits up to a defined maximum delay difference and readout is undertaken then from the still intact data stream backed up in the buffer.
After eliminating a failure, the data stream that is again available is synchronized with the existing one. When it thereby turns out that it is the trailing 2 5 data stream, then a switch must take place. This occurs in that the ATM
cells of the leading, non-selected data stream are forwarded from the buffer memory to the output, and the buffer memory is filled by slower readout than entry. However, the rate of the ATM cells is thereby briefly changed. Given connections having high demands with respect to the continuity of the delay, the compensation procedure must be extended onto a long time span.
The method offers the advantage that a compensation of losses in a data stream is possible. . When, moreover, faulty data units are recognized by checksums, then errors in individual ATM cells can also be corrected. However, a delay that is equal to the maximum of the two delays of the data streams must thereby be accepted.
cells having been found in the two data streams, then the original assumption is modified and the other data stream D~ is assumed to be leading. The ATM cells belonging to this data stream continue to be written into the buffer memory Po until a comparison over k ATM cells is correct or the buffer memory P~ is likewise filled. In the latter instance, this is emptied and the original assumption is again modified. This procedure thus corresponds to an alternating sampling.
Alternatively, a simultaneous sampling can be provided. To this end, the search phase is simultaneously implemented for both assumptions. However, more buffer memory must be provided for this. A shortening of the time required until recognition of the synchronization is achieved therewith compared to the alternating sampling.
It is generally true that the probability for an incorrect assumption of the synchronization is all the higher the shorter the comparison length k is. The 2 0 assumption L that has been made is therefore verified L times in the confirmation phase following the search phase in that respectively newly arriving ATM cells of the two data streams D~, D, are compared to one another in pairs. A longer confirmation phase (greater L) again means greater security against missynchronization.
Beginning with the confirmation phase and during the following failure recognition phase, the 2 5 respectively oldest ATM cell of the leading data stream is deleted from the buffer memory given a correct pair-by-pair comparison.
A switch into the failure recognition phase ensues when the confirmation phase was also run error-free. Otherwise, the method begins anew with the search phase. In the failure recognition phase, the ATM cells of the two data streams Do, D, continue to be compared in pairs. When they no longer agree, the reason for this can be that an ATM cell is affected by an error or that individual ATM cells of a data stream are missing. When, in contrast, one data stream fails entirely, then ATM cells of this data stream are no longer received.
Upon recognition of an error in the pair-by-pair comparison of ATM cells during the failure recognition phase, comparisons are implemented with the ATM
cells that were received preceding and following the compared ATM cells in order to identify the type of malfunction. Possible error types are pre-defined for this purpose.
Figure 3a shows the conditions during undisturbed operation. The two 1 o ATM cells to be compared agree with one another here.
It is assumed in Figure 3b that an ATM cell of the trailing data stream D~, has been lost. In this case, the direct comparison of the two ATM cells leads to an inequality. Subsequently, a comparison with the older ATM cell of the leading data stream D, is then implemented. When the comparison of the current ATM cell of the trailing data stream Do to the second-oldest ATM cell of the leading data stream D, leads to an agreement, then it is assumed that an ATM cell was missing in the trailing data stream D~. The corresponding ATM cell of the leading data stream D, is then removed from the buffer memory and the failure recognition phase is continued.
It is assumed in Figure 3c that an ATM cell of the leading data stream D, 2 0 has been lost. In this case, the direct comparison of the two first ATM
cells as well as of the first to the following leads to an inequality. When the comparison of the current ATM cells of the following ATM cell of the trailing data stream Do to the oldest ATM cell of the leading data stream D, leads to no agreement, then it is assumed that an ATM cell had been missing in the leading data stream D,. The 2 5 corresponding ATM cell of the trailing data stream D~ is then overlooked and the failure recognition phase is continued.
It is assumed in Figure 3d that the two ATM cells of the leading data stream D, and of the trailing data stream D~ have been lost. When the comparison of the pair of ATM cells following the current comparison pair leads to agreement, then it is assumed that one of the ATM cells of the current pair is faulty. Both comparison pairs (current, faulty pair and following, correct pair) are then removed from the buffer memory and the failure recognition phase is continued.
When ATM cells are no longer received at all from one of the two data streams, then the synchronization is not longer established and the search phase is begun again. When the delay between the t~.vo data streams Do, D, changes, so that the trailing data stream Do overtakes the leading data stream D,, then the roles are interchanged. Such a change is recognized when two corresponding ATM cells are first simultaneously received and, subsequently, an ATM cell of the previously trailing data stream D~ is received first.
The second stage of the inventive method is subsequently run. This is thereby a matter of the switchover process that was already addressed at the outset. A
selection is thereby made as to which of the ATM cells of the data streams Do, D, are to be supplied to further devices via connecting paths W. The switchover process is run independently of the selected synchronization method.
It is provided in a first development of the invention to select the ATM
cells of the leading data stream D,. Regardless of the fact that they are stored for the synchronization, these are then immediately forwarded to the output when they arrive.
When the delay between the two data streams changes, so that the trailing data stream 2 0 D~ overtakes the leading data stream D,, then the selection is also switched to the other data stream together with the (aforementioned) change in roles in the synchronization.
When one data stream fails completely, then, following a potential changes in roles, the ATM cells are selected from the remaining data stream, which is 2 5 then considered to be leading. An interruption-free switch is thus established given failure of a data stream. After eliminating the failure, the data stream that is again available is synchronized with the existing one. When it thereby turns out that it is the leading data stream, then a switch must occur. This occurs in that the ATM
cells of the leading, non-selected data stream are forwarded via the buffer memory to the output and the buffer memory is emptied by faster readout than entry. The rate of the ATM cells, however, is thereby briefly changed. Given connections having high demands with respect to the continuity of the delay, the compensation procedure must be extended onto a long time span.
In this method, the delay that arises due to synchronization and selection is minimal, since no buffering of the ATM cells occurs and the data stream having the lower running time is always selected. However, faulty or missing ATM cells are also continued in the output data stream since their recognition is only possible later upon arrival of the data units of the trailing data stream.
It is provided in another development of the invention, which is to be considered as an alternative thereto, that the ATM cells of the trailing data stream Do be selected. Upon arrival, the ATM cells of the trailing data stream are compared to those of the leading data stream during the course of the synchronization and are forwarded to the output in the error-free case. When the difference in delay between the two data streams changes, so that the trailing data stream overtakes the leading data stream, then the selection is also switched to the other data stream together with the change in roles in the synchronization.
When missing ATM cells in a data stream are detected in the synchronization tests during the failure recognition phase, then these are supplied to 2 0 the output data stream from the other data stream in the selection. When a data stream completely fails, then one waits up to a defined maximum delay difference and readout is undertaken then from the still intact data stream backed up in the buffer.
After eliminating a failure, the data stream that is again available is synchronized with the existing one. When it thereby turns out that it is the trailing 2 5 data stream, then a switch must take place. This occurs in that the ATM
cells of the leading, non-selected data stream are forwarded from the buffer memory to the output, and the buffer memory is filled by slower readout than entry. However, the rate of the ATM cells is thereby briefly changed. Given connections having high demands with respect to the continuity of the delay, the compensation procedure must be extended onto a long time span.
The method offers the advantage that a compensation of losses in a data stream is possible. . When, moreover, faulty data units are recognized by checksums, then errors in individual ATM cells can also be corrected. However, a delay that is equal to the maximum of the two delays of the data streams must thereby be accepted.
Claims (3)
1. Method for synchronizing data streams, having a data stream comprising a plurality of data units that is split into respectively two congruent, redundantly fashioned data sub-streams (D0, D1), characterized in that the data units correspond to ATM cells;
the two data sub-streams (D0, D1) are in turn merged in that one of the two data sub-streams (D1) is defined as leading, and in that both data sub-streams (D0, D1) are written into a respective buffer memory (P0, P1) at the beginning of a search phase;
synchronism between the two data sub-streams (D0, D1) is produced in the search phase in that the data units of the two data sub-streams (D0, D1) are compared to one another over a specific length (k) that corresponds to the multiple of an ATM
cell;
a detected synchronism is checked in a confirmation phase by further comparison of the data units of the two data sub-streams (D0, D1) over the specific length (k);
the identified synchronism is checked for being maintained in a failure recognition phase.
the two data sub-streams (D0, D1) are in turn merged in that one of the two data sub-streams (D1) is defined as leading, and in that both data sub-streams (D0, D1) are written into a respective buffer memory (P0, P1) at the beginning of a search phase;
synchronism between the two data sub-streams (D0, D1) is produced in the search phase in that the data units of the two data sub-streams (D0, D1) are compared to one another over a specific length (k) that corresponds to the multiple of an ATM
cell;
a detected synchronism is checked in a confirmation phase by further comparison of the data units of the two data sub-streams (D0, D1) over the specific length (k);
the identified synchronism is checked for being maintained in a failure recognition phase.
2. Method according to claim 1, characterized in that an ATM cell recognized as faulty and/or missing during the course of an error recognition is in turn corrected in that the ATM cell recognized as faulty and/or missing is taken from the intact, redundant sub-stream.
3. Method according to claim 1, 2, characterized in that ATM cells optionally corrected based on the criterion of the error recognition are supplied to further devices.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19804394.5 | 1998-02-04 | ||
| DE19804394 | 1998-02-04 | ||
| PCT/DE1999/000287 WO1999040752A2 (en) | 1998-02-04 | 1999-02-03 | Process for synchronising data streams containing atm-cells |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2319489A1 true CA2319489A1 (en) | 1999-08-12 |
Family
ID=7856630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002319489A Abandoned CA2319489A1 (en) | 1998-02-04 | 1999-02-03 | Process for synchronising data streams containing atm-cells |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6917582B1 (en) |
| EP (1) | EP1053656B1 (en) |
| CA (1) | CA2319489A1 (en) |
| DE (1) | DE59911944D1 (en) |
| ES (1) | ES2238098T3 (en) |
| WO (1) | WO1999040752A2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4155088B2 (en) * | 2003-04-18 | 2008-09-24 | 日本電気株式会社 | Information processing device |
| US20080233930A1 (en) * | 2007-03-23 | 2008-09-25 | Charles Stewart Wurster | Optimized messaging service-based media delivery |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE59007070D1 (en) * | 1990-04-27 | 1994-10-13 | Siemens Ag | Method and circuit arrangement for reducing the loss of message packets which are transmitted via a packet switching device. |
| JPH04286242A (en) * | 1991-03-15 | 1992-10-12 | Fujitsu Ltd | Device and method for hit-free switching |
| US5285441A (en) * | 1992-03-17 | 1994-02-08 | At&T Bell Laboratories | Errorless line protection switching in asynchronous transer mode (ATM) communications systems |
| US5677931A (en) * | 1995-02-27 | 1997-10-14 | Nec Corporation | Transmission path switching apparatus |
| JP2812261B2 (en) * | 1995-09-13 | 1998-10-22 | 日本電気株式会社 | ATM cell flow control device |
-
1999
- 1999-02-03 DE DE59911944T patent/DE59911944D1/en not_active Expired - Lifetime
- 1999-02-03 US US09/601,298 patent/US6917582B1/en not_active Expired - Fee Related
- 1999-02-03 CA CA002319489A patent/CA2319489A1/en not_active Abandoned
- 1999-02-03 EP EP99914399A patent/EP1053656B1/en not_active Expired - Lifetime
- 1999-02-03 WO PCT/DE1999/000287 patent/WO1999040752A2/en active IP Right Grant
- 1999-02-03 ES ES99914399T patent/ES2238098T3/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| WO1999040752A2 (en) | 1999-08-12 |
| US6917582B1 (en) | 2005-07-12 |
| WO1999040752A3 (en) | 1999-09-23 |
| DE59911944D1 (en) | 2005-05-25 |
| EP1053656A2 (en) | 2000-11-22 |
| ES2238098T3 (en) | 2005-08-16 |
| EP1053656B1 (en) | 2005-04-20 |
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| Date | Code | Title | Description |
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| FZDE | Discontinued |