CA2303964C

CA2303964C - Arc fault detection system for aircraft wiring

Info

Publication number: CA2303964C
Application number: CA002303964A
Authority: CA
Inventors: Gary W. Scott; Kon B. Wong
Original assignee: Square D Co
Current assignee: Schneider Electric USA Inc
Priority date: 1999-04-09
Filing date: 2000-04-06
Publication date: 2004-06-22
Anticipated expiration: 2020-04-06
Also published as: DE10017238A1; GB0008196D0; FR2792075A1; US6625550B1; CA2303964A1; GB2348751A; FR2792075B1; MXPA00003466A; GB2348751B

Abstract

An arc fault detector system detects arcing faults in an electrical distribution system by monitoring one or more conductors and producing an input signal representing one or more electrical signal conditions in the circuit to be monitored.
This input signal is processed to develop signals representing the electrical current flow through the monitored circuit anal broadband noise signal components. The system analyzes these signals to determine whether an arcing fault is present, and if so, outputs a trip signal which may be used directly or indirectly to trip a circuit breaker or other circuit interruption device.

Description

ARC'. FAULT DETECTION SYSTEM FOR AIRCRAFT WIRING
FIl~',LD OF THE INVENTION
The present invention relates to the protection of electrical circuits and, more particularly, to the detc;ction of electrical faults of the type known as arcing faults in an electrical circuit, and more particularly still to arcing fault detection in aircraft wiring.
:BACKGROUND OF THE INVENTION
Aircraft power systems have historically differed from ground based power systems in several ways. The electrical systems in residential, commercial and industrial applications usually include a panelboard for receiving electrical power from i o a utility source. The power is then routed through protection devices to designated branch circuits supplying one or more loads. These overcurrent devices are typically circuit interrupters such as circuit breakers and fuses which are designed to interrupt the electrical current if the limits of the conductors supplying the loads are surpassed.
Circuit breakers are a preferred type of circuit interrupter because a resetting is mechanism allows their reuse. 'Typically, circuit breakers interrupt an electric circuit due to a disconnect or grip condition such as a current overload or ground fault. The current overload condition results when a current exceeds the continuous rating of the breaker for a time interval determined by the trip current. A ground fault trip condition is created by an imbalance of currents flowing between a line conductor and a neutral zo conductor which could be caused by a leakage current or an arcing fault to ground.
Arcing faults are commonly defined as current through ionized gas between two ends of a broken conductor or at a faulty contact or connector, between two conductors supplying a load, or between a conductor and ground. However, arcing faults may not cause a conventional circuit breaker to trip. Arcing fault current levels may be reduced zs by branch or load impedance to a level below the trip curve settings of the circuit breaker. In addition, an arcing fault which does not contact a grounded conductor or person will not trip a ground fault protector.
There are many conditions that may cause an arcing fault. For example, corroded, worn or aged, wiring, connectors, contacts or insulation, loose connections, 3o wiring damaged by nails or staples through the insulation, and electrical stress caused CH ICAGO J I 549v I 47181-00001 by repeated overloading, lightning strikes, etc. These faults may damage the conductor insulation and cause th.e conductor to reach an unacceptable temperature.
The need for arc detection in aircraft has become increasingly clear. For example, wire arcing may be a factor in some aircraft fires. Past responses to aircraft s fires have been to incrc;ase the flame retardant properties of wiring and other interior components of aircraft. Standard overcurrent devices used in circuit breakers respond to the heating effect of current in a resistive wire to "thermal trip" the breaker, but these do not respond to the sputtering; arc currents which cause intense arc heating and fire.
We propose a h~etter approach - to stop the arc when it happens rather than wait uo for a fire to start or for a circuit breaker to thermal trip.
Until recently, such arc detection capability has not been available in circuit breakers or relays. Arc: detection has been available for 60Hz residential, commercial or industrial systems, but has not heretofore been resolved for 400Hz aircraft wiring systems. In addition, most aircraft circuits do not have the neutral return conductor i s found in 60Hz systems. This prevents the use of differential detection of ground faults on most aircraft branch. circuits. A standard aircraft circuit breaker contains bimetals and/or magnetic solenoids which provide an inverse time response to current.
Arcing fault detection is not provided by these devices. Aircraft arc detection is not possible using arc detectors desiigned for 60Hz circuits for several reasons. For example, 60Hz <.o arc detectors partly respond to ground fault which is not possible on standard aircraft branch circuits. Also, ~:he methods used at 60Hz cannot be automatically extended to cover a power frequency range as high as 400Hz.
Circuit breakers have historically been the preferred protection for aerospace wiring. Present designs are based on technologies that are up to 40 years old.
..s Advancements in electrical circuit protection introduced by the residential and commercial industries have been slow finding their way into aerospace applications.
Ground Fault Circuit Interrupters (GFCI) for personnel protection have been available in the home since the early 1970's. Under ideal conditions, GFCI can detect phase to ground arcs as low as six milliamps, but cannot detect series arcs or improve line to ..o neutral fault trip times.
CHICAGO 31549v1 47181-00001 Arc Fault detecaion technologies are a new and exciting innovation in circuit protection in the U.S. We have found that Arc Fault Circuit Interrupters (AFCI) can be designed to detect a series or parallel arc, as well as line to neutral arcs by "listening"
for the unique signatures which arcs generate. We have found that AFCI can detect arc s currents well below the trip curves of today's Mil-Spec aircraft circuit breakers. This enhanced detection capability rnay provide improved protection from arcing conditions onboard aircraft.
An arc fault circuit inte~~rupter is a device intended to provide protection from the effects of arc fault's by recognizing characteristics unique to arcing and by ~o functioning to de-ener;;ize the circuit when an arc fault is detected.
Aircraft circuit breakers have historically been the best available protection for aerospace wiring. Toa~ay's design standards are based on technologies that are up to 40 years old. In aircraft/military t~rpe breakers, the protection is provided in two ways.
Short circuit currents operate a magnetic trip latch, while overload currents operate cs either a bimetal trip latch or hydraulic damped magnetic plunger. The "instantaneous trip" is the high current magnetic trip action found on some but not all aircraft breakers.
The time to trip during an overload is determined by the time it takes to heat a bimetal to the temperature that delatches the breaker. The more current that heats the bimetal, the shorter the time it takes to trip the breaker. A hydraulic-magnetic style of breaker ~o contains a magnetic slug sealed in fluid which moves to a trip position in response to the square of the current. Then; circuit interruption devices are selected by aircraft design engineers to protect the aircraft wiring from overheating or melting.
During arcing faults these currents are often small, short in duration and well below the over current time protection. curve designed into these breakers. Recent events have brought zs these limitations in de:~ign and vfunction to the forefront. "Electrical arcing failure" as the ignition source, has been suspected in several recent airline disasters.
We have discovered a way in which Arc Fault Circuit Interrupter (AFCI) technology can be app lied to Alternating Current (AC) and may be applicable to Direct Current (DC) electrical power systems on aerospace vehicles. AFCI technology 3o incorporates electronic: circuits that can detect the arc signature, and differentiate it from normal load arcing (motor brushes, switch and relay contacts, etc.).
CHICAGO 31549v1 47181-01)001 Arcing in a faulted AC circuit usually occurs sporadically in each half cycle of the voltage waveform. The complex arcing event causes sputtering arc's that vary the current from normal load patterns. The precurser to the arc may be a high resistance connection leading to a "glowing contact" and then a series arc, or a carbon track s leading to line-to-line or parallel arcing. In a home circuit breaker equipped with Ground Fault Circuit Interrupter (GFCI), a carbon or moisture track can be detected early if the short is to ground. In many aircraft circuits, the neutral conductor is not available to complete the necessary ground fault detection circuit and GFCI
protection is not possible. With the introduction of AFCI breakers, protection of arcing shorts io from line-to-line, not involving ground, can also be detected and interrupted.
In our arc fault interruprer, the additional electron» devices monitor both the line voltage and current "signatures." In a normal operating circuit, common current fluctuations produce signatures which should not be mistaken for an arc.
Starting currents, switching signatures a.nd load changes (normal or "good arc" events) can be ~s digitally programmed yin the AfCI as normal signatures waveforms.
Deviations or changes from these "normal" signatures are monitored by electronic circuits and algorithms to determine if arcing is occurring. When these arc fault signatures are recognized, the circuit is intem~pted and power is removed. The speed of this detection as well as the arc magnitude can be programmable parameters at the time of ~o manufacture. The particular signatures identified as arcs are part of the proprietary arc fault technology of Square D Company.
Commercial, UL approved AFCI circuit breakers are available commercially.
These are now in the I'fEC and will be required in home bedroom circuits 2002.
Since the electrical loads in residential circuits can vary widely, they will be designed to allow :as for almost an infinite combination of electrical loads. Their AFCI
programming is combined with GFCI a.s well as magnetic and thermal overload components. They are designed to form fit and function in place of standard residential circuit breakers.
We have found that in principle, design and programming of AFCI devices for aerospace applications can be s impler than those of residential devices. The ao homeowner expects to be able to plug any load into an outlet without nuisance tripping from an AFCI. Contrast this with commercial aerospace applications where the loads CHICAGO 31549v1 47181-00001 on a given circuit are nixed by design. The load on each breaker is carefully planned.
Deviations from the original O:EM specifications require special analysis and FAA
approval. Fixed loads coupled with standardized wiring practices, connectors and certifications reduce the circuit variations and make aircraft more similar to each other s than one would expect. This, coupled with stable regulated power sources may allow for much faster reaction times or trip curves for AFCI devices designed for aerospace applications. In additi~~n, 400 Hz AC; power used in modern aircraft allows for more waveform comparisons in a given period of time: standard 60 Hz NEMA devices are designed to detect and arc fault in 7 cycles of power, (116.7 ms), at 400 Hz this takes ~o only 17.5 ms. 'The increase of frequency coupled with more stable power, fixed loads, etc. indicate the devices should be well suited to prevent the electrical ignition source of aircraft fires. In the future, these devices may be board mounted in avionics power supplies and/or placed at individual electrical loads. They can be designed to communicate with one another or with data recorders to monitor the condition of ~s electrical wiring and components. Maintenance data recorders can be reviewed after flight and pending failures identified and maintenance interventions can take place prior to system failure.
Laboratory tests have shown that AFCI breakers can detect faults not detectable by approved military aircraft circuit breakers and are significantly faster at detecting ?o arcing faults in aircraft wiring.
Experiments were performed at International Aero Inc. with Schneider Electric, Square D Company to determine the differences between aircraft breakers and AFCI
devices. These tests were based on the FAA Wet Arc Testing protocols developed to determine susceptibility of aircraft wire to arcing.
zs A five ampere :rated (5A,) Mil-Spec aircraft circuit breaker was placed in series with a fifteen ampere Square D Company Arc-D-Tect, AFCI, modified to operatA
at 400 Hz. Power was applied to an aircraft water boiler drawing 1.95 amps through the subject breaker and AFCI device. Arcs in the range of 75-100 amps were induced into the input to the boiler by dragging a 20 ga wire between input to the boiler to ground.
3o In every test, the prototype A.FCI interrupted the power before the Military-Standard aircraft breaker. These experiments indicate these devices can be adapted for use in CHICAGO 31549v I 471 B I-OI)D01 aircraft AC circuits. Additional tests are ongoing to determine the detection differences with modified AFCI devices and standard aircraft circuit breakers, as well as the susceptibility of thermal acoustic insulation material to ignition from electrical arcs, and the ability of AFCI to mitigate t:he ignition.
s There are two types of arcing faults in aircraft electrical circuits and wiring:
Parallel and Series.
Parallel arcing occurs when there is an arc between two wires or wire-to-frame and the current is limited by t:he impedance of the voltage source, the wire, and the arc.
When the fault is solidly connected and the arc voltage low, the normal aircraft breaker i o trips very quickly with little heating of the wire or damage at the arc point.
Occasionally, however, the arc blows apart the faulted components creating a larger arc voltage and reducing the fault current below the trip curve and causing "ticking faults."
The consequences of parallel arc damage, are usually much greater than series arcs.
The average current may not be sufficient to trip a conventional breaker by heating the ~s bimetal strip or the peak current may not be large enough to trigger the magnetic trip latch. This makes the lvlil-Std breaker reasonably effective in protecting against parallel arcing when the peak current is a few hundred amps. Unfortunately, the fault current can be limited by a circuit with too much impedance to immediately trip the thermal-magnetic breaker. Parallel arcing is generally more hazardous than series 2o arcing. The energy released in the arc is much higher with temperatures often in excess of 10,000 Deg. F. This causes p yrolyzation or charring of the insulation, creating conductive carbon paths and ejecting hot metal that is likely to encounter flammable materials.
Series arcing begins with corrosion in pin-socket connections or loose zs connections in series with the electrical loads. The voltage drop across a poor connection begins at a few hundred millivolts and slowly heats and oxidizes or pyrolizes the surrounding materials. The voltage drop increases to a few volts at which time it becomes a "glowing connection" and begins to release smoke from the surrounding polymer insulation. Series arc current is usually limited to a moderate so value by the impedance; of the electrical load that is connected to the circuit. The amount of power from series arc is typically far is less than in a parallel fault. Since the CHICAGO 31549v1 47181-00001 peak current is typically never greater than the design load current, series arcing is much more difficult to detect than parallel arcing. The signature of the series arc is an unusual variation of the normal load current. Series arcing is usually such that the arc current remains well ):below t:he trip curve of the Mil-Spec aircraft breaker.
Loose s terminal lugs, misarra:nged or cross-threaded electrical plugs, broken conductor strands inside a wire are typical sources. These arcs cause load voltage drops and heating of the wire, plug pin, or terminal lug. This heating can lead to component failure and ignition source. Direct Current (DC) arcs are another serious event that can potentially be prevented with AFCI l:echnolol;y. DC loads are relatively stable and any changes ~o designed into a circuit tend to be well documented with known load profiles. Changes in the DC circuit signature should be detectable even faster than those in AC
circuits.
Without the sinusoidal changes in voltage and polarity as seen in AC power, changes in a DC circuit should be detected even more reliably than AC circuits.
Care needs to be taken yin the adaptation of AFCI into aerospace. Critical and is essential electrical circuits need protection which will not nuisance trip.
Most aircraft electrical loads are on branched circuits which provide a mixture of current waveforms to the breaker. A single breaker in the cockpit may feed several unrelated systems.
Nuisance tripping is not acceptable as several systems may be powered by one breaker.
Careful analysis should be used in design and implementation of AFCI
technology in zo aerospace. Even with these reservations, AFGI has the potential to be one of the single largest improvements to aircraft safety in years.
Summarizing briefly, heat, arcs or electrical ignition are often caused by loose connections, broken or shorted wires in the power distribution system. In aircraft wiring, vibration, moisture tf;mperature extremes, improper maintenance and repair all zs contribute to wiring failure. This leads to arcing and may ignite combustible components. Furthermore, carbon tracking caused by heat generated by the arc can deteriorate the wire insulation, exposing the conductors and resulting in intermittent short circuits between individual wires. These inter-wire shorts can cause damage to delicate avionics and cause system malfunctions in-flight. Elimination or reduction of 3o these hazards to flight with arc fault technology should become an industry-wide priority.
CHICAGO 31549v1 47181-00001 The invention includes an apparatus and method by which arcing is detected in aircraft wiring.
Detection of the above-described sputtering currents caused by arcing is one object of the present invention. A detection signal generated in accordance with the invention can be used to trip a circuit breaker, to indicate arcing to the avionics package, to alert the pilot, or to issue a command to release a control relay.
OBJE1~TS AND SUMMARY OF THE INVENTION
It is an abject of the present invention to provide an arc fault detection system ~ o and method which reliably detects arc fault conditions which may be ignored by conventional circuit interrupter,.
Another object of the invention is to provide an arc fault detection system which utilizes a minimum number of highly reliable electronic signal processing components, such as a microcontroller, to perform most of the signal processing and analyzing :s functions, so as to be rf;latively simple and yet highly reliable in operation.
Other and further objects and advantages of the invention will be apparent to those skilled in the art :from the present specification taken with the accompanying drawings and appended claims.
In accordance with one aspect of the invention, there is provided a method of 2o determining whether arcing is present in an aircraft electrical circuit comprising the steps of sensing a current in said circuit and developing a corresponding input signal, determining the presen~:.e of broadband noise in said input signal, and producing a corresponding output signal, and processing said input signal and said output signal in a predetermined fashion to determine whether an arcing fault is present in said circuit.
as In accordance vrith another aspect of the invention, there is provided a system for determining whether arcing is present in an aircraft electrical circuit comprising a sensor for sensing a current in said circuit and developing a corresponding sensor signal, a circuit for detl:rmining the presence in the sensor signal of broadband noise, and producing a corresponding output signal, and a controller for processing said sensor _~o signal and said output signal in a predetermined fashion to determine whether an arcing fault is present in said I~ircuit.
CHICAGO 31549v1 47181-00001 In accordance with another aspect of the invention, there is provided a controller for determining whethc;r arcing is present in an aircraft electrical circuit in response to input signals, said input signals corresponding to a current in said circuit and to the presence of broadband noise in a predetermined range of frequencies in said circuit, s said controller including a plurality of counters and wherein said controller increments said plurality of counters in a predetermined fashion in accordance with said input signals and periodicall:~ determines whether an arcing fault is present based at least in part on the state of said pluralit'~ of counters.
In accordance with another aspect of the invention, there is provided a method ~ o of determining whether arcing is present in an aircraft electrical circuit by processing input signals corresponding to a. current in said circuit and to the presence of broadband noise in a predetermined range of frequencies in said circuit, said method comprising the steps of incrementing a plurality of counters in a predetermined fashion in accordance with said input signals, and periodically determining whether an arcing fault s is present based at least in part on the state of said plurality of counters.
In accordance with another aspect of the invention, there is provided an electrical fault detector for aircraft wiring which comprises a first band-pass filter circuit responsive to an input signal representative of an electrical signal condition in a circuit to be monitored, which passes a frequency signal comprising signal components :>o of said input signal which fall within a first predetermined frequency band and AND
circuit means which receives and ANDS the frequency signals from the first and second band-pass filter circuit;.
In accordance with another aspect of the invention, there is provided an application specific integrated circuit which comprises a first band-pass filter circuit 2s responsive to an input signal representative of a signal condition in a circuit to be monitored which passers a frequency signal comprising signal components of said input signal which fall within a first predetermined frequency band, a second band-pass filter circuit means responsive to said input signal which passes a frequency signal comprising signal components of said input signal which fall within a second so predetermined frequency band, and AND circuit which receives and ANDS said frequency signals from said first and second band-pass filter circuits.
CHICAGO 31549v1 47181-00001 BRIEF DESCRIPTION OF THE DRAWINGS
In the drawings:
FIG. 1 is a functional block diagram of an arc fault detection system embodying the invention; and 5 FIG. 2 is a flow chart of a routine which looks for a missing half cycle in a current being monitored, in accordance with one embodiment of the invention;
FIG. 3 is a flow chart showing a subroutine for the incrementing of arcing counters, in accordance with one embodiment of the invention;
FIG. 4 is a flow chart illustrating a subroutine checking for start up conditions, in 1 o accordance with one embodiment of the invention;
FIG. 5 is a flow chart illustrating a first trip equation subroutine, in accordance with one embodiment of the invention;
FIG. 6a is a flow chart illustrating a second trip equation subroutine, in accordance with one embodiment of the invention;
FIG. 6b is a flow chart illustrating a third trip equation subroutine, in accordance with one embodiment of the invention;
FIGS. 7a and 7b illustrate a main microcontroller routine;
FIG. 8 illustrates an exemplary flow chart for a set sample interval routine;
FIGS. 9a-9c show further details of an exemplary flow chart for an analog to 2o digital (A/D) sample interrupt routine;
FIGS. 10a and lOb illustrate an exemplary flow chart for a null ASIC offset routine;
FIG. 11 is an exemplary flow chart for a fine tune routine of FIG. 1 Ob; and FIGS. 12 and 13 respectively show exemplary flow charts for self test and start data acquisition routines of FIG. 7a.
DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
Referring now to the drawings and initially to FIG. 1, there is shown in block form a novel arcing fault detector system in accordance with the invention, and 3o designated generally by the reference numeral 10. An arcing fault is indicated diagrammatically at reference numeral 25. In the illustrative example, the arcing fault detection system.10 is associated with an aircraft electrical system such as a 115 volt, 400Hz circuit 15 which is to be monitored for arcing faults; however, the invention is not IOa limited to use with a 400Hz circuit. At least one sensor 16 is provided in association with the circuit I S for producing a signal representative of a signal condition, such as power, voltage or current in the circuit 15. In the illustrated embodiment, this sensor 16 comprises a current rate of change sensor (di/dt). A monitored conductor 15 of the circuit 15 passes through the rate of change (di/dt) current sensor 16 which produces a signal representative of the rate of change of current flow in the conductor I
5. The airframe 14 provides a return path for the aircraft electrical system.
The di/dt sensor 16 may comprise a toroidal coil having an annular core which surrounds the relevant conductor, with a toroidal sensing coil wound helically on the 1o core. The core may be made of magnetic material such as ferrite, iron or molded permeable powder, such that the sensor is capable of responding to rapid changes in flux.
An air gap may be cut into the core in certain instances to reduce the permeability, and the core material is such that it does not saturate during the relatively high current produced by some forms of arcing, so that arc detection is still possible.
The di/dt sensor 16 provides an input to an arcing fault detector circuit 24 which may include a broadba.nd noise detector circuit, and to a current measuring circuit 26.
s In one embodiment, the components of the arcing fault circuit detector 24 and the current measuring circuit 26 are provided on an application specific integrated circuit (ASIC) 30. Suitable output signals from the ASIC 30 are fed to a microcontroller or microprocessor 40 (e.~;., PIC 16C73A) which, based on analysis and further processing of the signals provided by the ASIC 30 makes a decision as to whether to send a trip or io "arc detected" signal to an output 42. This trip signal may be used for activating a trip circuit (not shown) which may operate to remove 115V 400Hz power from the circuits) in which arcing has been detected.
The broadband noise detector 24 comprises one or more band-pass filter circuits 50 which receive the r;~te of change of current signal from the di/dt sensor 16. The is band-passes of these circuits SCI are selected to detect the presence of broadband noise in specific frequency bands, which may occur in the monitored circuits in the event of an arcing fault. Each of the band-pass filter circuits 50 feeds a filtered signal, comprising those components of an input signal from the di/dt sensor which fall within their respective band-pass frequency bands, to a signal detector circuit 52.
2o During operatil~n, the current in the monitored aircraft wire 15 generates a field which induces a volta~;e in the di/dt sensor 16. The voltage output of the sensor 16 is primarily proportional to the instantaneous rate of change of current. The calibration of the sensor 16 may be chosen to provide a signal in a range and frequency spectrum in which arcs can be most easily distinguished from loads. This range and spectrum may Zs vary with the application but for aircraft, one useful range has been found to be from 100 to 150k amps per second and one useful spectrum has been found to be from 100Hz to 100kHz. The output of the sensor 16 may also be a time-integration or integrator circuit 18. The integrator may be a passive resistor-capacitor circuit followed by an amplified integrator, the output of which is proportional to the AC
current. The 3o integrator 18 provides a signal to be sampled by an analog-to-digital A/D
converter 19.
In one embodiment, the output of the A/D converter 19 is a series of 8 bit (minimum) CHICAGO 31549v1 47181-00001 values representing the current at a rate of 16 samples per half cycle. The A/D
converter may be a part of the microprocessor or microcontroller 40. As the frequency drifts from nominal, th.e time between voltage zero crossings, detected at a zero crossing detection circuit 21, is measured using internal timers and used to vary the s sample rate to achieve a constant number of samples per cycle.
The circuit detc;rmines if there is simultaneously a trigger level signal in two or more frequency bands. In order to do this, a portion of the signal from the di/dt sensor 16 is routed to band-pass filters S0. 'the minimum number of band-pass filters is two.
The frequency bands of the filtf;rs are chosen across the spectrum from l OkHz to ~o 100kHz. In one example, for a two band implementation, the center frequencies are 30kHz and 60kHz. In this example, the output signals from the band-pass filters 50 are detected (rectified) and filtered with a low pass filter with a corner frequency of SkHz.
The signal output of each frequency band is routed to a comparator (signal detector) 52, where it is compared vrith a reference voltage level, and, if sufficient, causes an output ~s pulse. The "trigger level" of the signal from each band required to produce an output pulse from the comparator is determined by analyzing the nonarcing load-generated signature of the applic,~tion. Additional comparators (AND gates) are used to send a pulse whenever multiple filter bands simultaneously receive a triggering signal in their band. The resulting pulses indicating signal acquisition in multiple bands are counted zo by the microprocessor 40 and used in some arc detection algorithms. The current samples are converted into current~eak, current area, max(di/dt). These values are stored for each half cy~~le of voyage.
The use of the terms "b:and-pass filter," "comparator," "AND gate," and "Integrator" does not limit the invention to hardware equivalents of these devices.
2s Software equivalents of these functions can be implemented, provided the di/dt signal (from sensor 16) is first amplified and converted to digital values.
In the illustrative embodiment, a voltage sensor (not shown) is implemented as a resistor divider which provides an attenuated voltage level compatible with the solid state logic devices. The zero crossing circuit 21 is implemented with a low pass filter 30 (corner frequency lk>=fz) and comparators to provide a digital "1" when the voltage is above zero and a digital "0" when the voltage is below zero volts. The microcontroller CHICAGO 31549v 1 47181-UOOOI

40 accepts the logic levels and incorporates timers to determine if the system frequency has increased or decreased from the previous cycle. The A/D sample rate is then adjusted faster or slower to maintain 33 +/-1 samples per cycle.
The flow charts of FIGS. 2-6 illustrate a method of arc detection which may be s carried out by the circuits and processor of FIG. 1.
Input signals available include:
16 samples (1 byte each.) of current per half cycle of voltage. (1 bit=0.2 amps instantaneous, in the illustrativf: example.) A logic level pulse indicating the polarity of the voltage with transitions io occurring at voltage-zc;ro.
A pulse train indicating simultaneous occurrences of di/dt signal in two frequency bands (one avulse == simultaneous current signals in both 30khz and 60khz band for at least 20 usec, in the illustrative example.) In FIGS. 2-6b:
,5 Peakl == Peak of previous half cycle Peak2 == Peak of two previous half cycle ago Peak3 == Peak of three previous half cycle ago Peak4 == Peak of four previous half cycle ago Peaks == Peak of five previous half cycle ago zo di/dtl == Max di,'dt of previous half cycle di/dt2 == Max di,'dt of two previous half cycles ago di/dt3 == Max di'dt of three previous half cycles ago di/dt4 == Max di,~dt of four previous half cycles ago zs di/dt5 == Max di,~dt of five previous half cycles ago di/dt Threshold_ 1=.25 (peak) di/dt Threshold-2=.17 (peak) di/dt Threshold-3=.20 (peak) 3o Noise Threshold=16 HF_Th;reshold=~4 Aspect Ratio-1=Area_ 1 /Peak._ 1 S low_l~ise=f ea~k 1-Max_di/dtl HF Count_1 = High frequency count from last '/z cycle This invention takes current waveforms and broadband noise to determine if arcing is present in ell~ctrical conductors. A high current arc is identified as a current CHICAGO 31549v1 47181-00001 waveform that has fast changes in current (di/dt) with or without broadband noise (lOkHz to 100kHz, in one embodiment) depending on the level of di/dt. Table 1 summarizes high currc;nt arcing; characteristic of current waveforms and how firmware counters are incremented in one embodiment. A detailed description of how the s counters are used to dlaermine if an arc is present or if it is normal load noise is described later.
Conditions exist where loads have broadband noise, large di/dt and high currents under normal operating conditions. To distinguish between normally noisy load currents and arcing currents, the method and apparatus of the invention responds to ~o predefined levels of di/dt, broadband noise, high currents, decaying currents and current aspect ratios.
Broadband noise is the product of logical ANDing two frequency bands in hardware (not limited to two). If both are present simultaneously then a pulse is received at the microcontroller input. The pulses are counted every half cycle, stored is and is reset to detect the frequency components in the next half cycle.
Definition of 'Germs and Variables In one embodiment of the invention:
di/dt Threshold_1 - 'The threshold value is: 0.25x(peak current). If within a half cycle, the di/dt exceeds this threshold, the probability of the presence of an arc is Zo high.
di/dt Threshold 2 - 'The threshold value is: 0.17x(peak current). If within a half cycle, the di/dt exceeds this threshold and broadband noise is present with low normal operating noise (HF rJoise-Accumulator < Noise Threshold), the probability of the presence of an arc is high.
is di/dt Threshold 3 - 'The threshold value is: 0.24x(peak current). If within a half cycle, the di/dt exceed~~s this threshold and broadband noise is present with low normal operating noise (HF PJoise Accumulator < Noise Threshold), the probability of the presence of an arc is nigh.
Noise Threshl~ld - T'he threshold value is: 16. This is the normal operating 3o broadband noise (HF_ Noise Accumulator) threshold. The method and apparatus of the CHICAGO 31549v1 47181-00001 invention use this to determine if the broadband noise is due to arcing or from normal operation of loads.
HF Count-1 - Integer counter that contains the broadband noise count of the previous half cycle. The higher the count the greater the amplitude of broadband noise.
s HF Threshold ~- The threshold value is: 4. This threshold is the broadband noise count threshold d.ue to arcing, if the broadband noise count (HF Count 1 ) is greater than this threshold and the normal operating broadband noise counter (HF Noise Accumulator) is less than the Noise Threshold, then the probability of an arc is high.
~o , Aspect Ratio-1 - Definc;d as Area-1 / Peak-1.
Slow Rise - Defined as Peakl - di/dtl PeakO - Peak current of present half cycle Peakl - Peak current of previous half cycle Peak2 - Peak current of t:wo previous half cycle ago is Peak3 - Peak current of three previous half cycle ago Peak4 - Peak current of i:our previous half cycle ago Peaks - Peak current of f ve previous half cycle ago di/dt0 - Max di/dt** of present half cycle di/dtl - Max di/dt** of previous half cycle zo di/dt2 - Max di/dt** of two previous half cycles ago di/dt3 - Max di/dt** of tlhree previous half cycles ago di/dt4 - Max di/dt** of four previous half cycles ago di/dt5 - Max di/dt** of five previous half cycles ago area0 - area* of present half cycle zs areal - area* of last half cycle di/dt Profile~C~ount - Holds the integer number of times di/dt has exceeded set thresholds as specified in TABLE 1.
High Current half C'.ycle - Holds the integer number of half cycles greater than 16A peak.
so Arcing Half Cycle C',ount - Holds the integer number of times an arcing half cycle was detected. Arcing half cycle described in TABLE 1.
CHICAGO 31549v1 47181-00001 HF Count_1 - Holds the integer number of counts of broadband noise from the previous half cycle.
HF Profile Count - Holds the integer number of accumulated counts of broadband noise from previous half cycles.
HF Noise Accumulator - Holds the integer number of high frequency counts during startup or steady state (currents less than 16A).
Missing Half Cycle - Boolean variable set to TRUE when non-arcing follows arcing half cycle.
to TABLE 1 (each row characterizes an arcing half cycle) peak di/dt (dt[**] high arcing di/dt HF profile = 78us) current frequency half profile count cycle with aspect broad bandcount count ratio[*] noise[***]
> 2 > 16A >0.250xpeak not requiredincrementincrementunchanged current >16A >0.125xpeak required incrementunchangedincrement current >16A >0.200xpeak required incrementincrementincrement current wherein:
* area is the sum of the values of the 16 samples per half cycle.
** Max di/dt is the maximum difference between samples of the current for the rising edge. dt is the time between every sample of the current waveform. This sample time varies dynamically with the line frequency to get better coverage of the current waveform up to 400 ~ SO Hz.
* * * High frequency broadband noise is the presence of broadband noise during arcing.
The following Algorithms have been scaled for SA Arc Detection, in accordance with one embodiment of the invention. The reference numerals in parentheses correspond to the reference numerals found in the flow charts of FIGS. 2-7.
In this embodiment, Boolean variables are set as follows:
Missing Half Cycle (141) is set to TRUE if all the following conditions are met (FIG.2):
( 140) Peakl < Peak2 Peakl > 9A
Arcing Half Cycle Count > 0 Peak2 - Peakl > 16A.
High Current Arc (105, 109) is set to TRUE if all the following conditions are met:
(101) Peakl > 16A
s Aspect-Ratio-1 >= 2 (103) di/dtl > di/dt 'Chreshold__1 Or (101) Peakl < Peak2 Peakl > 9A
( 104) di/dtl > di/dt 'Thresh.old 2 (108) is HF Count 1 > HF-Threshold HF_Noise Ac~~umulator < Noise Threshold Algorithm counters are incremented and cleared under the following conditions (FIG.

3):
(101) Zo -If (Peakl > 16A and Slow Rise > 2) then check the following:
Increment di/dt Profile Count ( 105,111 ) if all the following are met:
(103) di/dt 1 > di/dt Threshold 1 Or Zs ( 104) di/dtl > di/dt Threshold_2 (110) di/dtl >~ di,dt Threshold 3 (108) 30 -HF-Count-1 > HF Threshold HF Noise Accumulator < Noise Threshold Incrennent HF-Profile Count ( 107, 109) if all the following are met:
(103) CHICAGO 31549v1 47181-00001 di/dt I ~> di/dt Threshold 1 ( 106;1 HF Count 1 > HF Threshold HF Noise Accumulator < Noise Threshold s Or ( 104) di/dtl > di/dt Threshold 2 (108) HF ('ount 1 > HF Threshold Io HF Noiae Accumulator < Noise Threshold _ .. Increment Arcing Half Cycle_Count (105, 109) if all the following are met:
(103) di/dtl > di/dt Threshold 1 is Or ( 104) di/dtl > di/dt Threshold 2 ( 108) HF C'.ount 1 > HF Threshold zo HF Noise Accumulator < Noise Threshold Start-up Conditions (FICi. 4):
Tungsten lamp startup (102, 115) If (Peakl > 12 A and Peak2 > 12A and Peak3 > 12A and Peak4 zs > 12A and Missing Half_Cycle = FALSE) then check the following:
(116, 118) If (((Peakl < (Peak3 - 2.4A)) and (Peakl < Peak2))and ((Peak2 < Peak3) and (Peak2 < Peak4 - 2.4A))) 3o rChen reset:
- Arcing Half Cycle Count=0 -di/dt Profile Count=0 -HF Profile Count=0 -High Current Arc = FALSE
CHICAGO 3I549v1 47181-OOOOI

Inductive load ;>tartup (102, 115) If (Peakl > 12A and Peak2 > 12A and Peak3 > 12A and Peak4 >
12A and Missing Half Cycle = FALSE) then check the s following:
( 117, 120, 121 ) ((Peak3 > Peak1) and (Peak 5 > Peak3) and (di/dt1 <
Peakl / 2) and (di/dt2 < Peak2 / 2) and (di/dt3 < Peak3 /
2) and ((di/dt5 + 0.5A) >= di/dt3) and ((di/dt3 + 0.5A) >_ to di/dtl) and (Slow Rise > 16A)) 'hhen reset:
-di/dt Profile Count = 0 -HF Profile Counter = 0 -High Current Arc = FALSE
~s If (no arcing half cycle in 0.5 seconds after last arcing half cycle, then clear all counters) A line to neutral or line to ground arc fault is present under the following conditions of the above firmware counters (FTG. 5):
TRIP (Trip Signal 132) IF:
(131) Zo If (Arcing Half Cycle Count > 6) Or ( 124) If (High Current Half_Cycles = 3 within 0.5 seconds and Missing Half Cycle = TRUE and di/dt_Profile_Count > 1 and Zs Arcing -Half C~~cle C',ount > 1) Or (135) If (HigyCurremt Half Cycles = 4 within 0.5 seconds and Missin~; Half Cycle == TRUE and high Arcing Half Cycle Count >2) 3o Or ( 136) If (HighCurremt Half_Cycles = 5 within 0.5 seconds and Missing Half Cycle = TRUE and Arcing Half Cycle Count > 3) Or (FICA. 6a) as (137) CHICAGO 31549v1 47181-OG001 If (Hil;h Curre,nt_Half_Cycles = s within O.s seconds and Arcin;~ Half Cycle_ Count > 3 and di/dtl > di/dt3 and di/dt-Profile_(:ount > 2) Or s ( 138) If (Hi~;h Current Half_Cycles = s within O.s seconds and Arcing; Half C',ycle_Count > 3 and di/dtl > di/dt3 and HF Profile Count > 2 and di/dt Profile-Count > 1) Or io ( 126, l~ 2s, 127) If (s < High_-Current Half_Cycles < 9 within O.s seconds and Arcing Half C'ycle_Count > 3 and Missing Half Cycle = TRUE) Or (126,12s, l2s) (FIG. 6b) is If (s < High-Current Half_Cycles < 9 within O.s seconds and Arcing_Half Cycle Count > 3 and di/dt Profile Count > 3) Or (126, 12s, 129) If (s < High-Current Half_Cycles < 9 within O.s seconds and Zo Arcing-Half Cycle Count > 3 and HF Profile Count > 1 and di/dt_F'rofile_ Count > 2) Or ( 126, 12s, 130) If (s < High-Current Half_Cycles < 9 within O.s seconds and Zs Arcing Half Cycle Count > 3 and HF Profile Count > 2 and di/dt Profile _Count => 1) Referring now to FIGS. 7a-13, the illustrated flow charts show an example of microprocessor overhead and set-up routines for the microprocessor 40 of FIG.
1, in one embodiment. These flow charts are one example only of microprocessor set-up, 3o and are not intended to in any way limit the invention. Rather, the invention is directed to the detection of arc:ung faults in a circuit as described hereinabove, and as illustrated in connection with FIGS. 1-6, which show one embodiment of such an arc detection system for use in aircraft.
FIGS. 7a and . b illustrate a main microcontroller routine including such 3s subroutines as initializing of the initialized microcontroller 202, the setting of various CHICAGO 31549v 1 47181-00001 null values for the ASIC (for example, Null ASIC Offset 204) illustrated and described above with reference; to FIG. 1, and the setting of sample intervals.
Additional subroutines include a self test routine 208, a set sample interval routine 206, a start data acquisition routine 214, further details of which are shown in the following s FIGS. 8-13. The arc detection algorithms 212 illustrated in FIG. 7a are further illustrated and described hereinabove with reference to FIGS. 2-6.
FIG. 8 illustrates an c;xe;mplary flow chart for the set sample interval routine 206.
FIGS. 9a-c show further details of an exemplary flow chart for an analog to ~o digital (A/D) sample interrupt routine.
FIGS. 10a and lOb illustrate an exemplary flow chart for the null ASIC offset routine 202.
FIG. 11 is an exemplary flow chart for a fine tune routine 216 of FIG. l Ob.
FIGS. 12 and 13 respectively show exemplary flow charts for the self test and ~s start data acquisition routines 208 and 214 of FIG. 7a.
In connection with the set sample interval routine 206 of FIG. 8, the period is the upper 8 bits of a word and is incremented every 400 nsec. from the rising edge of one voltage zero crossing to that of the next voltage zero crossing where it is reset and restarted. The sample interval is used to set the A to D sample period every line cycle.
2o With respect to the fine tune routine of FIG. 1 l, HC refers to the high current input. Fine cal data is a 16 bit quantity while tine cal data low refers to the lower 8 bits of the 16 bit quantity.
While particular embodiments and applications of the present invention have been illustrated and described, it is to be understood that the invention is not limited to Zs the precise construction and compositions disclosed herein and that various modifications, changes, and variations may be apparent from the foregoing descriptions without departing from the spirit and scope of the invention as defined in the appended claims.
CHICAGO 31549v1 47181-00001

Claims

1. A method of determining whether arcing is present in an electrical circuit of an aircraft, the method comprising:
sensing a current in said circuit and developing a corresponding sensor signal;
analyzing said sensor signal to determine the presence of broadband noise in said sensor signal and producing a corresponding output signal; and processing said sensor signal and said output signal in a predetermined fashion to determine current peaks, and to determine, using said current peaks and the presence of broadband noise, whether an arcing fault is present in said circuit, by comparing data corresponding to said current peaks and broadband noise with preselected data indicative of an arcing fault;
wherein said sensor signal comprises a di/dt signal corresponding to a change in current over time; and wherein said processing comprises incrementing a plurality of counters in response to said sensor signal and said output signal, and periodically determining whether an arcing fault is present by monitoring said plurality of counters and comparing counts in one or more of said counters with one or more preselected counts indicative of an arcing fault.

2. The method of claim 1, and further including producing a trip signal in response to a determination that an arcing fault is present in said circuit.

3. The method of claim 1 or 2, wherein if no arcing half cycle is detected in a predetermined amount of time after the last arcing half cycle, then all counters are cleared.

4. The method of claim 1, 2 or 3, wherein said counters are implemented in software.

5. A system for determining whether arcing is present in an electrical circuit of an aircraft, the system comprising:
a sensor which detects a current in said circuit and develops a corresponding sensor signal;
a detector which analyzes said sensor signal to determine the presence of broadband noise in said sensor signal and produces a corresponding output signal; and a controller which processes said sensor signal and said output signal to determine current peaks and to determine, using said current peaks and the presence of broadband noise, whether an arcing fault is present in said circuit by comparing data corresponding to said current peaks and broadband noise with preselected data indicative of an arcing fault;
wherein the controller includes a plurality of counters and increments one or more of said plurality of counters in a predetermined fashion in accordance with said sensor signal and said output signal, and periodically determines whether an arcing fault is present based at least in part on the state of said plurality of counters.

6. The system of claim 5, wherein the controller produces a trip signal in response to a determination that an arcing fault is present in said circuit.

7. The system of claim 5 or 6, wherein said plurality of counters are implemented in software.

8. The system of claim 5, 6 or 7, wherein, if no arcing half cycle is detected in a predetermined amount of time after the last arcing half cycle, then all counters are cleared by the controller.

9. The system of any one of claims 5 to 8, which further includes a voltage zero crossing detector coupled with said aircraft circuit and with said controller, and wherein said controller also processes voltage zero crossing information to determine whether an arcing fault is present in said circuit.

10. A controller for determining whether arcing is present in an electrical circuit of an aircraft in response to input signals, said input signals corresponding to a current in said circuit and to the presence of broadband noise in a predetermined range of frequencies in said circuit, said controller including a plurality of counters, wherein said controller increments said plurality of counters in response to said input signals and periodically determines whether an arcing fault is present by monitoring said plurality of counters and comparing counts in one or more of said counters with one or more selected counts indicative of an arcing fault.

11. The controller of claim 10, wherein the controller further produces a trip signal in response to a determination that an arcing fault is present in said circuit.

12. The controller of claim 10 or 11, wherein said plurality of counters are implemented in software.

13. The controller of claim 10, 11 or 12, wherein if no arcing half cycle is detected in a predetermined amount of time after the last arcing half cycle, then all counters are cleared.

14. A method of determining whether arcing is present in an electrical circuit of an aircraft in response to input signals, said input signals corresponding to a current in said circuit and to the presence of broadband noise in a predetermined range of frequencies in said circuit, said method comprising:
incrementing a plurality of counters in response to said input signals; and periodically determining whether an arcing fault is present by monitoring said plurality of counters and comparing counts in one or more of said counters with one or more preselected counts indicative of an arcing fault.

15. The method of claim 14, which further includes producing a trip signal in response to a determination that an arcing fault is present in said circuit.

16. The method of claim 14 or 15, wherein if no arcing half cycle is detected in a predetermined amount of time after the last arcing half cycle, then all counters are cleared.

17. An electrical fault detector for aircraft wiring, the detector comprising:
a first band-pass filter circuit responsive to an input signal representative of an electrical signal condition in a circuit to be monitored, which passes a frequency signal comprising signal components of said input signal which fall within a first predetermined frequency band;
a second band-pass filter circuit responsive to said input signal which passes a frequency signal comprising signal components of said input signal which fall within a second predetermined frequency band;
an AND circuit which receives and ANDS the frequency signals from the first and second band-pass filter circuits; and a controller coupled with said AND circuit for receiving the ANDed signals and for producing a trip signal when an arcing fault is present;
wherein the controller includes a plurality of counters and increments said plurality of counters in a predetermined fashion in accordance with said input signal, and periodically determines whether an arcing fault is present based at least in part on the state of said plurality of counters.

18. An electrical fault detector according to claim 17, wherein said first and second frequency bands are selected to be representative of a frequency spectrum typical of arcing faults in an aircraft electrical system.

19. An electrical fault detector according to claim 17 or 18, which further includes a current rate of change sensor for producing said input signal.

20. An application specific integrated circuit for an electrical fault detector for aircraft wiring, said application specific integrated circuit comprising:
an integrator circuit responsive to an input signal representative of a current to be monitored for producing an output corresponding to said current;
a zero voltage crossing detector responsive to said input signal for detecting a zero voltage crossing;
a first band-pass filter circuit responsive to said input signal representative of a signal condition in a circuit to be monitored which passes a frequency signal comprising signal components of said input signal which fall within a first predetermined frequency band;
a second band-pass filter circuit responsive to said input signal which passes a frequency signal comprising signal components of said input signal which fall within a second predetermined frequency band; and an AND circuit which receives and ANDs said frequency signals from said first and second band-pass filter circuits.

21. An application specific integrated circuit according to claim 20, wherein said first and second frequency bands are selected to be representative of a frequency spectrum typical of arcing faults in an aircraft electrical system.