CA2297650A1 - Networking systems - Google Patents

Networking systems Download PDF

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Publication number
CA2297650A1
CA2297650A1 CA002297650A CA2297650A CA2297650A1 CA 2297650 A1 CA2297650 A1 CA 2297650A1 CA 002297650 A CA002297650 A CA 002297650A CA 2297650 A CA2297650 A CA 2297650A CA 2297650 A1 CA2297650 A1 CA 2297650A1
Authority
CA
Canada
Prior art keywords
separate
packet
memory
contention
networking systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002297650A
Other languages
French (fr)
Other versions
CA2297650C (en
Inventor
Tim Wright
Peter Marconi
Richard Conlin
Zbigniew Opalka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nexabit Networks Inc
Original Assignee
Nexabit Networks Inc.
Tim Wright
Peter Marconi
Richard Conlin
Zbigniew Opalka
Neonet, Llc.
Nexabit Networks, Llc
Nexabit Networks, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nexabit Networks Inc., Tim Wright, Peter Marconi, Richard Conlin, Zbigniew Opalka, Neonet, Llc., Nexabit Networks, Llc, Nexabit Networks, Inc. filed Critical Nexabit Networks Inc.
Publication of CA2297650A1 publication Critical patent/CA2297650A1/en
Application granted granted Critical
Publication of CA2297650C publication Critical patent/CA2297650C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
    • H04L49/105—ATM switching elements
    • H04L49/108—ATM switching elements using shared central buffer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management

Abstract

A novel networking architecture and technique for reducing system latency caused, at least in part, by access contention for usage of common bus and memory facilities, wherein a separate data processing and queue management forwarding engine and queue manager are provided for each I/O module to process packet/cell control information and delivers queuing along a separate path that eliminates contention with other resources and is separate from the transfer of packet/cell data into and from the memory.
CA002297650A 1997-07-25 1998-07-21 Networking systems Expired - Fee Related CA2297650C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US900,757 1978-04-27
US08/900,757 US5918074A (en) 1997-07-25 1997-07-25 System architecture for and method of dual path data processing and management of packets and/or cells and the like
PCT/IB1998/001117 WO1999005826A1 (en) 1997-07-25 1998-07-21 Networking systems

Publications (2)

Publication Number Publication Date
CA2297650A1 true CA2297650A1 (en) 1999-02-04
CA2297650C CA2297650C (en) 2007-11-27

Family

ID=25413044

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002297650A Expired - Fee Related CA2297650C (en) 1997-07-25 1998-07-21 Networking systems

Country Status (10)

Country Link
US (1) US5918074A (en)
EP (1) EP1016246B1 (en)
JP (1) JP4334760B2 (en)
CN (1) CN1151639C (en)
AU (1) AU738983B2 (en)
CA (1) CA2297650C (en)
DE (1) DE69820084T2 (en)
HK (1) HK1031058A1 (en)
IL (1) IL134221A (en)
WO (1) WO1999005826A1 (en)

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Also Published As

Publication number Publication date
HK1031058A1 (en) 2001-05-25
CN1151639C (en) 2004-05-26
AU738983B2 (en) 2001-10-04
DE69820084D1 (en) 2004-01-08
JP4334760B2 (en) 2009-09-30
DE69820084T2 (en) 2004-09-02
US5918074A (en) 1999-06-29
WO1999005826A1 (en) 1999-02-04
CA2297650C (en) 2007-11-27
JP2001511575A (en) 2001-08-14
CN1267418A (en) 2000-09-20
AU8236698A (en) 1999-02-16
EP1016246B1 (en) 2003-11-26
EP1016246A1 (en) 2000-07-05
IL134221A0 (en) 2001-04-30
IL134221A (en) 2004-06-01

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