CA2221958A1

CA2221958A1 - Method for reducing the effect of demodulator transients on forward channel signal tracking loops

Info

Publication number: CA2221958A1
Application number: CA002221958A
Authority: CA
Inventors: Marek Karol Dutkiewicz; Philip John Houghton
Original assignee: Individual
Current assignee: Sierra Wireless Inc
Priority date: 1995-05-22
Filing date: 1996-05-22
Publication date: 1996-11-28
Also published as: EP0827661B1; WO1996037986A1; JPH11505974A; DE69615018T2; ATE205346T1; AU5756696A; EP0827661A1; US5629960A; DE69615018D1

Abstract

A method for reducing the effects of transients on the DC off-set tracking stage and the symbol timing recovery stage in a full duplex or half duplex packet switched data communication system in which transients occur in the receiver portion of the subscriber when the transmitter portion of a subscriber is keyed ON and OFF is described. The method is dynamically implemented such that the DC tracking stage and the symbol timing recovery stage are set in a first "distortion ready" mode during the time that the transmitter is keyed on and off and is set back to a second "normal" mode after the transmission event is over. In the "distortion ready" mode, the symbol timing recovery stage is set in a "freeze" state such that it makes no further timing adjustments to a decision clock that it generates and the DC off-set recovery stage is set to a wide bandwidth mode such that it does not track large variations in the DC off-set and amplitude in the received signal. As a result, the Tx/on and Tx/off transients do not upset the decision clock synchronization with the forward channel data stream and the DC off-set tracking stage remains stable.

Description

CA 022219~8 1997-11-21 W o 96/37986 PCT/CA96/00337 METHOD FOR REDUCING THE EFFECT OF DEMODULATOR TRANSIENTS ON
SIGNAL TRACKING LOOPS.

BAC K G R O~D OF llHE INrVENTIO N

The present invention relates to the field of c~ln~n~...ication systems and particularly to demodulator transients occurring in a receiver.

STATE OF THE ART

A duplex packet switched data co.l....ul~cation system typically includes an information source (referred to as the base) for continuously tr~nemitting a data signal on a ~lw~d system çh~nn~l to an information clestin~tion (also referred to as the subscriber). The subscriber, in turn, int~rmitt~ntly tr~nemite packets of data signals back to the base on a reverse channel. The subscriber generally includes a receiver portion for receiving the data signal and a tr~nemitter portion for tr~nemittin~ the data packets.

Once received, the receiver portion of the subscriber typically filters, band limits, and amplifies the received signal. Next, the signal is demodulated in order to st;~dle the information signal (i.e. the mo~ tin~ signal) from a carrier signal. After demodulation, the information signal is converted to a digital signal by an analog-to-digital (A/D) converter and then processed through a DC off-set removal stage, a DC tracking stage, and a symbol timing recovery stage.
-CA 022219~8 1997-11-21 The DC tracking stage derives the mean DC off-set of the digital information signal and then ~lettormin~c the voltage dirr~,.ence between this mean DC off-set and the DC off-set of a sample of the digital information signal.
This voltage dirrelellce is then subtracted from the digital information signal by the DC off-set removal stage.

The symbol timing recovery stage derives a decision clock having the same data symbol rate or a multiple of the data symbol rate of the original information signal. It is responsive to the mean DC off-set of the digital signal.

The l~ slllil~el portion of the subscriber filters, amplifies, and modulates packets of data signals before transmitting them on the reverse charmel. In order to ensure signal h~e~ y across the c~ ".. ication medium, the modulated signal is transmitted at high powers r~nginp; from tenths of a Watt tomany tens of Watts. The energy tr~n.cmitte~l on the reverse r.h~nnel represents a large change in the electric and m~gn~tic field strength around the subscriber'stran~lliLLel/leceiver portions from the time the data packet is tr~n~mitterl on the reverse channel by keying the tr~n~mitter portion ON at the start of the packet and keying the tr~n~mitter portion OFF at the end of the packet.

What often occurs in this type of communication system is that the ON/OFF keying action of the tr~n~mittlor portion typically causes transient behavior in the lecei~ portion of the subscriber. This transient behavior is dueto radiative and conductive hlLelrelence occurring at the on-set and t~rmin~tionof the i..~ ..ilie..~ data packet tr~n~mi~.~ions, (in other words during the ON/OFF
keying periods of the Lldllslllillel portion).

In an ideal case in which no transients occur, a signal received on the fol~d channel and subsequently demodulatêd has a fixed amplitude and DC
offset level. As a result, the DC off-set tracking stage and the symbol timing recovery stage function as expected. However, in the case in which transient CA 022219~8 1997-11-21 interference occurs, signals received by the subscriber are distorted with largeDC offset v~ri~tion~ and amplitude variations at the ON/OFF tr~n~mitt~or key times. When these distorted received signals are subsequently demodulated and A/D converted, the distortion manifests itself as variations in the mean DC
offset and amplitude of the digital information signal (in the case of a non-coherent demodulator) and, in the case of a coherent demodulator, the transient distortion on the fol~,v~d channel is seen as variations in the carrier frequency and the vector magnitude of the demodulated signal.

Due to the variations in the digital information signal the DC off-set tracking stage and the symbol timing recovery stage lose synchronization with the system channel signal. Loss of syncl~lol.~Lion results in degradation of thereceived signal or complete loss of the forward channel signal.

SUMMARY OF THE INVENTION

The present invention is a method for re~luc.in~ the effects of demodulator transients on the DC off-set tracking stage and the symbol timing recovery stage in a duplex packet switched data communication system.
Demodulator transients occur in the receiver portion of the subscriber when the tr~n~mhter portion of a subscriber is keyed ON and OFF. The transients cause large variations in the mean DC off-set and the gain of the signal coupled to the DC tracking stage and timing recovery stage. As a result, these stages lose synchlom;G~LIion with respect to the forward channel signal.

The present invention is a method that avoids the adverse transient effect on the DC off-set tracking stage by setting it to a wider bandwidth tracking mode just before the key ON time and until a short time after the key OFF time.
The DC off-set tracking stage is less affected by the transients in a narrower CA 022219~8 1997-11-21 band-width mode than a broader bandwidth mode since large transient variations in voltage levels are less evident over a n~ulow~L spectrum of frequencies.

The method of the present invention also elimin~t~ the effect of transients on the timing recovery stage by setting it to a freeze mode just before the key ON time and until a short time after the key OFF time. In this mode, the timing recovery stage does not track the distorted signal and thereby does not make any timing adjn~tment~ to its cu.l.,;,~onding derived decision clock.
As a result, the decision clock m~int~in~ the same rate for the time period in which the timing recovery stage is set in the freeze mode.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 illu~LIdles a duplex packet switched data commlmie~tion system.

Figure 2 illustrates folw~d and reverse channel signals in the system as shown in Figure 1.

Figure 3 illustrates the subscriber portion of the system shown in Figure 1.

Figure 4 illustrates an ideal received forward channel signal as seen at the output of a subscriber detector.

Figure 5 illustrates a non-ideal received forward channel signal as seen at the output of a subscriber detector.

CA 022219~8 1997-11-21 DETAILED DESCRIPTION

A method for ~..i,~;...i~.i.,g or preventing loss of forward channel ~yncl~ ni~dLion of the DC tracking stage and symbol timing recovery stage in a duplex switched c~mm~lnic~ti-)n system is described. In the following description, numerous specific details are set forth, such as particular signal processing steps in order to provide a thorough underst~n~1in~ of the present invention. It will be obvious, however, to one skilled in the art that these specific details need not be employed to practice the present invention. In other in.ct~nces, well-known signal processing theory and steps have not been described in detail in order to avoid l-nneces.~rily obscuring the present inventlon.

Figure 1 illustrates a switched duplex co"lll,ul~ication system in which a base 10 continuously tr~n.emit.~ data on a fol~v;~d ch~nnel 12 and continuously receives data on a reverse channel 13. Base 10 is typically coupled to more than one subscriber. Subscriber 11 continuously receives data on forward r.h~nnel 12 and hl~ llliL~c;lllly transmits data back to base 10 on reverse channel 13. Figure 2 illu~Lldle~ signal tr~n.~mi.~ion on forward channel 12 and reverse ch~nnel 13. As can be seen, a continuous stream of data is being Lldllslllilled along forward channel 12, whereas int~.... iLI~J.I packets of data are being Llculslllilk;d along reverse channel 13.
.

Before an information signal is tr~n.cmitt~ on the forward and reverse chz-nnel.~, it is first modulated to put it into condition for tr~n.cmi.e.~ion. Base 10 modulates the information signal that is to be tr~n~mitte~l on the f~ ud ch~nneland subscriber 11, in turn, demodulates or recovers the information signal encoded in the data signal it receives on forward channel 12.

CA 022219~8 1997-11-21 Figure 3 shows a portion of a typical subscriber system. Detector 20 recovers/detects the encoded information signal tr~n~mitte-1 on fc"~v~d channel 12 and outputs (on line 30) a demodulated analog signal corresponding to the original information signal. The lltotçctefl signal is then conditioned by processing it through several stages.

First, the analog demodulated signal is converted into digital form by analog-to-digital (A/D) collvtlLel 22. Next, the converted digital signal is processed through DC off-set removal stage 22 which subtracts an off-set voltage 32 from the converted digital signal.

The digital output signal 33 is coupled to symbol decision stage 24 which samples signal 33 at a rate ~1etermined by decision clock 34 and outputs digital signal 35 to controller 26. Digital signal 35 l~r~;st;,lls the original information signal. Controller 26 may then p~i,r(j"ll other operations on signal35 if necç~ry DC tracking stage 23 performs two functions. First, it tracks the mean DC off-set of digital signal 33 based on voltage samples provided by stage 25.
The voltage samples used for d~L~....i..i..g the mean DC off-set are dependent on the bandwidth of tracking stage 23. Second, DC tracking stage 23 provides off-set voltage 32. This voltage is determined by subtracting the most recently received sample voltage 36 from the current tracked mean DC off-set voltage.
The bandwidth of tracking stage 23 is set to either a "track" or an "acquire"
mode by controller 26. The track mode is a narrow bandwidth mode in which the DC off-set loop bandwidth is relatively small, reducing the effects on noiseon the tracking sub-system and allowing the sub-system to adapt relatively slowly. The acquire mode is a wider bandwidth mode in which the DC off-set loop bandwidth is relatively large, allowing the tracking system to adapt to thereceived signal and establish a syn~ ni~d situation relatively quickly.

CA 022219~8 1997-11-21 Symbol timing recovery stage 25 also performs two functions. First, it derives decision clock 34 from digital signal 33. It is well known in the art ofc~n.,llullications design that in order to accurately ascertain the original information signal from a tr~nsmitted modulated signal is neces~ry to obtain a decision clock signal that is harmonically related to the transmitted symbol rate.
In the subscriber system shown in Figure 3, derived decision clock signal 34 controls the time at which symbol decision stage 24 samples digital input signal33 and consequently ~ieterrnines what data is passed to controller 26. The decision clock or a multiple of the decision clock (e.g. 2 times the decision clock rate) is also coupled to controller 26 (line 37, Figure 3) and is employedin other processing operations performed by controller 26. Second, symbol recovery stage 25 also provides samples of the DC signal 36 to DC tracking stage 23 at a rate determine(l by the decision clock. Symbol timing recovery stage 25 outputs a decision clock having a rate h~rmonically related to the symbol rate of the DC compensated signal 33. Symbol timing recovery stage 25 also has two modes; track and freeze. When set in the 'track' mode, stage 25 has a narrow bandwidth loop filter and it outputs a decision clock signal which it determines from the received signal and adapts slowly to changes in the received signal symbol rate. The narrow bandwidth loop also reduces i.. -.. i~y to noise in the received signal. In 'freeze mode', the decision clock is frozen to the locally generated clock which is very close in rate to that of the received signal symbol rate until such time as the stage 25 is taken out of the freeze mode. This allows the symbol timing recovery stage 25 to flywheel through any tr~n~ient~ or i~lLellu~lions in the received signal. Signal 41 is a digital signal that switches symbol timing recovery stage 25 between track and freeze mode.

Tlallsllliuel portion 27 includes elements for putting an information signal into condition for transmitting on reverse channel 13, such as a filter, an amplifier, and a modulator. Controller 26 provides an enable/disable signal on line 38 to tr~n~mitter 27 which switches between a "Tx/on" state that enables tr~n~mitter 27 and a "Tx/off" state that disables the tr~nemitter. Data to be CA 022219~8 1997-11-21 tr~n~milt~l (Tx Data) is also provided by controller 26 (line 39). Clock 40 is adata request clocking signal generated by the transmitter for requesting data from controller 26.

As illustrated in Figure 2, a packet of data is transmitted between the time that the tr~n~mitter is keyed on (i.e. the time at which the tr~n.~mitter receives the Tx/on enable signal) and t_e time that the l~ is keyed off (i.e. the time at which the tr~n~milter receives the Tx/off disable signal). During this time, the data packet is greatly ampli:fied, commonly by at least two orders of m~gni~

In the ideal case, this transmitter keying on/off action does not cause any distortion in signals seen at the output of detector 20. Figure 4 shows an idealnon-distorted received forward ~h~nnel signal 50 having a fixed amplitude and DC off-set level at the Tx/on and Tx/off times. In the non-ideal case, the l.,.ll';llli~l keying action causes distortion in the output signal of detector 20.
Specifically, transients are generated in the received signal due to the proximit,v of the receiver and transmitter portions in subscriber 11 and due to the large changes (i.e. increase/decrease) in amplification of the tr~n~mitte~l data packets at the Tx/on and Tx/offtimes in the tr~n~mitt~r. As shown in Figure S this distortion causes large shifts in the DC off-set and variations in amplitude of the received forward channel signal 51 at the Tx/on and Tx/off times.

This distortion adversely effects both the DC tracking stage and the symbol timing recovery stage. Symbol timing is affected since stage 25 is responsive to the amplitude of signal 33. The large amplitude variations in signal 33 causes the rate of the decision clock signal 34 to become unsynclllo,~i;G~d with the forward channel signal. When this occurs, the received data (Rx Data) becomes inaccurate, since the decision clock determin~s when data signal 33 is sarnpled.

-CA 022219~8 1997-11-21 Further, the distortion affects DC tracking stage 23 because the samples provided by timing recovery stage 25 on line 36 have large DC off-sets. As a result, the mean DC off-set value tracked by stage 23 in a narrow bandwidth track mode is not representative of actual r(,l ~,v~d channel mean DC off-set.
Consequently, stage 23 generates an erroneous off-set voltage 32 thus distortingsignal 33 even further. The feedback effect provided by stages 22, 23, and 25, may amplify the distortion further until syncl~loni;~Lion with the rol~ald channel is completely lost. In this case, the time conel-ming task of channel re-acquisition must be performed.

The present invention is a dynamic tracking method that reduces the distortion effects on DC tracking stage 23 and symbol timing recovery stage 25 that occur at the Tx/on and Tx/off times in subscriber 11. In accordance to the method of the present invention, the subscriber receiver portion (i.e. DC tracking stage 23 and symbol timing recovery stage 25) are notified a priori of a tr~nemieeion event. Specifically, just prior to the Tx/on time the DC off-set tracking stage 23 and symbol timing recovery stage 25 are modified in the following manner:

~ symbol timing recovery stage 25 is set in a freeze mode such that it makes no further timing adjlletmente to the decision clock. It is eseenti~lly operates in a flywheel mode, and the Tx/on and Tx/off transients do not upset the decision clock synchronization with the forward channel data stream.

~ DC off-set recovery stage 23 is to set a wide bandwidth acquire mode such that it does track rapid changes in the DC.

Stages 23 and 25 are kept in these modes until a short time after the Tx/off time, typically about 10 to 20 milli~econds. By setting the symbol timingrecovery stage to a freeze mode, the decision clock remains unaffected by signal CA 022219~8 1997-11-21 33's transients and the decision clock remains es~nti~lly the same through out this time period. The effect of setting the DC off-set recovery stage to a widerbandwidth mode is that the mean DC offset value is derived in a shorter period of time than it would be in a narrow bandwidth mode. The wider bandwidth DC tracking mode is therefore able to measure and compensate for sudden changes in DC off-sets due to transients. Consequently, the transients do not influence the kacked mean DC offset (33) within the wide bandwidth co~
of sample data values (31).

It should be noted that A/D converter stage 21, DC off-set removal stage 22, DC tracking stage 23~ symbol decision stage 24, and symbol timing recovery stage 25 may either be implemented in software by performing digital signal processing (DSP) operations on the data or may be implementç~l in haldw~uc.
Thus, the present invention may be a method that applies to DSP operations or to hardware elements. However, it should be obvious to one in the art of communication design to apply the present invention to both of these implçment~tinns.

Although the elements of the present invention have been described in conjunction with a certain embodiment, it is appreciated that the invention may be implemented in a variety of other ways. Consequently, it is to be understood that the particular embodiment shown and described by way of illustration are inno way int~n-lçfl to be considered limiting Reference to the details of this embodiment is not intended to limit the scope of the claims which themselves recite only those features regarded as ç~enti~l to the invention.

Claims

WHAT IS CLAIMED IS:

1. In a system having a receiver for receiving an information signal on a first channel, said receiver including a first stage for tracking a characteristic of said information signal and a second stage for deriving information from said information signal, said information signal having an associated amplitude and frequency offset, a method for minimizing effects of distortion on said first and second stage, said distortion corresponding to a preknown distortion event and having associated event onset and event termination times, said method comprising the steps of:
setting each of said first and second stages into a first "distortion ready"
mode for essentially the duration of said distortion event, wherein when in saidfirst mode said first stage tracks said characteristic such that said characteristic is uneffected by said distortion;
setting each of said first and second stages into a second mode for times other than said duration of said distortion event.

2. The method as described in Claim 1 wherein said first stage is for tracking a DC off-set voltage of said information signal within a given bandwidth and said second stage is a symbol timing recovery stage for deriving a decision clock signal in response to said DC off-set of said information signal.

3. The method as described in Claim 2 wherein when in said "distortion ready" mode, said given bandwidth of said first stage is set to a first bandwidth and when in said second mode, said given bandwidth is set to a second bandwidth, said first bandwidth being narrower than said second bandwidth.

4. The method as described in Claim 3 wherein when in said "distortion ready" mode said first stage does not adjust said decision clock signal and when said first stage is in said second mode, said decision clock signal nay be adjusted.

5. The method as described in Claim 4 wherein said preknown distortion event is caused by performing intermittent data transmissions on a second channel.

6. The method as described in Claim 5 wherein said distortion corresponds to shifts in said DC off-set, said associated amplitude variations, and said frequency off-set in said information signal.

7. The method as described in Claim 6 wherein said system is a subscriber in a duplex switched data communication system.

8. The method as described in Claim 7 wherein said system further includes a controller for providing a first signal to said first stage for setting said first stage into said one of said first and second modes and for providing a second signal to said second stage for setting said second stage into said one of said first and second modes.

9. In a system having a receiver for receiving an information signal on a first channel, said receiver including a means for deriving a decision clock from said information signal, said information signal having an associated amplitude and DC off-set, a method for minimizing effects of distortion on said decision clock derivation means, said distortion corresponding to a preknown distortion event and having associated event onset and event termination times, said method comprising the steps of:

setting said decision clock derivation means into a first "distortion ready" mode for essentially the duration of said distortion event, wherein when said decision clock derivation means is in said first mode said decision clock is not adjusted and is thereby uneffected by said distortion;
setting said decision clock derivation means into a second mode for times other than said duration of said distortion event.

10. The method as described in Claim 9 wherein said decision clock derivation means is a symbol timing recovery stage for deriving said decision clock signal in response to said DC off-set of said information signal.

11. The method as described in Claim 10 wherein said preknown distortion event is caused by performing intermittent data transmissions on a second channel.

12. The method as described in Claim 11 wherein said distortion corresponds to shifts in said DC off-set and said associated amplitude in said information signal.

13. The method as described in Claim 12 wherein said system is a subscriber in a duplex switched data communication system.

14. The method as described in Claim 13 wherein said system further includes a controller for providing a first signal to said decision clock derivation means to set it into said one of said first and second modes.