CA2149367A1 - A Hybrid Line Coding Method and Apparatus - Google Patents

A Hybrid Line Coding Method and Apparatus

Info

Publication number
CA2149367A1
CA2149367A1 CA2149367A CA2149367A CA2149367A1 CA 2149367 A1 CA2149367 A1 CA 2149367A1 CA 2149367 A CA2149367 A CA 2149367A CA 2149367 A CA2149367 A CA 2149367A CA 2149367 A1 CA2149367 A1 CA 2149367A1
Authority
CA
Canada
Prior art keywords
framing
carry
accepted
binary
coding method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2149367A
Other languages
French (fr)
Other versions
CA2149367C (en
Inventor
Dale L. Krisher
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Alcatel Networks Systems, Inc.
Dale L. Krisher
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Networks Systems, Inc., Dale L. Krisher filed Critical Alcatel Networks Systems, Inc.
Publication of CA2149367A1 publication Critical patent/CA2149367A1/en
Application granted granted Critical
Publication of CA2149367C publication Critical patent/CA2149367C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H04L25/4923—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes
    • H04L25/4925—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes using balanced bipolar ternary codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1623—Plesiochronous digital hierarchy [PDH]

Abstract

Existing infrastructures such as DS1 or E1 are used at currently accepted rates to carry a third more information by using a hybrid encoding technique wherein a 4B3T encoding is done for the payload bits, while a 1B1T encoding technique is used for framing information.
In this way, for example, a DS1 can be used at 1.54 Mbit per second to carry 2.058 Mbits of binary payload, while respecting the 8 kilobits of framing expected by DS1 hardware. Similarly, for example, an E1 infrastructure can be used at the accepted 2.048 Mbit per second rate to carry 2.560 Mbits of binary payload plus 128 kilobits of binary framing/CRC without having to change the accepted E1 framing techniques.
CA002149367A 1994-07-22 1995-05-15 A hybrid line coding method and apparatus Expired - Fee Related CA2149367C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/279,197 US5633892A (en) 1994-07-22 1994-07-22 Hybrid line coding method and apparatus using 4B/3T encoding for payload bits and 1B/1T encoding for framing information
US08/279,197 1994-07-22

Publications (2)

Publication Number Publication Date
CA2149367A1 true CA2149367A1 (en) 1996-01-23
CA2149367C CA2149367C (en) 1999-09-14

Family

ID=23068039

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002149367A Expired - Fee Related CA2149367C (en) 1994-07-22 1995-05-15 A hybrid line coding method and apparatus

Country Status (4)

Country Link
US (1) US5633892A (en)
EP (1) EP0693842A3 (en)
CN (1) CN1105439C (en)
CA (1) CA2149367C (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0731586B1 (en) * 1995-03-06 2002-08-28 Hewlett-Packard Company, A Delaware Corporation Balanced ternary code
US6014708A (en) * 1998-02-19 2000-01-11 Alcatel Adaptor and method for mapping a fast ethernet payload input signal to a synchronous payload envelope, as well as a clock selector for use therewith
US6456666B1 (en) 1999-07-29 2002-09-24 Agere Systems Guardian Corp. Signal encoding for transmission of multiple digital signals over single physical medium
JP3613219B2 (en) * 2001-10-02 2005-01-26 日本電気株式会社 Modulation apparatus, communication system, modulation program
JP3596678B2 (en) * 2001-11-06 2004-12-02 日本電気株式会社 Communication system and communication method
US7167110B2 (en) * 2002-01-08 2007-01-23 Nec Corporation Multi-level communication system and method with error correction
US6539051B1 (en) * 2002-03-11 2003-03-25 Cypress Semiconductor Corporation Parallel framer and transport protocol with distributed framing and continuous data
GB201713789D0 (en) * 2017-08-29 2017-10-11 Graber Steffen Extended range ethernet code

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3689699A (en) * 1971-04-12 1972-09-05 Gen Electric Synchronizing system
FR2630871B1 (en) * 1988-04-29 1994-03-18 Alcatel Cit METHOD AND DEVICE FOR ADDING AND SEPARATING A LOW-RATE DIGITAL CHANNEL TO THE HIGH-RATE DIGITAL CHANNEL OF A TRANSMISSION LINK
JP2545991B2 (en) * 1989-08-10 1996-10-23 日本電気株式会社 Sub signal transmission method
JPH0767101B2 (en) * 1989-12-12 1995-07-19 ジーメンス・アクチエンゲゼルシヤフト Method of transmitting 1544- to 6312-kbit / s-signals over 2048- to 8448-kbit / s-sections in synchronous-digital multiplex hierarchy
EP0565890A3 (en) * 1992-04-16 1995-01-11 Siemens Ag Method and system for the transmission of a data signal in a VC-12-container in transmission channels.
JP2845705B2 (en) * 1993-01-14 1999-01-13 日本電気株式会社 Multi-level coded modulation communication device
US5325355A (en) * 1993-03-19 1994-06-28 Apple Computer, Inc. Method and apparatus for implementing a common mode level shift in a bus transceiver incorporating a high speed binary data transfer mode with a ternary control transfer mode

Also Published As

Publication number Publication date
US5633892A (en) 1997-05-27
CN1120273A (en) 1996-04-10
EP0693842A3 (en) 1996-03-20
CA2149367C (en) 1999-09-14
CN1105439C (en) 2003-04-09
EP0693842A2 (en) 1996-01-24

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Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed