CA2128764A1 - System and method for enhanced printing - Google Patents

Abstract

ABSTRACT OF THE INVENTION
Higher quality printing is difficult in implementation in spatial light modulator printers. The two major problems; are accomplishing gray scale within the line time constraints, and eliminating staircasing artifacts within the images printed (81). It can be improved by using an alternate way of resetting cells on the spatial light modulator when data is being loaded onto the cells, timing delay (86), horizontal offset (84), and differently sized pixels (80, 82).

Description

07-21-94 01:33AM F~OM T 1 LEGAL DEPARTMEN~ TO KIRBY, EADES,GALE P003/048 - 2~2~7~l~

SYSTEM AND MEl~IOD FOR ENHANC~3D PRINTING
BAC~Gl~OUND OF THE INVE~ITION
1. Field ofthe Invention This invention relates to printing, more specifically to printing with enhanced 5 images and gray scale.
2. Back~round of the Invention Digital copier~ and printers have iT~herent problems reproducing high-resolution images and gray scale. Desktop la6er printers generally have only 300 dots-per-inch (dpi) addressability, and print with slightly oversized pixels to allow 10 overlap, which defines the actual printer resolution. These limitations show up as ragged edges on text and aliasing artifact6 on graphics because at nominal resolutions t~e individual pixels cannot accurately replicate curves and diagonal lines.
An al~ernate dot manipulation method has appeared comrnercially to address the drawback, but it does not produce gray scale levels. Instead, it varies the shape, 15 size, or location of tigital black pixels by controlling laser power and timing.
Shortemng the dot exposure time, and delaying it, creates a smaller, oval spot which allows dot positioning within the gtandard pixel cell boundanes. Additionally, the spot can move across the width of the pixel cell in the direction of the raster scanning motion. Reducing power levels in the la6er can flatten the spot in the print-proces~
20 dirèction orthogonal to the 6canning motion. Typically the scan direction is horizontal and the print-process direction is vertical on a page. Smoother appearing edges are achieved by appropriate placement of suitable distorted pixels, and the method is TI-1~954 Page 1 JUL 21 '94 2:35 214 995 3170 PAGE.003 07-21-94 01:33AM FROM T I LEGAL DEPARTb{ENT TO KlRBY, EADES,GALE... P004/048 generally refierred to a6 resolution enhancement.
Laser printers can readily achieve higher resolutions than 300 dpi with more complex controllers and printer process subsystems. Pr~ter page-description languages, for exampls, can pre8ent a document, or irnage, to a digital printer at its limiting resolution. ~owever, the burdens on printer memory, microprocessors, and the capability of the printer equipment and optical scanner to support higher resolutions typically climb ag a square of the linear resolution. Sy6tems used in applications demanding higher resolution can r1.~n from 1200 to 2500 dpi, but they are proportionately more exper~sive than generic desktop 300 dpi printers. The benefit 10 is that the added linear resolutior~ permits a binary printer to simulate gray scale images through a process called half-toning.
The xerographic process a6 embodied in print~rs, copiers and facsimiles, is binary in nature, making it difEcult to achieve varying shades of gray. The deYelopment process, in which charged toner particles are attracted to the latent 1~ image exposed on a photoreceptor, operate9 as if it were digital in nature, (i.e., it is a very high contrast analog proceg6~. Therefore it is necessary to use higher resolution ~ina~ xerographic sygt~mg that resort to a method called half-toning to simulate gray 9cale. Smaller pixels are progressively clustered to form a larger pixel, or half-tone cell. This allows a varying of the number and arrangement of the 20 elements that are to be white or black, resulting in a visually "gray" half-tone cell.
The precision and computational power to generate such a cell is much higher than for a binary desktop laser printer and represents a limiting factor in a laser JUL 21 ~94 2:36 214 995 3170 PAGE.004 01-21-g4 01:33AM PROM ~ I LEGAl DEPARTMEN~ TO KIRBq, ~AD~S,GALE... P005/048 212~7~ 1 printer's ability to achieve gray scale. In addition to higher perceived resolution, gray scale is rapidly becoming a necessary Çeature in a printer designed to reproducescenic images from photographic sources, or computer displays, because of the inherent complexity of the half-toning proces~.
In the latter case, computer displays can take advantage of the integrating response of the human eye to vary the gray scale or intensity of an image over a w~de dynamic range. Pixels can turn off for periods of time within a frame's display time that the eye integrates together to produce a perce*ed contir~uou6 t~ne intensity gradation. Since c~omputer displays frequently provide the images for printing, an incompatibility between the image produced on a display and the ability of a digital, binary pri~ter to pr~nt it exists. The game is true for digitally scanned continuous-to/ne photographic images.
In summary, printing with binary digital printers has limitations. There exist diffilcultieg in reproducing characters without distortion, loss of detail, sampling artifacts, or positional errors at lower resolutions . Gray scale simulation using higher resolution printers, must result in acceptable combinations of gray and freedom from - -~risual ar~ifacts.

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SUMMA~Y OF T~IE INVlENTION
The present invention disclosed herein comp~ises a printing system capable of both resolution enhancement and multiple gray-scale levels by manipu~ating pixel size and placement within standard printing parameters. These capabilities result 5 from the ability to implsment sub~pixel modulation with spatial light modulators incorporating a range of user-selectable pixel element sizes.
It is an advantage of this system that it combines higher resolution with more gray shades than conven~onal binary prmter9 using half-tone ms~thods. It is a further~a~antage of this system to use less memory at the same resolution and gray 10 scale t~an currently available, higher resolution, half-tone plinters, and to reduce or eliminate the use of ditheling algonthms to simulate gray scale. Both factor3 lead to system ef~lciencies, co~t reductions, and improved quality printed images.

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B~IEF DES~RIPrION OF THE DR~AWINGS
For a more complete understanding of the present invention and for further advantages thereof, reference is now made to the following Detailed Description taken in conjunction with the accompanying Drawings in which:
FIGURE la shows a line drawing of a digital micromirror.
FIGURES lb-ld show various methods of resetting data on a digital m~cromi~ror.
FIGURES 2a-d show a standard layout of an spatial light modulator and how the timing of the data can be used to better control aliasing ef~ects.
FIGURE 3 show~ horizontally offset pixels.
FIGURE 4 show a method of using horizontally offset pixels and the resultant p~t image.
FIGURE 5 shows a layout of fractionally sized pixels centered about an x-y g~d.
FIGURE 6 show examples of various combinations of pixels to ach~eve resolutio~ enha~cement.
FIGURES 7a-c show dia~ram~ of a double-level digital micromirror.
FIGURES 8a-b show a print feature using standard spatial light modulator arrays, and the same feature using an adapted array.

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DETAILED DESC~CIPTION OF THE PREFERRED EMBODI~EN'rS
Digital copiers and printer6, fior all kinds of media, have inherent problems acceptably reproducing both high~regolution images and gray scale. The performance of laser printers ha~ improved print quality by orders of magnitude over dot matrix 5 printers, and replaced the of~ice typewriter as the standard of print quality. Yet, typical desktop laser printers evidence limitations in both resolution and gray scale capability. Under ~nspection, the characters show ragged edges and graphics o~en appear coarse, because at nominal resolutions the individual pixels cannot replicate ` curves and diagonal lines that well.
Standard desktop laser printers, and many enhanced resolution systems, only have 300 dots-per-inch (dpi) addreggability and slightly larger (overlapping) pixels that define the fundameIltal resolution of the prmter. By analogy, display system usually have dots that are larger than their addressing grid to assure overlap and help smooth out the res~lting image. However, displays can modulate the in~ensity of individual pixels, while binary xerographic printers d~o not. -For both the printers and di9plays described, however, the ability of the human èye to resolve minimal size features, and light-to-dark transitions, exceeds the resolvability of the display system. A major difference between displays and digital pri~ters is that the former can vary the gray level, or intensity, within a given pixel 20 element over a wide dynamic range, while the di~tal printer produces only a black or a white (binary) spot. Since compute~ displays frequently provide the image for printing, an inherent incompatibility between the image produced on a display and TI-169~4 Page 6 JUL 21 '94 2:37 214 995 3170 PAGE.008 07-21-94 01:33AM FROM T I LEGAI DEPART~lENT TO KlR~Y, EADES,GALE ~009/048 " ' 212~76,~

the ability of a binary printer to reproduce it e~usts. The same is true for continuous tone (contone) images produced by photographic proce6ses. The printer ha6 to mapthe image to a much higher resolution system and then apply half-tone methods tosimulate gray scale.
At the expense of complexity in cont~ollers and printer engine subsystems, the -- lajer printer can readily achieve higher resolution~ than 300 dpi, and reduce the factors detracting from the appearance of hard-copy text and graphic~ to near invisibility. As a point of refere.ce, a reasonable analog (light-lens) electro-"; photographic copier system c~n resolve and reproduce feature6 corresponding to a 600 dot/inch addressability, which exceeds the ability of the eye to detect distortions.
Printer page-description languages that are dev~ce independent can present a d~ocument, or image, to a digital printer at the limiting ~esolution of the plinter, per se. For the 600 dot/inch example, however, the image contains four times as manypixels to manipulate, rasterize and image. The burdens on printer memory~
microproces30rs, and the capability of the printer equipment ar d optical scanner to support higher resolutions al50 t~rpically climb as the sq~are of the linear resolution.
Equipment reliability and quality of consumables (e.g. toner and paper) become dominas~t limitations.
~ystems used for typesetting, pla~e making, filsn processing, and applications demanding higher re~olution r,m at resolutions from 1200 to 2500 dpi. Accordingly, they are usually bigger, slower, and much more expensive to buy and maintain than generic 300-dpi printers. With the added linear resolution comes the advantage that JUL 21 ~94 2:38 214 995 3170 PAGE.00s 07-21-94 01:33AM ~ROM T I LEGAl DEPAR~MENT TO KIRBY EADES,GAlE... POlO/048 - 2~2~7~i1 al60 allows a binary printer to simulate gray-scale, or photographic, images through a process called half-torling, where lirlear resolution i8 traded-offto produce gray-scale in image~.
Gray-scale images, where areas of the image are not all black or all white, 5 require the ability to render a variety of ghadings to accurately simulate the desired image. This presents a fimdamental difficulty for laser xerographic printers. Part of the problem lies in the nature of the process. In xerographic print engines, copi~rs, and pl~in-pa~er fax machines, etc., the latent image is created by optic~lly exposing a photosensitive media (either from an original.through a lens or by electronic 10 rneans), toning or developing the image, and then transferring it to a piece of paper by electrostatic means. The charged toner moves to the exyosed partions of the photoconductor where the late~t image reside6 (or vice-versa, depending on whether the development i8 positive or reversal). ~ ~ ~
Attracting a variable portion of the toner to the photoconductor at each exposed ~ -:
- 15 pixel locatiorl creates various problems because the typical exposure-developer proce6s is more digital than analog as operated and very high~contrast in nature as a result.
Toner granularity also ~actors into the process of rendering low-noise, gray-scale images This problem exi6ts in a sim~lar setting for all kinds of xerographic printing, copiers, and fax machine~. Control~.ing ~,e exposure process, the photoconductor 20 sensitivity, and the de-~eloper process to allow reproduction of pixels with smooth, accurate gray levels is a very demallding task.
As a result, higher resolution ~inary xerographic systems resort to the method !

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called half-toning to simulate gray scale for coIItone image reproduction. A macro-pixel, consisting of an array of the smallest printer pixels, is generated, with a varying mlmber of the addressable elements being white or blacl~ to simulate a desired le~el of gray. The drawbackg become a trade-off between linear resolu~ion, available levels of gray scale, and computational requireme~ts to generate the half-tone cell during the print process. Because the cells can be filled many different ways, artifacts and pixel-to-pixel inte~actions also occur.
As an example, a macro-pixel with m - sub-piucel elements can gensrally give m + 1 gradation levels. A 2X2 pixel, c0nsisting of four elements, can, thus, provide white, black, and three intermediate levels of gray, totaling five levels. Depending on the filling sequence, neighboring cells can interact to produce unwanted artifacts s /ch as contouring or coarsenes5. Other fill patterns can produce symmetrical screer~
patterrls that are visible to the eye.
In addition, the direct result of forming such a half-tone cell is a corresponding 1~ los~ of 2X in linear resolution, and, with only 5 levels, the 2X2 cell is totally inadequate for use5ful gray scale. General rules of thumb suggest a relationshipbetween line~r resolution, typically caIled screen size, and gray scale for good quality pnnting. As a minimum, 64 gray levels and a 100-line screen, and preferably 128 gray levels and a 200-lin0 screen, are desired. In terms of a 1200 dot/inch laser printer, the trade-off gives about 100 gray levels at a 120-line screen, acceptable performance c3l1y for low-end applications, so commercial type-setting systems use at least 2600 pixel per inch resolution to achieve gray scale for photographic TI-16954 Page g JUL 21 '94 2:39 214 995 3170 PAGE.011 , , : : . ~ ~ `, . ~

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It is also useful to vary the ~ize or il~tensity of individual pixels to impro~re text and line graphics, but the gene2~c laser printer lacks the capability. An alternate approach that has recently emerged in the la9er printer industry is the simulation 6 process called resolution enhancement, RET. This process also does not produce :
gray-level pixels; it does va~y tbe shape, size, and locàtion of the digital pixel by controlling laser power and timing. By ~hortening the dot exposure time, and delaying it, a smaller, oval-shaped spot can be positioned within the full-size pixel boundaries. The spot can ~e~ mp~ed across the width of the pixel in the direction of the laser scansling spot motion. Re601ution is effectively increased along the scan direction by the p~ocess. Reducing laser power levels can flatten the spot, shortening its dimension in the print pros:egsing direction which is ortho~onal to the scan axis.
By moving around bit~ of pixels, character appearance can be enhanced, and jagged features smoothed out.
- 15 The generalprintingproblemcanbe surnmarizedasfollows. Characters must -be faithfully reproducet to the human eye without distortion, blurring or other loss of detail, sarnpling artifacts, or positional error~. Gray-scale implementations must produce acceptable combinations of gray levels and linear resolution, free of artifacts from the forrnation of half tone cells. System approaches must be reliable and produce consistent results from day to day.
~n addition to the w~dely-adopted laser polygon scanned printer systems described, xerographic printers and fi~m exposure systems have been developed using TI-16954 Pag~ 10 , JUL 21 ' 94 2:40 214 995 3170 PAGE.012 .. . , . ~ " - . "

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various forms of spatial light modl.~lators (SLMs), and emitting alTays, such as the light emitting diode tLED) array. The SLMs, while desirable for co~t, size, and perfo~nallce reasons, have generally resulted in digital systems with one or more limitations in terms of the requirements for the printing proce6s as discussed above.
Examples of such SLMs are liquid crystal devices (LCD), electro-optic cryfitals, magneto-optic cens and digital micromirror devices (DMDsj, also known as defo~mable mirror dev~ces.
Many of these modulators consist of arrays of cslls that can be addressed to turn ON or OFF. by changing transmission states. The LED is the only active emitter 10 array. Reflective modulators such as the DMD are typically considered to be ON
when the cell deflects light towards an ,~nager lens and thence to an image-forming s~urface, whether a viewing gcreen 9r El photosen6itive medium. Some of the other arrays absorb the incident light when OFF and transmit it when ON. Some have limitations in spectral bandw~dth (LED and magneto-optic), and in some cases the 16 architecture suffera from pixel-to-pixel cross talk. Any ofthe hybrid technologies, e.g.
electro-optic, are typically diffiicult to m~.nufacture. The DMD doe~ not suffer from any of the aforementioned limitations.
DMD SLM DEVICES
The digital micromirror device (DMD) is fabr~cated using a monolithic silicon 20 Metal-Oxide Semiconductor (MOS) process. The substrate contains t;he addres~ing circuits and logic to accept digital data inputs and route them to memory cell arrays fabricated in the shape of any desired SLM integrated circuit (IC). Above the Tl-16954 Page ll JUL 21 ' 94 2:40 214 995 3170 PAGE.013 01-21-94 01:33AM FROM ~ I LEGAL DEPARTMENT TO KIRBY, EADES,GALE. . P01~/048 ' 23 237~
addressing circuits, an array of mlcroscopic (17 micron x 17 micron) metal mirror elements are fabricated that can respond to the underlying address circuits by rotating about an axis in the plane of the array (Figure la). Typical rotation angles are ~10 degrees and th~ regponse time is 10's of ~secs. The array can be essentially 6 square, a~ in the case of displays, or long and narrow for printing applications.
Examples o the former aTe 640 x 480 pixel8 and the latter 2500 x 16 pixels.
In operation, the DMD must be illuminated by an external light source, being a pas6ive-reflective SLM. Arrangement of the optics to accomplish a practical Sl,M
system for pnnting applications is described in US Patent No. 5,101,236 "Light Energy Control System and Method of Operation,~ March 31, 1992. The same optical principles apply ~o display systems u~Gilizing DMD'6 in the form of area alTays.
For di~plays, the modulator cells are ugually turned ON and OFF repeatedly for a total ON time that is a fraction of the frame time, or left ON for a fraction of the frame time and then switched OFF. By either of these methods of reducing total 15 light level~ through pulse-width modulation (PWM), the display can simulate gray scale by taking advar~tage of the integrating characteristics of the human eye. Of course, gray scale is a generic term for intensity that is also applicable to color displays. PWM gray scale techniques allow for different shades of color, for example, by dividing each color field into 8 binarv segments, ranging from a least-significant 20 bit (LSB) to a mo~t-significant bit (MSB) and typically factored on a binary scale (e.g 1/2, 1/4, etc.). The LSB hag the shortest time ON and the MSB has the longest time ON. Appropriate combinationg of ~e 8 binary segments give up to 256 distinct gray JUL 21 '94 2:41 214 995 317~ PAGE.~14 07-21-94 01:33AM FROM T I IEGAL D~PAR~MEN~ TO KIR~Y, EADES,GAIS... POIS/048 - 212;3~
levels for each color, and a total of over 16 million color6.
Because an area array display reimages each DMD pixel to a fixed point in the display plane, and the time for a (60 H~ display frame is 5.7 milli6econds for each field of color, color gray-scale can be achieved very readily using 8-bit PWM. The problem in printing applications ~ies in the relatively short raster line time available to accomplish PWM. I~ order for a 300 dpi printer t~ produce a reasonable output in p~ges-per-minute, it must print an entire line in under a millisecond. To achieve gray scale as described for displays, where the frame time is as long aS 16 milliseconds, is impractical The 25 ~.~sec response time of the Dl!~l) lirnits the 10- - number of times it can cycle ON and OFF usefully within a raster-line at print speeds much greater than 1~ pages-per~minute. Therefore, only a limited gray scale ra~nge can be accommodated.
Figure la illustrates one example of a DMD spatial light modulator pixel element. Bi~table DMDs typically consist of two address electrodes 8a, and 8b, on 15 either side of the rotational axis of a highly reflective mirror, 1, supported on posts 2a and 2b, by torsion hinge6 ~a and 5b. Additionally, the DMD cells have landing ~ -electrotes 3 and 4, held at the same voltage ac the mirror element, 1, to avoid any risk of contact welding, The addres9 electrodes nom~nally alternate between 0 and ~ volts in re~ponse to inputs from ~ derlying address logic, and the mirror rotates 20 accurdir~gly in response to electro6tatic forces of attraction. U.S. Patent No.
~,061,049, "Spatial Light Modulator and Method," describes these devices in more detail. In operation, the individual elements are rotateid about hinges in response to JUL 21 ~ 94 2:41 214 995 3170 PAGE.015 . ,: , 07-21-94 01:33AM ~ROM T I LEGAl DEPARTMENI TO KIRB'l, EADE~,GALE,,, P016/048 - 21 237&1 either the 8a or 8b electrode, typically deflect~g +10 degrees until the landing electrode and mirror edge contact. Since the electrodes 8a and 8b cause the mirror to rotate through an angle, they are o~en referred to as the ~P~ and ~>a electrodes.
Mirror elements are nominally 1~' microng on an edge (0.0003n~m square area), but 5 size, shape and pitch can be varied by desi~, as can the landing angle, ~.
Figure lb details the timi~g and voltages necessary to operate the DMD
elements. The figure shows the effects of the control ~nction bias 10, address bias 14 and 16, reset pulse train (t~) 12, on the rotational state of the mirror line 18, where cross hatched areas ~epresent mirrnr ON-states (or OFF-states, after t3).-~
In the sequence of Figure lb, an address voltage (+~ volts) is switched at to on the addre~s electrodes 14, and 16, (ON to OFF state) corresponding to 8a and 8b, through the respect*e memory c~ll in the silicon substrate 6 in Figure la, The mirror remains latched in the previous state through the attractive action of the bias voltage, 10, (-10 volts) which is applied to all mirror elements in parallel. At to~ the 1~ negative biafi is present, but the reset sequence, 12, is not. After the addressing voltage becomes true, the reset sequence, l21 commences at t" and lasts several cycles u~til t . Dw~ng this t~me Vw~ 10, is of~. The reset pulse train is tu~ed to a plate resonance of the particular I~MD mirror architecture, and electrically pumps mechanical snergy into the mirror pixels between tl and t2 (2 ,usecs). It is typically 20 a five-pulse train at -24 volts.
At t2, both bias and reset voltages are 0, and the reset mirror is free to rotate ~rom a deflected ~tate 18, to a flat state (slightly before t~) and then on to the oppo~ite TI-169~4 Page 14 JUL 21 ' 94 2:42 214 995 3170 PAGE.016 ,: .:.:,~ :

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deflected state, 19, at t", uI~der the cor~bined attraction of the new address voltage, and the bias voltage, 10, which is reapplied at t3 (~10V). The absolute magnitude of the negative bias and positive address voltages combine to 15 volts, sufficient to rotate the mirror element fully to the opposite landed (-10 degrees) state. Bias must 5 be precisely applied, af~er the mirror has physically achieved the angular of~set incurred as a result of the new addres5 voltage condition, e.g., at t ,. The mirror flight time, t~-t3, is about 8-l0 ~secs. The re8et sequence i~ described in more detail in U.S.
Patent No. 5,096,279.
..One problem with the sequence lies in the time:-it-.takes to reset the cell. When 10 the reset cycle completes, DMDg typically return to their unde~ected states and then wait for the application of a bias vl~ltage that al1ows them to move to their new st~es. In the example above7 the data causes a change in ~tate, but the same reset ànd return to a neutral state occurs then a state change is not required, resulting in a temporary but efficiency-decrea6ing OFF-state time.
15Figure 1c actually represents the afiorementioned pulse-width modulation (PWM) method for achieving gray-6cale with a DMD. Within a liI~e time, or a fra me time, in the case of displays, the DMD cycles ON and OFF 4 times in thi~ example, corresponding to 4 bits of gray-scale, since each ON segrnent is half the duration of the prior segment. Thus, ON period 18a is the most sigI~ificant bit, and ON period 20 18d i6 the least significant bit (LSB). By combining these binary pulse widths, 2', or 16 dif~erent gray level can be ~irnulated, corresponding to the respective portions of -an entire line (or frame) time that the given pixel element is ON. Note on line 10, TI-169~ Page 16 JUL 21 ' 94 2:42 214 995 3170 PAGE.017 07-21-34 01:33AM FROM ~ I LEGAL DEPARTb!ENT ~0 XlRBr, EADES,GALE... P018/048 - 2~2;37~

that each reset time penod, tR~ detracts from the allowable ON time of the n~rror, line 18. The reset cycle, tR~ i6 expanded to show detail ~ut is actually on the ~rder of the LSB.
In the caqe of displays, each pixel image i9 spatially fixed on the screen, and 5 the binary PW~, Figure 1c, ef~ectively integrates the light intensity at a fixed spot as perceived by the viewer'6 eye. However, for a printing process, where the optically sen6itive media, or organ~c photoreceptor (OPC), is moving with respect to the spatially fixed images of the exposing DMD pixelg, unwanted ar~facts can occur.
This results due to the fact that the OP~X motion spatially separates the components 10 of the PWM signal, effectively mapping the pulse9 from the time domain to the spatial domain according to the relationship X(position), V(OPC ~relocity) * t(seconds), where t i8 the time dif~ere~ce between for example, the MSB and the LSB, the worst-case example, and X defines the resultant physical separation of the imaged spots.
1~The resulting binary PWM patterns form particularly objectional artifacts to the human eye at certain spatial fre~uencies on the order of 5 to 10 line pairs per millimeter. This spacing i9 very close to a 300 dpi printer process, so the spatial ~ :
separation from PWM i8 readily apparent. I~vo nearly equivalent gray levelsl for example the MSB and MSB-l, will be very 6patially distinct due to the necessary 20 combinations of all the lower order bits to produce a level MSB-l. The subtle change in gray level can be lost in the substantial spatial difference~ between the two pixel patterns. It is therefore desirable to render gray scale in pnnting by PWh~ using T~lB954 Page 16 JUL 21 ' 94 2:43 214 995 3170 PAGE .018 0~-21-94 01:33AM FROM ~ I LEGAI DEPAR~MEN~ ~O KlRB'l, EADES,GAIE,,, P019/048 - 21287~1 some set of patterns that are non-binary and not susceptible to this effect. A linear pattern, simple diviidmg the pixel into equally 8paced ON and OFF bars would i~prove the smoothness of the gray levels, but would be prohibitively complicated to implement at more than a few ievels of gray.
In particular, sub-dinding a relatively low speed dot line of 1 msec to yield 16gray level~ would require 16 pixel transitions, per line, versus only four for the 4-bit, 16-level b~nary example. Each line-palr corresponds to only 62 ~secs total allowable duration. Since the re~et address ~ime ig ~0 ~sec, and two ar~ required per line pair, almost all the time i~ spent addre~sing the DMD, and exposure efficiency drops to only 30%. In any event, a 1 milligecond line time, and only 16 gray levels are of only limited interest for printing applications. So improved technique~ for producingup~vards of 1~8 ~ray level~, at line time corresponding to a 50 page per minute print process, or 300 psec, and without introducing artifacts at the pixel level are required.
One possibility arises if a method for latch~ng some DMD elements while selectively 15 readdressi~g others can be implemented.
DMD OPERATION
DMD deflection ariseg due to electrostatic attraction between the n~rror element and the undarlying subgtrate, 8pecifically the address electrodes The attractive force is proportional to t~e square of the magnitude of the potential20 difference, and inversely proportional to the square of the air gap separzting the m~rror and the substrate. The restoring force due to the torsion hinge is linearly proportional to a sprihg constant, k, and the twigt angle, ~. At sorne percentage of JUL 21 '94 2:44 214 995 3170 PAGE.019 07-21-94 01:33AM FROM ~ I lEGAL DEPAR~MEN~ ~O XIRB7, EADE~,GA~E .. P020/048 212~7~ ~
the maximum (landed) deflection angle, the quadratic force of attraction overwhelms the linear restoring torque and the mirror 9pontaneously falls into an electrostatic potential well uI~til the tip touches the landing electrode which then provides an equilibrating reaction force. Thie pixelstops at a preci6e angle dcfincd by the air gap 5 and the size of the pixel from the tip to the ax~s of rotation.
The potential difference is comprised of two components. The first is the positive address voltage, nominally 0 or 5 volts, and the ~econd is a negative bias voltage applied directly to the rnirror structure. In the ab6ence of addressing and for an ideal mirror structure~ syr~unetry of attraction on each side of the torsion hinge 10 would prevent a mirr~r from rotating ju8t due to application of a bias voltage alone.
In practice, the application of a +6 volt address signal to either phase of th~
address electrodes, ~ or ~, tilt6 the mirror in that direction ~ small percentage of _ the maximum deflection permi~sible. Subsequent application of a negative bias voltage then acts to increase the deflection until the collapse to the full rotation angle occur~. For the device geometries described in the referenced patents, a 5 volt address combined with a -10 volt bias, to total 15 volts, provide~ sufficient att~aetio~
s to achieve fu~l ang~ar displacement. Thie average voltage to cause full rotation, called the collapse voltage, is nominally 12 volts, so in plinciple, a ~2 volt address and a -10 bias could achieve deflection. The added 3 volts o~ address margin is required to as6ure complete deflection of all pixels aver a range of operating `` conditions, and to accommodate device changes over time.
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voltage. Ideally, all pixels wo~ld release and return 80mewhere close to the flat state, since the address voltage is insufficient to hold the pixel at full rotation against the torsion sp~ing. In practice, the controlled -24 volt reset pulse is used to electrically "pluck" the pixel and resonantly store me~hanical energy in it to assist in the release 5 and return to the flat state. When the rmrror has equilibrated to whichever side of the flat (~ = 03 condition that is dictated by the state of the address electrodes, bias is reapplied and the pi~el rotates corre9pondingly to ~ ~m~ again.
The ability to finely control the occurrences and the amplitude relationships of the bias~ r.ese<t, address and holding voltages permits selective reset and rotation 10 of mi~or~ on which data is to be changed. The mirrors on which the data does not change remain fixed throughout the reset process. A fully rotated DMD pixel can la~ch and hold data, even in the presence of a refiet signal.
It is desirable to avoid the delays a5sociated with the return to a flat state (~
= O), and subsequent rerotation to the initial state. One such approach rnodifies the ;` 15 curre~t reset process, which return~ to 0 during and after reset. Since any-residual re~et or bias voltage subtract6 directly frs~m the address voltage margin, V~", = O i8 requ~red for 5 volt addressing, and the associated need for 3 vo~ts of address margin. Reliable operation can not be achieved with any residual bias voltage, during the period when the pixel retu2n8 to ~ = 0, since the pixel may fail to rotate through 20 ~ = 0, and therefore cannot respond to the alternate address condition. It has been pointed out that leav~g the 5 volt address on the address electrode alone is not sufficient to latch the pixel after reset.

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It is po~sible with exssting Ci~OS address structure designs to operate the addressirlg at voltages between 5 and 10 volts. If V~ddr~" is increased to 6.5 volts for example, then for a constant value of address-plus-bias at 16 volts, Vbj.. can be reduced to -8.5 volts. More importantly, V~, can now remain at -1.5 volts throughout 5 the reset process, and s~ll permit a true address vo]tage margin of ~3 volts. This is the result of subtracting the residual bia9 voltage (-1.5 volts) and the min~mum threshold address voltage (+2.0 volts) to a~ive at the desired address voltage margin, 3 volts.
S ~a result of increasing the address voltage, and permitting~ each volt of 10 increase in address to be balanced by a corresponding increase in residual Yb~ (that iq, bias voltage existing immediately aflter the reset cycle during the flight time of the pixel from ~3mu~ to ~ = O), the magnitude of the holding potential increases by 2 volt6 for every volt in address. When the combination reaches around 10 volts, the holding voltage, the pixel will latch down and not returr~ to ~ = O aflcer reiset. Figure ld . 15 diag.ram~ this situation, corr~6ponding with Figure lb.
Even though the reset 12a may free the continuous1y addressed pixel in6tantaneously, it will on~y counter rotate by a degree or two out of the ~3m~u~ = 10 before the impressed voltage (10 volts) 15a returns it to ~ ". There is no loss of optical efficiency or exposure time, a8 indicated by the small dip in optical output 11.
For the switch to the other rotation state, Veddre" is on the counter electrode 16, and the pixel can return through a= o and thence ~o the newly addressed state despite residual holding voltage 15b. The magI~itude of the arrows 15a and 15b do not .

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correspond to the attractiv~ potential6 w~ch are 10 volts and 2.~ volts respectively.
It ~hould be not~d that the reduced bias voltage setting, -2.5 ~ in ~igure ld is only maintained for 10 or 16 ?lsecs a~er reset and befiore appl~ng the full Vh"", (which fully rotates the re~et pixels) to assure latching of the selected pixels. Likewise, the 5 elevated address voltage need only be applied momentanly to avold stressing the CMOS circuitry.
The pliancy of the DMD hinges of ~er6 another design variable to be considered in the implementation of a reliable operational ~node of the type jU6t described, sincc - ` ` ,5 ~L~more pliant hinges require lower bias voltage and lower latching potentials~
This method r~quires the additional feature of a randomly addressable CMOS
6tructure to select individual DMD cells for rewriting. Since the DMD CMOS
a/ddressing array is typically an SRAM or DRAM memory array, this is not difficult ' _ to implement. Word and bit decode and address features to accomplish this are well known in the art. Since hard copy DMD device~ are typically configured as YeTy long arrays with ~airly 6hallow columns, (e.g. 16 to 128 bits) the x-y addressing is not complicated.
This implementation has the advantages of simplifying addressing bandwidth problem~ snd reducing DMD operating cycles when only small portions of the data ; array are changing. For printing applications it has the further advantage of - 20 resolving the artifacts associated with ~inary PWM, or the practical addressability limitation~ of linearPWM.
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character~stic6 of the DMD, consider a group of four pixels used to emulate gray scale. Consider four adjacent pL~cels w~th which four di~ering exposure sequences are represented, as shown on line 18 in Figure ;Lt~. At the starting point for the line, all four pixels would be on. The first could represent the most significant bit of the 5 group 18a, meanirlg that it would stay on the longest. At the first pu16e of the reset line 12, the electrode state for the three higher bits, 18a, 18b, and 18c has not changed, but the lower,~ order pi~cel 1~d, would be 6witched OFF. The next bit switches OFF at the s~cond pul6e, aT~d the third at the third pulse. Finally, the last ~- - bit, the pixel under consideration, receives it new ~ata corresponding to the rlext 10 printing line along with an update of the other pixels, and the process begins over aga~n.
In this manner, the time o~lerhead taken to accomplish gray scale by pulse width modulation is con6iderably improved. This allows the line times of a competitive page per minute rate to be maintained, and adds additional control over 15 the number of gray scale levels accomplished. The tunin`g of the voltages also allows for an easier manipulation of ~hg data to accomplish the appropriate images.
- Manipulating the data with respect to timing can also be applied in the ` resolution enhancement of an image. One of the largest problems in resolution i ~ .
enhancement w~th spatial light modulator printers results from the cells' images 20 being tran6ferred to paper. Even on high resolution page printers, the print images show a staircase efEect on the curved edges. This occurs because the cells are approximately square, and are gtairca~e~to try ~o fill the curve. ~
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A typical layout of a spatial light modulator a~Tay is shown in Figure 2a. Pixel20a is centered about horizontal line 24 and vertical line 22a. Movin~ to the nght, the pixels on line are successively centered lines 22a, 22b, etc. The print image resulting from column 22a with data loaded in 8tandard ways i6 shown in Figure 2b.
The image of the first three pixels from the array of Figure 2a is transferred to srea 26 on Figure 2b.
Figure 2c shows one way to modify the stairca6ing ef~ect at the edge of a print image 29. The top pixel 20 from the array receives its data at a later time. Thedrum continues to rotate and the pixel imag~occur~ at an offset position 30. As the next pixel images are transferred, the bottom of the pixel becomes part of the image of the next standard timed pixelg 29. This allows manipulation of the pixels' vertical e~tent to permit the detailed ~dges of print features to be represented on a much finer step. Taken, for e~ample, to an eight step delay, the curve would appear as a ~' series of pixels that have the size of the previous pixel, minus 1/8 of its height. This is ~hown in Figure 2d. Selective readdressing of pixels is thus used to move edges of a pnnted object on an addre6~ g~d that is finer than the resolution of the " individual e]ement in the process direction. -- One limitation on Figure 2 is the positioning of the centroid of the pi~els. All of the differently sized pixels remain centered on the same x-y gnd as the standard sized pixels. Many ways exist to achieve resolution enhancement along the direction ;; of the SLM array, to complement the resolution enhancement just described in the ~;
process direction. One of these would be to maintain the current standard of 300 TI-1~964 Page 23 ~ -.~

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dots-per-inch (dpi), when printing easily resolved features, then switching to a higher dpi horizontal mode when printing curves or fine featured objects. An array of spatial light rnodulators ~.at would accomplish this is shown in Figure 3. By se~ecting the appropriate row, ~che edge of a feature m~y be incrementally offset in the 5 horizontal direction, much the same as it was offset in the vertical or process direction by timing changes as described in Figure 2.
The standard pixe140 of Figure 3 remains the same 6ize. The row of pixels 401 starting af~er pixel 40 moves to the right an incremental distance. For example, if 900 dpi is the desire, then the ne~ row of pixels needs to be at a V3 pixel of~set from the first row, shown here as distance 42. Distance 44 then, equals 2/3 the width of the standard pixel, a~ the row starting with pixel 402 moves an additional V3 from the previous row. There is no limitation on how the rows can be offset from each other. The 6ystem may require the indented row to happen first, then the standard, then another indented row. Additionally, the designer may deem it necessary to have more than ons row. at any given of ~set.
The addressing circ~try for these pixels is the same as for the regular array (see Figure 2a) The printer corltroller dete~ines when a delayed edge is necessary to more exactly repre~ent a feature, and delays the data for the line until line 401 or 402, etc., aligns with the latent image location on the OPC.
A printed line resulting from this ~fFset technique is shown in Figure 4. The first two pri~t features are illustrated by pixel line 50. The gap 52 between the features results from a nominal 2 pixels' width gap in the print exposure. However, Tl-16964 Page a4 JUL 21 ' 94 2:47 214 995 3170 PAGE.026 . . , , . - . . .

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the third aspect of the feature 54 is printed by the pixels of row 401 (from Figure 3) which is of ~set by distance 42, equalling 1/3 the width of the standard pixel. Another gap in the line then occurs, ~ollowed by the 2l3 of ~set gap 44, e~posed with DMD row 402 (from Figure 3). At pi~el row 46 the procsssor determined it needed to go back 6 to the pi~cels that were not of~set, row 400, resulting in the non-integer gap 47. Line 56 shows the xesultant image transferred to the paper. Line6 designated L represent the unadjusted pixel addressability grid corresponding to row 400 (Figure 3).
An even more desirable method of ma~l~p~lating the printed feature size is to physically change the pixels in the DMD array to be shorter, narrower or unifonnly 10 smaller than the resolution gr~d defined for the pnnter. This is shown in Figure 5.
The standard pixel 20 will be referred to as being cf size 1. In this example, the r~duction occurs in quarter gize decrements, but this method is not li~nited to this particular setting. Pixel 34 has .75 the linear dimension and .5 the area of pixel 20.
Similarly, pixel 3B has .25 the size, and pi~el 38 has .0625 (1/16th) the area. These 16 ~maller sized pixels are conceivable for just about any modulator, with the number of rows and columns of each si~e lim~ted o~ly by the application for which they will -be used. For example, the designer may decide to have three rows of each sized pixel.
Obviously, the advantages of the above methods could be ~ombined to ~ :
accomplish the even more powerful feature set of both horlzontal and vertical ~ -resolution enhancement with gray scale imaging. An array that can accomplish timing delay (vertical of~set), variable pixel sizes, shapes and grid locations and horizontal of~set, is showninFigure 6.

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The standard size pixel 20 centered about the regular x-y gnd (lines 22 and 24 of Figure 2a) i6 ~hown as refierence. Pixels s8a and 58b illustrate half-sized pixels offset to align with the edges of pixel 20. Pixels 5~a and 58b can be operated independently or in concert to simulate a rectangular pixel element at the expense 5 of increased complexity and addressing circuitry. Because the electrophotographic process motion blur~ a pixel im~ge in the process directions, a purely rectangular pixel would have optical advantages. Pixels 60a and 60b demonstrate the rectangular-sized pixels and timing delay, wlth pixel 60b aS the image of the pixel if it we~e ~d~layed half a dot line. Pixels pairs 6~a-b and 64a-b shown that the smaller 10 pixels could be shifted left or right to match the left or right edges of the standard pixel. The pairs show 3/4 and V4 pixel6, but could be any size of pixel that fits into the width of the standard pixel 20. Typically, the designer would not place these pixels in such a random manner, but this figure shown the various combinations of ` the above methods.
`` 1~;The question now arises as to the manufacture of such devices. Obviously, the manufacture of such an array would be difficult for most modulators. While this is ~i true, it i9 concei~able that any of the above-mentioned modulators could be adapted ~' to result i~ s,uch an array. One modulator that is especially adaptable to this type of array is the digital micromirror device (DMD), particularly in its hidden hinge ~0 architecture.
The manufacture of DMDs is get forth ~n U.S. Patent No. 5,061,049, is6ued on . .
October 29, 1991, manufacture of the double-level DMD is set forth in U.S. Patent .
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5,083,857, issued January 2~, 1992, both of which are incorporated by reference herein. A silicon substrate has digital addressing circuitry manufactured by conventional CMOS methods, and subseqt.~ently electrodes are deposited on it that connect to the CMOS. These electrodes are then covered with an organic material 5 that is removable via a plasma etch. Vias are cut into the organic material and a first layer o~ metal is deposited over it, filling the via~, after which it is patterned to form support posts. A second layer of metal is then deposited and patterned to form the mirror elements. Then the entire structure is etched to remove the organic matenal, leaving mirrors suspended over the electrodes. suMor~ed by the posts.
10 Many vanations on this proce~s occur, including one where the mirror are supported by remnants of the organic mater~al, not by posts.
The hidden hinge architecture is another adaptation of this b~sic proce~s. A
prior art picture of a hidden hinge DMD i~ shown in Fig"re 7a. The substrate 66 has the original layer of electrodes such as 71 upon or in it. The organic matenal 15 originally resides in the layer shovrn by gap 73. The metal layers, shown by 68a and , 68b then remain separated from the electrodes by the spacer layer. At this point, the ~ -- original DMD would be complete. The hidden hinge is an adaptation of that proces~
with an added layer. In the hidden hinge embodiment the electrodes 70a and 70b are raised abo~re the substrate by gap 73, and now have what would have been mirror 75 20 in the original single level structure co~,nected to them. A second layer of organic material is applied o~ler thig raiged electrode layer, a via is formed to meta~ layer 68b and another layer of metal is depo6ited to form a post 72 and the second-level mirror .. ~
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74. The second-level mirror is typically forr~led on the central area of the origin~l rllirror 75. The resultant structure i6 a mirror element 74, suspended over an air gap 76, after removal of the first and second layers of organic material, from above and below the electrode/mirrors ~8a-b, which in turn are separated from the address 5 circuitry by an air gap 73.
An additional adaptation that o~ers fiurther advantages separates the first layer of metal 68 from the clectrodes 71 without using layer 68 as electrode6 as in the above example. A conventional DMD structure is fabricated in metal layers 68, complete with hinges, 6upport posts and electrodes which remain at level 71. In this 10 method, the address pulse6 actuate the first-level mirrors for addressing and air gap 73 uniquely dete~ines the deflection angle. This separates the electronically active Iayer from the optically active layer, which is the second-level mirror 74. An additional advantage of this arrangement is that it is manufacturable with a uniform ' ~ air gap 73 and a second uniform spacer thickness resulting in air gap 76, while 15 permitting variable mirror dimensions to operate at the same rotation angle. This .
is shown in Figure 7b.
The main advantage of this embodiment of the digital microm~rror lie3 in the . placement of the second level mirror3. The second level mirrors, since they are not ;: cor strained to be addregsable, can move relative to the central post placement, and 20 can be different size~ as suggested in Figures i5 and 6. A side view of this embodiment is shown schematically in Figure 7b. Addressing electrodes 70a-b address the conve~tional first-level mirror 7~, which has post 72 on it, corresponding ;` JUL 21 ' 94 2: 50 214 995 3170 PAGE . 030 07-21-34 01:33A~ PROM r I LEGAL DEPAR~MEN~ ~O KIRBY, EADES,GAIE... P031/048 21~7~

to the spacer layer and ensuing air ~ap between electrical layer element 7~ and optical layer elements 74 and 77. The entire ~MD array consists of uniformly sized electncal ele~ents 76 that operate identically to angles ~ ~ in response to control BigIlalS on electrodes 70a-b, and mirror 7~. The optical elements 74 and the surrounding flat, specular metal surface 77 are supported on posts 72 and 78 respectively. The optical elements 74, regardless of size, location or geometry, ride along with the control element 7~ to a precise ~ ~ deflection angle. The inactive, fill-in metal str~cture 77 prevent ligElt from imping~ng on the lower mirror elements 75 and entenng the optical system.
It is po~sible ta fill the fir8t level vias with a planarizing material 80 and pennit the fabrication of gecond level via 78 directly above the first level via. In a~other configuratiorl, ~hown in Figure 7c, the posts supporting the non-modulating metal light shield 77, can be located as shown by 81, away from the active control element75,andnotdirectlyovervia72. Figure 7c shows a top view of the structure and two samples of alternative optical pixel element sizes and locations 82, 83. ~he hinges 84 are shown attached to vias 72, possibly with plan~rizing filler 80, that suspend the oct~gon shaped control elements 75 above control electrodes (not shown).
The cross-hatched sample of non-operating optical level metal 77 is necessary to shield the control level pixel structure from the optics. It is supported on v~as 81 or 78 (Figure 7b) depending on design considerations.
~: Pixel elements 82, in the first two rows, are rectangular (diagonally shaded) ..
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01-21-94 01:33AM FRO~ T I LEGAL DEPAR~MEN~ ~0 KIRBY, EADES,GALE .. P032/048 - ` 21 2~7~ -optically active portior s of the array, attached to lower elements 7~ by vias 72. As a second e~ample, in keeping w~th Figure 5 ar~d 6, half-gized pixels (diagonally shaded) 83 are arrayed along four rows of operating elements 75 and staggered off-center to align with cell boundary edge6. The combinstion of the four elements 83, when electronically re-interlaced, can be aligned to form a line image at twice the resolu~ion of the basic control elemënts This is constrained to meet electrical operating requirements. 13lements 83 also correspond to the concept ~hown in Figura 6, 64a and 64b.
Figure 7c shows a honzontal hinge array for simplicity, but the approach is 10 compatible with 45 degree hinges or any other angle of orientation.
Many other combinations, as di9cussed earlier, could be implemented on this structure. Since the electrostatic force constra nts in achievislg deflection are handl~d r ~~ by the first-level mirror, the second-level mirror3 have many more optical imaging possibilities with fewer, if any, constraints. The separation of optical requ~rements 15 from addressing and electr~cal operation requirements is a major advantage.
Once aIl arrsy is manufactu~ed th8t allow6 all of these possibilities, higher resolution printing with gray 6cale is possible. Fig~re 8a shows the result of a standard 300 dpi plinter implementation of a print feature. The desired print feature is shown in dotted lines. As can be seen by this drawing, there are numerous 20 resolution related defects that reduce the re801ution of the image. Artifact6 labeled with the number 78 constitute indentations that cannot currently be resolved.
Protrusiorls 76 represent the artifacts that haYe the opposite problemt where the .~ .

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pixels were too big to fill a gap in the image w~thout extending beyond it6 limits.
These artifacts are resolved in Fig~re 8b. The pixels that are cross-hatched, 80 and 82, are those that are dif~erently sized pixels, either .76, .5 or .25 times the standard pixel si2:e. The dotted pix016 86 are those that wcre timing del~yed and 5 therefcre appear to be shi~ed vertically. The pixels 84 filled with a cross pattern are those that were horizontally offset. Additionally, as discussed previou31y, any combination of the above could occur. For example, pixel 80 is not only a .5 6ize pixel, it is also horizontally off8et to meet thAt corner. Pixel 82 is a .25 size p~xel that could additionally be offset vertically by timing delay. Not shown is gray scale, which 1O can also be implemented with this array as discussed previously. In this example, gray scale could be u~ed to further enhance the appearance and outline of the printed : féature. It has the further advantage of simulating true gray scale images by use of density modulation by pulse width control, or area modulation, at no reduction in linear resolution, achieved by using the smaller 'gub-pixels' shown in Figure 5.
15An ASIC reformatter chip, possib~y incorporated on board the DMD, would provide the necessary data path control switching and the appropliate delays to operate thi-s array. The processor would also have to decide which type of row, whether one of differently sized pixels, or hor~zontally offset, or standard, would receive that particular part of the data stream. Further, the processor would need ; to decide if the feature requires 300 dpi or 9OO dpi, or whatever e~ective offset dpi is accomplished by the final gelection of a~Tays T}~e appropnately encoded data would be decoded at the DMD in terms of timing, position or pixel size to achieYe the . .
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desired printed feature. I~e proce6Bor wo~lld also be necesgary to monitor the re~et process to achieve the approp~ate le~lels of gray.
This allows the system to talce advant~ge o~ all possibilities for higher quality printing: gray scale, timing delayed data, horizontally offset pixels, and differently 5 sized pi~els.
Thus, although there has been described to this point particular embodiments of method~ for higher quality printing, it is not intended that such specific referenc~s be considered a~ limitations upon the scope of this invention except in-so-far as set forth in the following claim9. :~ t.

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Claims (16)

1. A method of high resolution printing, comprising:
a. processing and analyzing the data to alter the final image by at least one of three methods, said methods comprising:
i. time-delaying the image data to achieve finer vertical control over print images;
ii. horizontally offsetting pixel images to achieve finer horizontal control over print images; and iii. using pixels of fractional sized to achieve finer control over filling in print image.

2. The method of claim 1 wherein said method also includes a method of achieving gray scale.

3. A method of gray scale printing, comprising:
a. loading data onto the addressing circuitry for each cell of a spatial light modulator to actuate a predetermined number of said cell;
b. activating said predetermined number of cells;
c. selectively deactivating selected ones of said predetermined number to reduce the exposure amount of a photosensitive surface, thereby achieving gray scale; and d. repeating said deactivation until a desired shade of gray is obtained.

4. The method of claim 3 wherein said spatial light modulator is a digital micromirror device.

5. The method of claim 3 wherein said spatial light modulator is a double-level digital micromirror device.

6. A method of resolution enhancement comprising delaying sending data to activate the cells of a spatial light modulator to selected ones of said cells to achieve finer control of pixel image size on a photosensitive media in the vertical direction of the image.

7. The method as claimed in claim 4 wherein said method also includes horizontally offsetting the pixels of an array to achieve a multiple of the original dots-per-inch resolution, by offsetting said pixels in fractional increments of the horizontal direction, and a method for achieving gray scale.

8. A method of resolution enhancement comprising horizontally offsetting the pixels of an array to achieve a multiple of the original dots-per-inch resolution, by offsetting said pixels in fractional increments of the horizontal direction.

9. The method as claimed in claim 8 wherein said method also includes using pixels of a fractional sizes of a standard pixel to fill in regions of the print image where standard pixels leave objectional artifacts, and a method for achieving gray scale.

10. A method of resolution enhancement, comprising using pixels of fractional size to fill in regions of the print image where standard sized pixels leave objectional artifacts.

11. The method of claim 10 wherein said method also includes a method for achieving gray scale.

12. A spatial light modulator array with and optically active level and an electrically active level comprising:
a. spatial light modulator cells of a standard size centered about an x-y grid;
b. spatial light modulator cells of fractions of the standard size centered about an x-y grid;
c. spatial light modulator cells of fractions of the standard size horizontally offset from said cells centered about said x-y grid; and d. spatial light modulator cells of standard size horizontally offset from said cells centered about said x-y grid.

13. The modulator of claim 12 wherein said modulator is a digital micromirror device.

14. The modulator of claim 12 wherein said modulator is a double-level micromirror device.

15. The modulator of claim 12 wherein optically active level and said electrically active level are separate levels.

16. The modulator of claim 12 wherein all of said cells, regardless of size, can be uniformly deflected to substantially the same deflection angle.