CA2125611A1

CA2125611A1 - Power on system

Info

Publication number: CA2125611A1
Application number: CA002125611A
Authority: CA
Inventors: Mark A. Taylor; Samson K. Toy
Original assignee: Mark A. Taylor; Samson K. Toy; Tandem Computers Incorporated
Current assignee: Tandem Computers Inc
Priority date: 1993-07-02
Filing date: 1994-06-10
Publication date: 1995-01-03
Also published as: JPH07146721A; JP2863090B2; KR950003945A; AU6480594A; AU676898B2; US5834958A; CN1102478A; EP0632278A1

Abstract

IMPROVED POWER ON SYSTEM

ABSTRACT OF THE DISCLOSURE

A supply voltage monitor for providing an indication of a supply voltage level considered safe for electronic circuit operation includes a supervisory or guard circuit that blocks the output of the monitor in favor of a secondary output for those periods of time when the monitor is considered to not be able of providing a valid reflection of supply voltage status.

Description

;~. 5 ~: BACXGROUND OF THE INVENTION
The present invention relates generally to circuits -; ~or monitoring a supply voltage to provide an indication o~
'.~ that the monitored voltage has reached a certain minimum value , 10 su~ficient ~or operation of other electronic circuitry, or ~; that the supply voltage has not dipped below that minimum.
~ore particularly, the invention relates to an improved "power on" circuit capable of providing a valid indication of the state of a supply voltage during the initial stages of supply voltage application.
Power on (PON) circuits are commonly used to provide ~: an indication that a supply voltage is at or exceedS a certain minimum speci~ied value. The indication allows el~ctronic ~: circuitry operating from the supply voltag~ to be held in an ,~ 20 ofX (non-operating) condition until the supply voltage has ,~ r~ached a voltage level that ensures reliable operation of the r",'` lectronic circuitry. Alternatively, the indication may be used to reset the electronic (e.g., digital) circuitry, !~', allowing it ~o begin operation from a known state when the }-.! 25 supply voltage is known to hav~ achieved a voltage level sufficient for operation.
A variety of PON circuits capable o~ performing the supervisory functions outlined above ar~ available.
Unfortunately, th2y are not capable of guaranteeing the validity of the indication o~ their supervisory operation until the supply voltag~ has reached at least 50~e minimum voltage lev~l Se.g., approximately 3 volts DC); that is, ~or a short period o~ time following application o~ pow~r to an ele~troni6 syste~, while the ~upply voltage is building toward its specifi~d voltag~ lev~l (e.g., 5 volts), ~he PON circuit . is unable to pxovide a valid re~l~ction of the status o~ that supply voltag~ and m~y, in fact, indicat~ ~hat a valid operating voltag~ level exist~ when, in ~act, it does not.
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2 212a611 In turn, an erroneuus indication of a valid supply voltage, during this initial power-up, could cause a digital system, for example, to attempt operation to write incorrect and indeterminate data to a non-volatile memory. The problem would not be discovered until som~etime later, manifestin~
itself in, perhaps, a system failure when the inde~erminate . data is attempted to be us66ed.
There have been at~empts to add to commercially . available PON circuits ext6srnal guard circuits that Couple the ~J~ 0 indication of the supply voltage to the operating electronic circuitry, inhibiting it until the supply voltage reaches a level at which th6~ PON circuit can provide a valid reflection of the supply voltage. However, such guard circuits have been found to be unreliable.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to an external guard circuit that, although operable by itsel~, is prefsrably used with a conventional, of~-the-shelf supply , 20 voltage monitor, to ensure that a valid indication of supply voltage status is reflec~ed, even during the period of time .. `~ when the supply voltage monitor is no~ yet able to provide ~- such valid indioation.
,-, i` Broadly, the guard circuit operates, in conjunction with the supply voltage monitor, to block the output of the ,~ supply voltage monitor, supplying instead an indication of supply voltage sta~us. When the supply voltage has reached a level at which proper operation of the supply voltage monitor E~" can reliably operate, guard circuit will convey the voltaye status reflected by the supply voltage monitor.
,~ In the preferred embodiment of the invention, the guard cir~uit includes an output transistor that i6~ coupled to communicate an indioation of supply voltage statu6s provided by a conve~tional supply vol~age monitor to an output terminal.
-~ 35 Initially (i.eO, at supply vol~ag6a levels below a ~-1 predetermined le.v~l), the ou~put transistor is held in a non conducting state by a shunt regulator, blocking whatever supply voltage status indica~ed by the supply voltage monitor, ;
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!, 3 2 ~ 2 5 6 ~ 1 providing instead an indication that the supply voltage has not reached, or is below, a voltage necessarv for valid : circuit operation. The shunt regulator is coupled to the supply voltage, and is conf igured to conduct when the supply ': 5 voltage reaches a predetermined voltage level that is suf~icient for operation of the supply voltage monitor.
Conduction of the shunt regulator causes the output transistor : to communicate the supply voltage status provided by the supply voltage monitor to the output pin. From that point on, ~`10 and as long as the supply voltage is above the predetermined voltage level sufficient ~or operation of the supply voltage monitor, the supply voltage monitor controls the supply voltage status indication that appears at the output terminal.
h During the initial stages of a power-up, when the 15 supply voltage has not reached a voltage level at which the ~- conventional supply voltage monitor is capable of providing a valid output indication of supply voltage status, the output transistor is held in a non-conducting state to provide a secondary indication at the output te~minal that the supply ~-~20 voltage has not yet reached the predetermined, safe level, regardless of what the conventional supply voltage monitor indicates. When, however, the supply voltage has reached a voltag~ level at and above which the conventional supply voltage monitor can correctly operate, and give a valid 25 indi~ation o f supply voltage status, the shunt regulator conducts. With the shunt regulator in conduction, the ~.
secondary indication is controlled by the outpu~ of the . conventional supply voltage monitor. When the supply voltage reaches the predetermined voltage at wAich safe operation of o~her electronic circui~ry is ensured, the conventional supply voltage monitor will so indicate, and tha~ indica~ion will be passed to the output terminal oP the guard circuit.
aong the advarltages achieved by the present invention is that during the initial stages of power up ~i.e., 3S when the supply voltage is first applied), the status of the ~i supply voltage is validly reported.
~`', J In addition, the guard circuit is configured so that . it can be used with appropriate threshold adjustment without a ~::

212561 ~
conventional supply voltage monitor to perform the monitorin~
functions, albeit wi~hout the features provided by conventional monitors.
~: These, and other advantages and Peatures of the present invention, will become apparent to those skilled in the art to which the invention pertains upon reading o~ the following description of the preferred embodiment, which should be taken in conjunction with the accompanying drawings.
:
. 10 BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a schematic diagram of supply voltage . " monitor system incorporating present invention; and Fig. 2 is a time-voltage diagram, illustrating the "; operation of the monitor system shown in Fig. 1 as the supply voltage rises ~rom an initial (no voltage) appl.ication.

~`~ DESCRIPTION OF THE PREFERRED EMBODIMENT
Turning now to the figures, and ~or the moment specifically to Fig. 1, designated generally with the reference numeral 10 is a monitor system constructed according to the present invention for monitoring a supply ~` voltage (Vcc). As shown, the monitor system 10 includes a commercially available supply voltage monitor Ul coupled to the supply voltage Vcc. An output terminal 12, connec~ed to ~$~ 25 an open collector output of a transistor Ql of the supply voltage monitor, is connected to a base lead of a PNP
transis~or Q2 that forms a part of a guard circuit 14. The emitter terminal o~ the ~ransistor Q2 connects to the supply voltage Vcc ~hrough resistor R2, and the collector of the transistor Q2 connec~s to a ground (~) potential through resistor R6. A~ the junction between the collector of the transistor Q2 and the resistance RS is an outpu~ te~minal O
whereat a power on (PON) signal i presented to indica~e th~
~- supply voltage has reached and/or exceeded a voltage level deemed a safe operating voltage. As will be seen, the PON
~; signal is a s~condary indication of the supply voltage status , during the initial stages o~ power-on. ~hen the supply : voltage reaches a voltage l~vel at which the supply voltage ~ .

-, ~ , ~. , -~ : .- -~ 5 212~611 monitor Ul is considered to be able to ~ive a valid :~; indication, the PON signal will follow the indication supplied at the output 12.
The output terminal 12, is also connected to one texminal o~ a resistor R3; the other termi~al of the resistor R3 connects to the junction between a resistor Rl and a shunt : regulator U2. As can be seen, the resistor Rl and the shunt regulator U2 form a series circuit between the supply voltage Vcc and ground potential G.
The shunt voltage regulator U2 includes a control pin 14 that connects to a voltage divider network consisting of resistors R4 and Rs. ~esistors R4, R5 form a series path between the supply voltage Vcc and the ~round potential G to ` develop between ~hem a control voltage that is indicative of the supply voltage Vcc.
~ The supply voltage monitor Ul is an o~f-the-shelf .~i item that is manufactured by T~xas Instruments of Dallas Texas, and sold under the Part No. TL7702. It ha~ two open collector outputs, one as shown in Fig. 1 (i.e., Ql), and the other formed by the collector of an NPN transistor. The present invention is shown uses the open collector output of the PNP transistor. The monitor Ul operatas to monitor the supply voltage Vcc, turning on the transistor Q1 to it to source current when the supply voltage Vcc is below the predetermined voltage level. When the predetermined voltage level is reached by the supply voltage, the transistor Ql is tur~ed off.
At low levels of supply voltage, however, such as during, for example, the time that the supply voltage is initially applied, the monitor Ul may not be able to correctly reflect the s~atus o~ the supply voltag2 Vcc, i.e., it is ::: indeterminate. It is the function, therefore, of the guard . ~` circuit 14 to obviate that indeterminacy and ensure a proper . ~ reflection of supply vol~age s~a~us during low levels (e.g., during initial turn-on or power-up) of the supply voltage.
operation of the monitoring system lO, and in particular the guard circuit 14, will be understood with refexence to Fig. 2, in which a waveform 20 portrays the rise ~`
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`' 2~6~1 of the supply voltage Vcc over time, beginning at an initial time to when the supply voltage was essentially zero volts.
The waveform 22 depicts the state o~ the transistor Ql o~ the X~ monitor U~, showing that for an initial period of time (to to t1) the output 12 from the collector of the transistor Ql is ~;~ indeterminate, in the sense that it can be in an stat~ (i.e., conducting or non-conducting). This indeterminacy is - indicated on the waveform 22 by the cross-hatched area 23.
However, when, at time T1, the supply voltage vcc reaches the voltage level v1, output 12 of the monitor U1 can ~e relied upon, i.e., it now supplies a valid indication of the status of the supply voltage.
r: ~ The waveform 24 shows the voltage level at node A.
When the shunt regulator U2 is not conducting, the voltage level at node A will be pullPd up toward supply voltage level.
The values of the resistors forming the voltage divider network R4/R5 are selected so that the shunt regulator will ~, no~ conduct until the supply voltage Vcc reaches and/or ;'t ~ exceeds a voltage level v2. Thus, during the time period to ~
tl, and regardless of the conduction state o~ the transistor Q1 of the monitor U1, since there is no curren~ path to the ground potential at the base of the transistor Q2, the base will be pulled up toward the supply voltage Vcc, and the ~, transistor Q2 will be in non-conductio~. The collec~or of the transistor ~2 will, therefore, be pulled toward the ground potential G, and the PON output signal will be in a non-asserted state as illustrated by the waveform 26.
When, at time t1, the supply voltage Vcc has reached a first voltage level V1, the monitor Ul (validly) turns on the transistor Ql to that it can source current. The monitor Ul can now validly control the t~ansistor Q2. However, the level of the supply voltage ic still below that needed to place the shunt regulator in sonduction. Thus, the transistor Q2 remains cut of~ for lack of a current path.
~- 35 At time T2 the supply voltage Vcc reaches a voltaga level V2, and the shunt regulator conductsO The voltage at node A (waveform 24) will drop toward the ground potential, and ~he base of the transistor Q2 now has a current path to ,~

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~,~ the ground potential - through the shunt regulator U2.
~: However, the open c~llector output of the. monitor Ul, being set to trip at a higher voltage level ~V3) will continue to source current, keeping the transistor Q2 ~rom conducting because of the increased voltage drop across R3.
At time t3, when the supply voltage Vcc reaches a ~" vol~age level of v3, the device Ul twhich has been programmed to trip a~ the v3 level) will turn off the transistor Ql. The shunt regulator U2 alone continues to conduct, and pull~ the base of the ~ransistor Q2 toward ground, and placing the transistor in conduction. ~he current through the resistor R6 ~: asserts the PON signal, indicatirlg that the supply voltage has now reach2d and/or exceeded the predetermined voltage level (e.g., V3) considered appropriate for other electronic circuit operation.
. The foregoing discussion of the operation of the supply voltage moni~oring system 10 illustrates two important points of the present invention. First, even when the supply voltage is at a voltage level insuf~icient for proper operation of an of~-the shelf monitor, the PON signal remains validly un-asserted. Second, two voltage levels must be reached and/or exceeded by the supply voltage before PON is ~; as~ert~d to reflect an in-regulation status o~ the supply voltage, the voltage level v2 to cause the shunt regulator to conduct, and the voltage level v~ at which the device U1 is programmed to indicate the in-regulation ~tatus of the supply voltage.
~ The shunt regulator U2 is preferably a programmable ; precision reference, manufactured by Motorola Semiconductor, and sold under the part number TL431. The monitor system 10 ` was designed to opera~e to monitor a nominal supply voltage of 5 volts DC. The voltage divider resistor (R4/R5) were :~ selected to cause the shunt regulator to conduct at about 3.8 - volts, slightly `above the voltage level for which the mo~itor Ul is guaranteed to provide a valid output~ ~he monitor Ul wa programmed to asser~ an indication of safe supply voltage wh~n the supply voltage lavel reached or exceed~d approximately 4.85 volt~. Res;istor values are:

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Rl: lOK ohms R4: 1.07K ohms R2: 470 ohms R5: 1.58K ohms R3: lK ohms R6: lK o~ms In sum~ary, there has been disclosed a power-on ~ 5 circuit capable of validly re~lecting the status of the out-:~ of-regula~ion state of a supply voltage at low voltage levels.
It will be recoynized by those s}cilled in this art that while the opera~ion of the invention has been described in terms o~
a rising supply voltage, the invention will perform in the same manner as described for a fzllling supply voltage. Thus, if after having reached and/or exceeded a valid supply voltage level, and having been indicated as such assertion of the Po~
signal, the supply voltage drops to a level insuf~icient for circuit operation, the monitor Ul will turn on the transistor Ql to cause it to begin sourcing current. This, in turn, will ;~ turn off transistor ~2, de-asserting the PON signal to indicate that the supply voltage has dropped below the level considered safe ~or operation.
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Claims

1. A power on system for monitoring a supply voltage to provide an indication that the supply voltage has achieved a desired value relative to a second voltage level, the system comprising:
first circuit means, including an output, coupled to receive the supply voltage to assert a first signal at the output indicative of the supply voltage reaching a first value; and second circuit means coupled to the output of the first circuit means and to the supply voltage to provide the indication when the supply voltage has reached a second value when the first signal is asserted.

2. The power on system of claim 1, the second circuit means including a shunt regulator means coupled to the supply voltage and to shunt the output terminal and to the output to shunt to output to the second voltage level when the supply voltage exceeds the second value.

3. The power on system of claim 1, wherein the first circuit means includes transistor means having a base terminal coupled to receive the first signal, the shunt regulator being coupled to the base terminal, the transistor means operating to conduct to assert the indication when the shunt regulator means forms current path to the second voltage level.

4. A circuit for supervising a supply voltage to provide an indication that the supply voltage exceeds a desired voltage value relative to a predetermined voltage level, the circuit including circuit means coupled to receive the supply voltage, the circuit including first transistor means having a collector terminal whereat is provided a signal indicative of the supply voltage assuming a first voltage value, the improvement comprising:

a second transistor means having a base terminal coupled to the collector terminal of the first transistor and to the supply voltage; and shunt regulator means coupled between the base terminal and the predetermined voltage level to provide a current path from the base terminal to the predetermined voltage level when the supply voltage assumes a second voltage value;
wherein the second transistor means is caused to assert the indication when the supply voltage exceeds both the first and second voltage levels.

5. The improvement of claim 4, wherein the second predetermined voltage is a ground potential.

6. The improvement of claim 5, wherein the supply voltage varies between the ground potential and a positive voltage level.

7. The improvement of claim 4, wherein the second transistor has a collector terminal coupled to the supply voltage, and an emitter terminal; and including resistance means coupling emitter terminal to the base voltage, and an output terminal coupled to the emitter terminal whereat the indication is provided.

8. The improvement of claim 4, wherein the desired voltage level is between the first and the second voltage levels.

9. The improvement of claim 4, wherein the desired voltage level is approximately equal to the first voltage level and between the predetermined voltage and the second voltage level.

10. The improvement of claim 4, wherein the desired voltage level is approximately equal to the second voltage

11 level and between the predetermined voltage and the first voltage level.

11. A supervisory circuit for monitoring a supply voltage and for asserting an output signal when the supply voltage has reached and/or exceeded a predetermined voltage level, the supervisory circuit comprising:
an output terminal whereat the output signal is provided;
transistor means coupled to the output terminal for asserting the output signal, the transistor means including a base element; and shunt regulator means coupled to the supply voltage and to the base terminal for conducting when the supply voltage has reached and/or exceeded the predetermined voltage level;
whereby the transistor means is placed in conduction to assert the output signal when the shunt regulator means conducts.

12. The supervisory circuit of claim 11, wherein the transistor means is a PNP type transistor having an emitter lead coupled to supply voltage.

13. The supervisory circuit of claim 12, wherein the predetermined voltage level is positive, and the PNP
transistor includes a collector lead coupled to a ground potential through a resistive element.

14. The supervisory circuit of claim 13, wherein the output terminal is coupled to the collector lead of the PNP transistor.

15. The supervisory circuit of claim 14, wherein the base lead of the PNP transistor is coupled to the supply voltage through a series configuration of first and second resistors, the shunt regulator to a junction between the first resistor and the second resistor.

16. A supervisory circuit for monitoring a supply voltage and for asserting an output signal indicative of the supply voltage reaching and/or exceeding a predetermined voltage level relative to a reference potential, the supervisory circuit comprising:
transistor means for asserting the output signal, the transistor means including a base lead, an emitter lead coupled to the reference potential by a first resistor, and an emitter lead coupled to the supply voltage by a second resistor;
an output terminal coupled to a junction between the collector lead and the first resistor; and a shunt regulator means having a cathode lead coupled to the supply voltage by a third resistor and to the base lead by a fourth resistor, an anode lead coupled to the reference potential, and a control lead coupled to the supply voltage;
whereby, when the supply voltage reaches an/or exceeds the predetermined voltage the shunt regulator is caused to conduct to cause the transistor means to conduct to assert the output voltage, the transistor means and the shunt regulator being in a non-conducting states when the supply voltage is between the predetermined voltage level and the common voltage level.

17. The supervisory circuit of claim 16, including a voltage divider means coupled between the supply voltage and the common voltage level to develop an indication of the supply voltage, the voltage divider means being coupled to provide the indication of the supply voltage to the control lead of the shunt regulator means.

18. The supervisory circuit of claim 17, wherein the voltage divider means includes fifth and sixth resistors connected in series circuit configuration, the indication of the supply voltage being provided at a junction between the fifth and sixth resistors.