CA2093042A1 - Apparatus and method for downloading programs - Google Patents
Apparatus and method for downloading programsInfo
- Publication number
- CA2093042A1 CA2093042A1 CA002093042A CA2093042A CA2093042A1 CA 2093042 A1 CA2093042 A1 CA 2093042A1 CA 002093042 A CA002093042 A CA 002093042A CA 2093042 A CA2093042 A CA 2093042A CA 2093042 A1 CA2093042 A1 CA 2093042A1
- Authority
- CA
- Canada
- Prior art keywords
- programs
- memory
- processor
- communication
- epnew
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/34—Network arrangements or protocols for supporting network services or applications involving the movement of software or configuration parameters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/40—Network security protocols
Abstract
APPARATUS AND METHOD FOR DOWNLOADING PROGRAMS
Abstract A modified version of the operating communication program of a stored program controlled apparatus is installed with the aid of a downloadable start address specification means, optionally realized with an EEPROM memory. The start address specification means stores information that is downloaded through a communication port in the apparatus, and that information is used in defining the address from where the communication programs are initiated. In accordance with the method of this invention, downloading of the entire new set of programs is effected by first downloading a segment of the essential portion of the new package of programs. Control is then transferred to the new segment by downloading appropriate information into the start address specification means. Thereafter, utilizing the downloaded essential portion of the new package of programs, the remainder of the new package is downloaded.
Abstract A modified version of the operating communication program of a stored program controlled apparatus is installed with the aid of a downloadable start address specification means, optionally realized with an EEPROM memory. The start address specification means stores information that is downloaded through a communication port in the apparatus, and that information is used in defining the address from where the communication programs are initiated. In accordance with the method of this invention, downloading of the entire new set of programs is effected by first downloading a segment of the essential portion of the new package of programs. Control is then transferred to the new segment by downloading appropriate information into the start address specification means. Thereafter, utilizing the downloaded essential portion of the new package of programs, the remainder of the new package is downloaded.
Description
2~3~
- 1 ' APPARATUS AND METHOD FOR DOWNLOADING PROGRAMS
BackRround of thc Invention This inven~ion relates to stored program controlled apparatus and, in particular, ~o apparatus with a capability for remote updating of its entire set of 5 programs.
Stored program controlled apparatus can conveniently be divided into two types; one where the stored programs are completely unalterable under normaloperating circumstances, and the other where the stored prograrns are alterable, at least at times, during normal operation. In apparatus of the first type, the prograrn is 10 often executed automatically and the user does not even know that the controlled apparatus is "stored program controlled". This is typically the case in equipment that is designed for people who are not knowledgeable in computers and for whom the equipment is just a tool of the trade. "Point of sale" terminals, such as check-out terminals at a supermarket, are a good example. Modems are another example.
15 People who use this equipment desire fail-safe operation and they do not want to be bothered with loading programs, fixing program bugs, installing updated versions of software, etc.
One approach to programming such equipment is to imprint the program into read-only-memory integrated circuits and physically install the circuits into the 20 equipment. The problem with this approach is that updated versions of the program require the creation of new sets of read-only memories and new installations.
When a communication link is present, "downloading" the programs to the equipmen~ from a remote processor, through the communication link, forms another approach for programming the equipment. It has been known in the art for25 some time that it is feasible to download limited types of control inforrnation from a remote processor. It is also known to download entire machine language application programs. Often such equipment does not include writable non-volatile store, such as a hard disk, so the programs are stored in battery protected readlwrite memories.
This is an unattractive solution because it leaves a substantial portion of prograrn 30 memory to be at risk. To mitigate this problem, U.S. Patent 4,724,521, suggests storing within read-only memories of the local equipment a number of general purpose routines which comprise instructions to be executed by the central processing unit to accomplish a particular program task. These, in effect, form a set of macro-instructions. The downloaded machine language prograrn utilizes these 35 macro-instructions to the extent possible, and thereby achieves flexibility without the need to download substantial amounts of program code.
2 ~ 2 In all of the known approaches, however, there is a program portion in the local eguipmen~ tha~ is resident in a read-only memory, and its contents is not changed. That resident portion contains "boot-up" segments and prograrn segmentsthat are necessary to maintain the communication between the remote processor and 5 the local equipment (so that the process of downloading the programs can continue).
This set of programs is the "essential programs" (EP) set. This set of programs should, of course, bc a non-volatile store because there is always a possibility of power loss.
The fact that the EP set is needed to maintain communications preænts 10 a problem when the EP set itself needs to be modified or updated. Indeed, that is often the case with modems, where essentially the sole function of the modem software is to support communication.
Summary of the Invcntion The problem of downloading a modified version of the operating 15 communication program, and the problem of effectively updating the entire set of programs in a stored program controlled apparatus, such as a modem, is solved with a downloadable start address specification means and, optionally, with an EEPROMmemory. The start address specifica~ion means stores information that is downloaded through the communication link, and that information is used in 20 defining the address from where the communication link programs are initiated.
In accordance with the method of this invention, downloading comprises what may be considered two communication segments. In the first segment the essential portion of the new package (EP set) of programs is downloaded to some chosen locadon in the local apparatus and the downloadable 25 start address specification means is loaded with the appropriate new start address.
Utilizing the most recently downloaded EP set of the new communication package, the second segment downloads the remainder of the new package.
Brief Description of the Drawin~
FIG. 1 presents a block diagram of an arrangement for ca~rying out this 30 invention;
FIG. 2 is a flow diagram of a downloading process in accordance with this invention; and FIG. 3 is a flow diagram of an augmented downloading process in accordance with this invention.
2 0 9 .~ O
- 1 ' APPARATUS AND METHOD FOR DOWNLOADING PROGRAMS
BackRround of thc Invention This inven~ion relates to stored program controlled apparatus and, in particular, ~o apparatus with a capability for remote updating of its entire set of 5 programs.
Stored program controlled apparatus can conveniently be divided into two types; one where the stored programs are completely unalterable under normaloperating circumstances, and the other where the stored prograrns are alterable, at least at times, during normal operation. In apparatus of the first type, the prograrn is 10 often executed automatically and the user does not even know that the controlled apparatus is "stored program controlled". This is typically the case in equipment that is designed for people who are not knowledgeable in computers and for whom the equipment is just a tool of the trade. "Point of sale" terminals, such as check-out terminals at a supermarket, are a good example. Modems are another example.
15 People who use this equipment desire fail-safe operation and they do not want to be bothered with loading programs, fixing program bugs, installing updated versions of software, etc.
One approach to programming such equipment is to imprint the program into read-only-memory integrated circuits and physically install the circuits into the 20 equipment. The problem with this approach is that updated versions of the program require the creation of new sets of read-only memories and new installations.
When a communication link is present, "downloading" the programs to the equipmen~ from a remote processor, through the communication link, forms another approach for programming the equipment. It has been known in the art for25 some time that it is feasible to download limited types of control inforrnation from a remote processor. It is also known to download entire machine language application programs. Often such equipment does not include writable non-volatile store, such as a hard disk, so the programs are stored in battery protected readlwrite memories.
This is an unattractive solution because it leaves a substantial portion of prograrn 30 memory to be at risk. To mitigate this problem, U.S. Patent 4,724,521, suggests storing within read-only memories of the local equipment a number of general purpose routines which comprise instructions to be executed by the central processing unit to accomplish a particular program task. These, in effect, form a set of macro-instructions. The downloaded machine language prograrn utilizes these 35 macro-instructions to the extent possible, and thereby achieves flexibility without the need to download substantial amounts of program code.
2 ~ 2 In all of the known approaches, however, there is a program portion in the local eguipmen~ tha~ is resident in a read-only memory, and its contents is not changed. That resident portion contains "boot-up" segments and prograrn segmentsthat are necessary to maintain the communication between the remote processor and 5 the local equipment (so that the process of downloading the programs can continue).
This set of programs is the "essential programs" (EP) set. This set of programs should, of course, bc a non-volatile store because there is always a possibility of power loss.
The fact that the EP set is needed to maintain communications preænts 10 a problem when the EP set itself needs to be modified or updated. Indeed, that is often the case with modems, where essentially the sole function of the modem software is to support communication.
Summary of the Invcntion The problem of downloading a modified version of the operating 15 communication program, and the problem of effectively updating the entire set of programs in a stored program controlled apparatus, such as a modem, is solved with a downloadable start address specification means and, optionally, with an EEPROMmemory. The start address specifica~ion means stores information that is downloaded through the communication link, and that information is used in 20 defining the address from where the communication link programs are initiated.
In accordance with the method of this invention, downloading comprises what may be considered two communication segments. In the first segment the essential portion of the new package (EP set) of programs is downloaded to some chosen locadon in the local apparatus and the downloadable 25 start address specification means is loaded with the appropriate new start address.
Utilizing the most recently downloaded EP set of the new communication package, the second segment downloads the remainder of the new package.
Brief Description of the Drawin~
FIG. 1 presents a block diagram of an arrangement for ca~rying out this 30 invention;
FIG. 2 is a flow diagram of a downloading process in accordance with this invention; and FIG. 3 is a flow diagram of an augmented downloading process in accordance with this invention.
2 0 9 .~ O
Detailed Descr1plion A modem's primary function is to enable communications between a customer's digital equipment and a remote apparatus over a transmission medium.
In a modem with a stored programmed controlled architecture this communication is S effected with a set of programs, which includes call establishment programs, link layer protocols with flow control and error recovery functions, and programs that handle and store the communicated data, as well as the modulation and demodulation programs used by the modem. These programs occupy a significant portion of the modem's program memory. In accordance with this invention, all 10 programs -- including the EP set of programs that carry out the elemental communications ~- are downloadable. That is, the apparatus employing the principles of this invention does not need to have a non-voladle "boot-up" read-only-memory. All programs (including the boot-up programs) can be stored in a single memory arrangement which, for some applications, can consist of just two 15 memory blocks.
FIG. 1 depicts one structure that, in conformance with the principles of this invention, enables the downloading of programs to the modem's program memory. FIG. I includes a processor element 10 with a port for receiving signalsfrom, and sending signals to, line 12. Processor 10 is also responsive to line 11 data 20 from program memory 20, and it supplies address and data to memory 20 via bus 13 and bus 14, respectively. In a conventional processor structure, bus 14 is connected to an address port of memory 20. In FIG. 1, address modifier 30 is interposed between processor 10 and program memory 20, with bus 15 supplying the address information to memory 20. Modifier 30 is responsive to register 40, which is loaded 25 with bus 13 data when the register is enabled by bus 16. Modifier 30 is a modulo M
adder, where M is the size of memory 20. A typical stored program controlled modem also includes a read/write data memory, means for interfacing with the transmission medium, means for interfacing with the local digital equipment, andperhaps other data and control ports. For purposes of this invention, however, these 30 other elements are irrelevant, so they are not included in the drawing.
It should be understood that line 12 in the FIG. I architecture effectively offers a "remote execution" capability to processor 10, in that the programs which are executed by processor 10 are affected by data supplied by line 12. For example, data supplied by line 12 can effect branching to programs that are normally dormant.
35 One such normally dormant program is a program that downloads information to the program memory. It should also be understood, and noted, that although this 2093~
In a modem with a stored programmed controlled architecture this communication is S effected with a set of programs, which includes call establishment programs, link layer protocols with flow control and error recovery functions, and programs that handle and store the communicated data, as well as the modulation and demodulation programs used by the modem. These programs occupy a significant portion of the modem's program memory. In accordance with this invention, all 10 programs -- including the EP set of programs that carry out the elemental communications ~- are downloadable. That is, the apparatus employing the principles of this invention does not need to have a non-voladle "boot-up" read-only-memory. All programs (including the boot-up programs) can be stored in a single memory arrangement which, for some applications, can consist of just two 15 memory blocks.
FIG. 1 depicts one structure that, in conformance with the principles of this invention, enables the downloading of programs to the modem's program memory. FIG. I includes a processor element 10 with a port for receiving signalsfrom, and sending signals to, line 12. Processor 10 is also responsive to line 11 data 20 from program memory 20, and it supplies address and data to memory 20 via bus 13 and bus 14, respectively. In a conventional processor structure, bus 14 is connected to an address port of memory 20. In FIG. 1, address modifier 30 is interposed between processor 10 and program memory 20, with bus 15 supplying the address information to memory 20. Modifier 30 is responsive to register 40, which is loaded 25 with bus 13 data when the register is enabled by bus 16. Modifier 30 is a modulo M
adder, where M is the size of memory 20. A typical stored program controlled modem also includes a read/write data memory, means for interfacing with the transmission medium, means for interfacing with the local digital equipment, andperhaps other data and control ports. For purposes of this invention, however, these 30 other elements are irrelevant, so they are not included in the drawing.
It should be understood that line 12 in the FIG. I architecture effectively offers a "remote execution" capability to processor 10, in that the programs which are executed by processor 10 are affected by data supplied by line 12. For example, data supplied by line 12 can effect branching to programs that are normally dormant.
35 One such normally dormant program is a program that downloads information to the program memory. It should also be understood, and noted, that although this 2093~
invention is described in connection with modems, its principles are applicable to all stored program apparatus. In parlicular, the principles of this invention are applicable to all situations where it is desirable to download an entire set of new programs, including the EP set. For example, this invention is useful in PCs, ''point S of sale" terminals, etc.
The operation of the FIG. 1 apparatus is quite simple. The processes carried out by the FIG. 1 apparatus are effected by executing a sequence of instructions that the processor receives from program memory 20 via bus 11. In turn, processor 10 determines which instructions are delivered to it by controlling the 10 addresses applied to memory 20 (typically by controlling a "program counter" within processor 10, which is not shown in the FIG.). Tne primary difference between a conventional microprocessor arrangement and the FIG. 1 arrangement is that the addresses supplied on bus 14 are not the actual addresses that are applied to program memory 20, because of the interposed circuit 30. One might call these addresses 15 "virtual addresses", which are translated into the real addresses by the additive constant applied by register 40 to modifier circuit 30.
The exact structure and organization of the programs executed by the FIG. 1 arrangement is not really relevant to this invention, but it is to be understood that a protocol exists for sending information out on line 12 and for receiving 20 information from line 12. This protocol provides a mechanism for intelligent communication with processor 10, which includes, for example, knowing when the received data is commands or data, and whether to store the received data in memory 20 or elsewhere.
The programs that can be execu~ed by the FIG. 1 arrangement reside 25 throughout memory 20, but the set of programs that is essendal to the maintenance of communication with line 12 (the EP set) may, advantageously, occupy a contiguous segment of memory 20 addresses in the range 0 to N. Within that rangeof addresses there is a subroutine for installing a new EP set.
In accordance with the principles of this invention, the entire set of 30 programs contained in memory 20 can be over-written with a new set of programs (in a process initiated by the apparatus itself or by the party connected to theapparatus via line 12) by following the procedure outlined in FIG. 2. In step 50 of FIG. 2, a command is received on line 12 to branch to the subroutine in the EP set that installs new EP sets (that command may simply be a data word that is installed 35 in a particular read/write memory location). After supplying the branch instruction, the new EP set of programs are downloaded via line 12. Optionally, an offset :
2 ~ 3 L ~ ~
- S -address that is the starting address of the new EP se~ (the address corresponding to 0 in the existing EP set) is also downloaded. Alternatively, ~he offset address may be predefined, in which case it does not need to be supplied by line 12. In any event, the offset address is greater than N and less than M-N. It may be noted that N must S be less than M/2, because two EP sets must temporarily coexist in memory 20.
After the new EP set is installed in memory locations X through X+N, where X is the offset address (X=M/2, for example), memory locations that serve as software-defined registers in the new EP set are populated with data that is found in the corresponding software-defined addresses in the active EP set. Thereafter, l0 according to step 51, register 40 is loaded with the offset address.
The immediate effec~ of loading the offset address into register 40 is to transfer control lo the newly installed EP set. That means that the program in the new EP set to which control is transferred, must be at a predetermined logic point so that the communication can continue seamlessly. This minor re~uirement can be lS easily accommodated by proper planning of the new EP set. Once operation proceeds under control of the new EP set of programs, according to FIG. 2, step 52 conditions processor 10 to account for the offset present in register 40 and loads the remainder of programs destined for memory 20 in addresses higher than X+N
(modulo M). ~ -It is obviously important to protect the information loaded into memory 20 from loss. At the very least, that means that memory 20 must be non-volatile.Currently, we use an electrically buL~ erasable, programmable, read-only memory (FLASH EEPROM) to form memory 20. This memory must be erased in bulk before new information can be written in it. To install a new EP in such a memory, 25 it is recalled that the EP set must occupy less than half of memory 20, and that makes it convenient to construct memory 20 from at least two distinct erasable memory blocks (distinct in the sense of being able to erase one and not the other).
Each segment of the downloading process begins with a bulk erasure of one of thememory 20 halves.
To summarize the downloading process of this invention, 1. BuLk erase the that half of memory 20 which does NOT contain the EP set of programs;
2. download a new EP set of programs to the erased half of memory 20;
3. download the offset address to pass contro1 to the new EP set of programs;
4. bulk erase the other half of memory 20;
The operation of the FIG. 1 apparatus is quite simple. The processes carried out by the FIG. 1 apparatus are effected by executing a sequence of instructions that the processor receives from program memory 20 via bus 11. In turn, processor 10 determines which instructions are delivered to it by controlling the 10 addresses applied to memory 20 (typically by controlling a "program counter" within processor 10, which is not shown in the FIG.). Tne primary difference between a conventional microprocessor arrangement and the FIG. 1 arrangement is that the addresses supplied on bus 14 are not the actual addresses that are applied to program memory 20, because of the interposed circuit 30. One might call these addresses 15 "virtual addresses", which are translated into the real addresses by the additive constant applied by register 40 to modifier circuit 30.
The exact structure and organization of the programs executed by the FIG. 1 arrangement is not really relevant to this invention, but it is to be understood that a protocol exists for sending information out on line 12 and for receiving 20 information from line 12. This protocol provides a mechanism for intelligent communication with processor 10, which includes, for example, knowing when the received data is commands or data, and whether to store the received data in memory 20 or elsewhere.
The programs that can be execu~ed by the FIG. 1 arrangement reside 25 throughout memory 20, but the set of programs that is essendal to the maintenance of communication with line 12 (the EP set) may, advantageously, occupy a contiguous segment of memory 20 addresses in the range 0 to N. Within that rangeof addresses there is a subroutine for installing a new EP set.
In accordance with the principles of this invention, the entire set of 30 programs contained in memory 20 can be over-written with a new set of programs (in a process initiated by the apparatus itself or by the party connected to theapparatus via line 12) by following the procedure outlined in FIG. 2. In step 50 of FIG. 2, a command is received on line 12 to branch to the subroutine in the EP set that installs new EP sets (that command may simply be a data word that is installed 35 in a particular read/write memory location). After supplying the branch instruction, the new EP set of programs are downloaded via line 12. Optionally, an offset :
2 ~ 3 L ~ ~
- S -address that is the starting address of the new EP se~ (the address corresponding to 0 in the existing EP set) is also downloaded. Alternatively, ~he offset address may be predefined, in which case it does not need to be supplied by line 12. In any event, the offset address is greater than N and less than M-N. It may be noted that N must S be less than M/2, because two EP sets must temporarily coexist in memory 20.
After the new EP set is installed in memory locations X through X+N, where X is the offset address (X=M/2, for example), memory locations that serve as software-defined registers in the new EP set are populated with data that is found in the corresponding software-defined addresses in the active EP set. Thereafter, l0 according to step 51, register 40 is loaded with the offset address.
The immediate effec~ of loading the offset address into register 40 is to transfer control lo the newly installed EP set. That means that the program in the new EP set to which control is transferred, must be at a predetermined logic point so that the communication can continue seamlessly. This minor re~uirement can be lS easily accommodated by proper planning of the new EP set. Once operation proceeds under control of the new EP set of programs, according to FIG. 2, step 52 conditions processor 10 to account for the offset present in register 40 and loads the remainder of programs destined for memory 20 in addresses higher than X+N
(modulo M). ~ -It is obviously important to protect the information loaded into memory 20 from loss. At the very least, that means that memory 20 must be non-volatile.Currently, we use an electrically buL~ erasable, programmable, read-only memory (FLASH EEPROM) to form memory 20. This memory must be erased in bulk before new information can be written in it. To install a new EP in such a memory, 25 it is recalled that the EP set must occupy less than half of memory 20, and that makes it convenient to construct memory 20 from at least two distinct erasable memory blocks (distinct in the sense of being able to erase one and not the other).
Each segment of the downloading process begins with a bulk erasure of one of thememory 20 halves.
To summarize the downloading process of this invention, 1. BuLk erase the that half of memory 20 which does NOT contain the EP set of programs;
2. download a new EP set of programs to the erased half of memory 20;
3. download the offset address to pass contro1 to the new EP set of programs;
4. bulk erase the other half of memory 20;
5. download the remainder of programs into memory 20.
. . . . . .
. . . . . .
- 6 - 2 ~ 9 t~ f3 !, 2 If register 40 is to contain the offset address for a substantial time after downloading is accomplished, then its contents must be protected in a manner notunlike that of memory 20. Of course, register 40 can manufac~ured together with memory 20 and be an EEPROM. However, that is not absolutely necessary, and 5 manufacturing costs could benefit if register 40 were constructed as part of the read/write memory or as part of processor 10.
Register 40 may be a volatile memory if the downloading process is carried out as depicted in FIG. 3. Specifically, by including a copy subroudne in the EP set of programs, the downloading process can be modified to the following 10 (assuming the EP set is in the first half of memory 20):
1. Bu!k erase the second half of memory 20;
2. download a new EP set of programs to the second half of memory 20;
4. download the offset address to pass control to the new EP set of programs;
5. bulk erase the first half of memory 20;
6. copy the contents of the second half of memory 20 into the first half of memory 20;
Register 40 may be a volatile memory if the downloading process is carried out as depicted in FIG. 3. Specifically, by including a copy subroudne in the EP set of programs, the downloading process can be modified to the following 10 (assuming the EP set is in the first half of memory 20):
1. Bu!k erase the second half of memory 20;
2. download a new EP set of programs to the second half of memory 20;
4. download the offset address to pass control to the new EP set of programs;
5. bulk erase the first half of memory 20;
6. copy the contents of the second half of memory 20 into the first half of memory 20;
7. reset the offset address to 0; and 8. download the remainder of programs into memory 20.
Admittedly, during the copy sequence (which may also be a "move" sequence) the 20 arrangement is vulnerable to power failures. Since the time of copying or moving is very small, this is a very unlikely event. Sdll, to protect against this unlikely event, the power source can be designed to have sufficient reserve to complete the copyoperadon, or to protect the starting address. A capacitor at the output of the power supply may supply the necessary power reserve.
In the arrangement described above where memory 20 consists of two FLASH EEPROM chips, register 40 needs to have only one bit of memory, and modifier circuit 30 can be merely an Exclusive OR gate which, with the aid of the one bit memory of register 40, selects the bank of memory that is acdve.
Admittedly, during the copy sequence (which may also be a "move" sequence) the 20 arrangement is vulnerable to power failures. Since the time of copying or moving is very small, this is a very unlikely event. Sdll, to protect against this unlikely event, the power source can be designed to have sufficient reserve to complete the copyoperadon, or to protect the starting address. A capacitor at the output of the power supply may supply the necessary power reserve.
In the arrangement described above where memory 20 consists of two FLASH EEPROM chips, register 40 needs to have only one bit of memory, and modifier circuit 30 can be merely an Exclusive OR gate which, with the aid of the one bit memory of register 40, selects the bank of memory that is acdve.
Claims (11)
1. A system containing a processor, a memory, and a set of programs stored in said memory that are executed when the system needs to be initialized, said programs being executed when the processor accesses the contents of addresses ofsaid memory, comprising:
alterable storage means for holding an address that is used as the starting address accessed by the processor when initializing.
alterable storage means for holding an address that is used as the starting address accessed by the processor when initializing.
2. The system of claim 1 wherein said memory is an EEPROM memory.
3. The system of claim 1 wherein said memory is the only program memory in the system.
4. The system of claim 1 wherein said memory consists of 2 FLASH
EEPROM devices.
EEPROM devices.
5. The system of claim 1 wherein said alterable storage means is an EEPROM memory.
6. A system containing a processor, a memory, and a set of programs stored in said memory that are executed when the system needs to be initialized, said programs being executed when the processor accesses the contents of addresses ofsaid memory, comprising:
alterable memory means for storing information that controls the starting address accessed by the processor when initializing.
alterable memory means for storing information that controls the starting address accessed by the processor when initializing.
7. The system of claim 6 when said initializing is triggered by a signal received at an input port of the system.
8. A system containing a processor, a memory and a communications port comprising:
operationally alterable means for setting the starting position of a program executed by said processor in connection with communication with said port, wherein said means for setting the starting position of a program executed by said processor in connection with communication with said port sets the starting position in accordance with information supplied via said communicationport.
operationally alterable means for setting the starting position of a program executed by said processor in connection with communication with said port, wherein said means for setting the starting position of a program executed by said processor in connection with communication with said port sets the starting position in accordance with information supplied via said communicationport.
9. The system of claim 8 wherein said memory contains a first set of programs and a second set of programs, said memory is at least twice the size of the size of the first set of programs, and said operationally alterable means sets the starting position of the program executed by said processor in connection with communication with said port at a second specified location that is M removed from the first location, M being half the size of said memory.
10. A method for installing a new set of communication programs Pnew into a stored program controlled apparatus that includes a communication port and a memory by transmitting said set of programs Pnew to said apparatus via said port, with the aid of a set of communication programs Pold already resident in said memory, where said set of programs Pold contains a subset of programs EPold thatoccupy less than half of the memory and said set of programs P new also contains a subset of programs EPnew that, when installed, occupy less than half of the memory, comprising the steps of:
installing the EPnew programs in an area of said memory that contains programs other than the EPold programs, thereby overwriting at least a portion of one program in said Pold set of programs;
altering operation of said apparatus to execute the EPnew programs instead of the EPold programs, and installing the remaining programs of said P new set of programs in memory locations not occupied with the EPnew programs.
installing the EPnew programs in an area of said memory that contains programs other than the EPold programs, thereby overwriting at least a portion of one program in said Pold set of programs;
altering operation of said apparatus to execute the EPnew programs instead of the EPold programs, and installing the remaining programs of said P new set of programs in memory locations not occupied with the EPnew programs.
11. The method of claim 10 further comprising a step of moving, interposed between said step of altering operation of the apparatus and said step of installing the remaining programs, that installs said EPnew programs into memory locations starting at a location that corresponds to a starting location of the EPold programs, and a second step of altering operation of said apparatus to execute the EPnew programs in the installed locations by said step of moving, wherein said installing the remaining programs of said Pnew set of programs stores the programs in memory locations not occupied with the EPnew programs installed by said step of moving.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US07/880,257 US6131159A (en) | 1992-05-08 | 1992-05-08 | System for downloading programs |
US880,257 | 1992-05-08 |
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CA2093042A1 true CA2093042A1 (en) | 1993-11-09 |
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CA002093042A Abandoned CA2093042A1 (en) | 1992-05-08 | 1993-03-31 | Apparatus and method for downloading programs |
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1992
- 1992-05-08 US US07/880,257 patent/US6131159A/en not_active Expired - Fee Related
-
1993
- 1993-03-31 CA CA002093042A patent/CA2093042A1/en not_active Abandoned
- 1993-04-26 EP EP93303231A patent/EP0569178A2/en not_active Withdrawn
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1997
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EP0569178A3 (en) | 1994-02-09 |
US5778234A (en) | 1998-07-07 |
EP0569178A2 (en) | 1993-11-10 |
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