CA2077204A1 - High-speed switching tree with input sampling pulses of constant frequency and means for varying the effective sampling rate - Google Patents

High-speed switching tree with input sampling pulses of constant frequency and means for varying the effective sampling rate

Info

Publication number
CA2077204A1
CA2077204A1 CA2077204A CA2077204A CA2077204A1 CA 2077204 A1 CA2077204 A1 CA 2077204A1 CA 2077204 A CA2077204 A CA 2077204A CA 2077204 A CA2077204 A CA 2077204A CA 2077204 A1 CA2077204 A1 CA 2077204A1
Authority
CA
Canada
Prior art keywords
switching
sampling clock
input set
clock pulses
tree
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2077204A
Other languages
French (fr)
Other versions
CA2077204C (en
Inventor
Walter O. Lecroy, Jr.
Brian V. Cake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lecroy Corp
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2077204A1 publication Critical patent/CA2077204A1/en
Application granted granted Critical
Publication of CA2077204C publication Critical patent/CA2077204C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/1205—Multiplexed conversion systems
    • H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
    • H03M1/1215—Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04—Modifications for accelerating switching
    • H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
    • H03K17/04113—Modifications for accelerating switching without feedback from the output circuit to the control circuit in bipolar transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/603—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors with coupled emitters

Abstract

Current switching apparatus including at least one current switching tree comprised of cascaded sets of switching circuits, with an input set operable with sampling clock pulses supplied at a fixed frequency and the remaining cascaded sets operable at different frequencies, and further including a sample skipping circuit interconnected between successive sets for reducing the effective sampling frequency of the switching tree while maintaining the fixed frequency at which the input set operates. The sample skipping circuit includes a dump circuit selectively energized to dump selected samples produced by the input set. When the apparatus is formed of plural switching trees of different phases, a sampling clock generator having an adjustable delay circuit is used to delay sampling clock pulses by adjustable amounts so as to establish predetermined phases of sampling clock pulses of the same frequency and different phases for use in each switching tree.
CA002077204A 1991-09-16 1992-08-31 High-speed switching tree with input sampling pulses of constant frequency and means for varying the effective sampling rate Expired - Fee Related CA2077204C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/760,165 1991-09-16
US07/760,165 US5218363A (en) 1982-04-12 1991-09-16 High-speed switching tree with input sampling pulses of constant frequency and means for varying the effective sampling rate

Publications (2)

Publication Number Publication Date
CA2077204A1 true CA2077204A1 (en) 1993-03-17
CA2077204C CA2077204C (en) 1997-08-19

Family

ID=25058285

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002077204A Expired - Fee Related CA2077204C (en) 1991-09-16 1992-08-31 High-speed switching tree with input sampling pulses of constant frequency and means for varying the effective sampling rate

Country Status (6)

Country Link
US (1) US5218363A (en)
EP (1) EP0540160B1 (en)
JP (1) JP3441472B2 (en)
AT (1) ATE156947T1 (en)
CA (1) CA2077204C (en)
DE (1) DE69221581T2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996021699A1 (en) * 1995-01-11 1996-07-18 Sekisui Chemical Co., Ltd. Conductive coating composition
US5721545A (en) * 1995-10-23 1998-02-24 Poplevine; Pavel B. Methods and apparatus for serial-to-parallel and parallel-to-serial conversion
US5945863A (en) * 1997-06-18 1999-08-31 Applied Micro Circuits Corporation Analog delay circuit
US6421785B1 (en) * 1998-11-03 2002-07-16 Intel Corporation Clock selection for processing audio data
TW468269B (en) * 1999-01-28 2001-12-11 Semiconductor Energy Lab Serial-to-parallel conversion circuit, and semiconductor display device employing the same
TW521492B (en) * 2001-07-13 2003-02-21 Faraday Tech Corp Oversampling circuit and its method
US7015842B1 (en) * 2005-01-12 2006-03-21 Teranetics, Inc. High-speed sampling architectures
US7777577B2 (en) * 2007-09-28 2010-08-17 Texas Instruments Incorporated Dual path phase locked loop (PLL) with digitally programmable damping
US7656200B2 (en) * 2008-06-30 2010-02-02 Intel Corporation Multiple-phase, differential sampling and steering
EP2211468B1 (en) 2009-01-26 2011-07-20 Fujitsu Semiconductor Limited Sampling

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3312941A (en) * 1955-11-01 1967-04-04 Rca Corp Switching network
US3061682A (en) * 1959-10-14 1962-10-30 Bell Telephone Labor Inc Transistor scanner network
GB975944A (en) * 1959-12-18 1964-11-25 Post Office Improvements in or relating to electric pulse transmission systems
US3142822A (en) * 1961-06-29 1964-07-28 Goodyear Aerospace Corp Apparatus for sampling, storing and summing signals
US3531720A (en) * 1969-09-22 1970-09-29 Boeing Co Digital shift register filter with continuing frequency-fold sampling and time shared sub-band filtering
US3761809A (en) * 1970-04-27 1973-09-25 Us Navy Noise modulated analogue signal presence detector
US3614327A (en) * 1970-10-05 1971-10-19 Nasa Data multiplexer using tree switching configuration
US3714623A (en) * 1971-06-08 1973-01-30 Schlumberger Technology Corp Memorizer
US3885167A (en) * 1973-08-08 1975-05-20 Bell Telephone Labor Inc Apparatus and method for connecting between series and parallel data streams
US3820112A (en) * 1973-10-01 1974-06-25 A Roth High speed analog-to-digital conversion system
JPS50108866A (en) * 1974-02-01 1975-08-27
US3978329A (en) * 1975-09-12 1976-08-31 Bell Telephone Laboratories, Incorporated One-bit full adder
US4078204A (en) * 1977-01-31 1978-03-07 Gte Automatic Electric (Canada) Limited Di-phase pulse receiving system
US4196358A (en) * 1977-08-16 1980-04-01 Fairchild Camera & Instrument Corporation Analog multiplexer
JPS5597097A (en) * 1979-01-12 1980-07-23 Sony Corp Feedback circuit for charge transfer element
US4291299A (en) * 1979-10-31 1981-09-22 Northern Telecom Limited Analog to digital converter using timed level changes
US4513283A (en) * 1982-11-30 1985-04-23 International Business Machines Corporation Latch circuits with differential cascode current switch logic
AU2450384A (en) * 1983-02-17 1984-08-23 International Standard Electric Corp. Adjustable delay circuit
US4555769A (en) * 1983-05-25 1985-11-26 International Business Machines Corporation Circuit apparatus for generating modulus-N residues
US4864558A (en) * 1986-11-29 1989-09-05 Nippon Telegraph And Telephone Corporation Self-routing switch
US4795923A (en) * 1987-11-25 1989-01-03 Tektronix, Inc. Adjustable delay circuit
US4862020A (en) * 1988-06-20 1989-08-29 Tektronix, Inc. Electronic delay control circuit having pulse width maintenance
EP0365732B1 (en) * 1988-10-28 1993-08-18 International Business Machines Corporation Two stage address decoder circuit for semiconductor memories

Also Published As

Publication number Publication date
EP0540160A3 (en) 1994-03-09
CA2077204C (en) 1997-08-19
EP0540160A2 (en) 1993-05-05
DE69221581D1 (en) 1997-09-18
JP3441472B2 (en) 2003-09-02
EP0540160B1 (en) 1997-08-13
DE69221581T2 (en) 1998-03-26
ATE156947T1 (en) 1997-08-15
US5218363A (en) 1993-06-08
JPH06296138A (en) 1994-10-21

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Legal Events

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