CA2062841A1 - Apparatus and method for non-stop switching in asynchronous transfer mode - Google Patents

Apparatus and method for non-stop switching in asynchronous transfer mode

Info

Publication number
CA2062841A1
CA2062841A1 CA2062841A CA2062841A CA2062841A1 CA 2062841 A1 CA2062841 A1 CA 2062841A1 CA 2062841 A CA2062841 A CA 2062841A CA 2062841 A CA2062841 A CA 2062841A CA 2062841 A1 CA2062841 A1 CA 2062841A1
Authority
CA
Canada
Prior art keywords
spare
current
empty cell
detected
systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2062841A
Other languages
French (fr)
Other versions
CA2062841C (en
Inventor
Ryuichi Kondo
Haruo Yamashita
Tomohiro Ishihara
Toshiyuki Sudo
Takaaki Wakisaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2062841A1 publication Critical patent/CA2062841A1/en
Application granted granted Critical
Publication of CA2062841C publication Critical patent/CA2062841C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/55—Prevention, detection or correction of errors
    • H04L49/552—Prevention, detection or correction of errors by ensuring the integrity of packets received through redundant connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5625—Operations, administration and maintenance [OAM]
    • H04L2012/5627—Fault tolerance and recovery
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5672—Multiplexing, e.g. coding, scrambling
    • H04L2012/5674—Synchronisation, timing recovery or alignment

Abstract

According to the present invention, when a current system is switched to a spare system in a transmission system in an asynchronous transfer mode, empty cells transmitted in the current and spare systems are detected, and thereby a timing for switching the current system to the spare system is determined. When no phase difference is existent between the current and spare systems, an empty cell is detected in both the current and spare systems at the same time. Therefore, the current system is switched to the spare system, when an empty cell is detected in both the current and spare systems at the same time. When a shade difference is existent, if an empty cell is detected either in the current or spare systems, another empty cell is inserted in to the systems. Then, the data of the empty cell in a spare system is saved. After the empty cell in a current system passes, the current system is switched to the spare system. When a phase difference of at least one cell is existent, and if an empty cell comes earlier in current system, empty cell are kept inserted form when the empty cell is detected in the current system until an empty cell is detected in the spare system.
After that, the current system is switched to the spare system. When an empty cell comes earlier in a spare system, the data of the cell in the spare system is saved from when the empty cell is detected until an empty cell is detected in the current system. After that, the current system is switched to the spare system.
CA002062841A 1991-03-15 1992-03-12 Apparatus and method for non-stop switching in asynchronous transfer mode Expired - Fee Related CA2062841C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3-49990 1991-03-15
JP3049990A JPH04286242A (en) 1991-03-15 1991-03-15 Device and method for hit-free switching

Publications (2)

Publication Number Publication Date
CA2062841A1 true CA2062841A1 (en) 1992-09-16
CA2062841C CA2062841C (en) 1998-09-15

Family

ID=12846450

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002062841A Expired - Fee Related CA2062841C (en) 1991-03-15 1992-03-12 Apparatus and method for non-stop switching in asynchronous transfer mode

Country Status (5)

Country Link
US (1) US5475675A (en)
EP (1) EP0503663B1 (en)
JP (1) JPH04286242A (en)
CA (1) CA2062841C (en)
DE (1) DE69217096T2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5398235A (en) * 1991-11-15 1995-03-14 Mitsubishi Denki Kabushiki Kaisha Cell exchanging apparatus
JP2671699B2 (en) * 1991-11-15 1997-10-29 三菱電機株式会社 Cell exchange device
US5677931A (en) * 1995-02-27 1997-10-14 Nec Corporation Transmission path switching apparatus
JP2836538B2 (en) * 1995-09-01 1998-12-14 日本電気株式会社 Duplex system switching device
JP2812261B2 (en) * 1995-09-13 1998-10-22 日本電気株式会社 ATM cell flow control device
KR100225519B1 (en) * 1996-12-10 1999-10-15 유기범 Apparatus for duplexing ipc path
US6011780A (en) * 1997-05-23 2000-01-04 Stevens Institute Of Technology Transparant non-disruptable ATM network
US6917582B1 (en) * 1998-02-04 2005-07-12 Siemens Aktiengesellschaft Process for synchronizing data streams containing ATM-cells
US20030014516A1 (en) * 2001-07-13 2003-01-16 International Business Machines Corporation Recovery support for reliable messaging
JP4854029B2 (en) * 2007-06-08 2012-01-11 Ｋｄｄｉ株式会社 Uninterruptible packet switching device

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62230138A (en) * 1986-03-31 1987-10-08 Toshiba Corp Changeover equipment for duplicated transmission line
JPS6460026A (en) * 1987-08-31 1989-03-07 Fujitsu Ltd Transmission line switching device for communication equipment
JPH01270427A (en) * 1988-04-21 1989-10-27 Nippon Telegr & Teleph Corp <Ntt> Transmission line switching system
JP2611805B2 (en) * 1988-05-13 1997-05-21 日本電信電話株式会社 Transmission line switching method
JPH02200038A (en) * 1989-01-30 1990-08-08 Nippon Telegr & Teleph Corp <Ntt> Circuit switching system
US5072440A (en) * 1989-03-01 1991-12-10 Fujitsu Limited Self-routing switching system having dual self-routing switch module network structure
JP2677418B2 (en) * 1989-06-22 1997-11-17 富士通株式会社 ATM switch system switching method
US5166926A (en) * 1990-12-18 1992-11-24 Bell Communications Research, Inc. Packet address look-ahead technique for use in implementing a high speed packet switch

Also Published As

Publication number Publication date
DE69217096T2 (en) 1997-06-05
EP0503663A1 (en) 1992-09-16
DE69217096D1 (en) 1997-03-13
EP0503663B1 (en) 1997-01-29
CA2062841C (en) 1998-09-15
US5475675A (en) 1995-12-12
JPH04286242A (en) 1992-10-12

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Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed
MKLA Lapsed

Effective date: 20110314