CA2050405A1 - Systeme de memorisation temporaire d'information comprenant une memoire tampon enregistrant des donnees structurees en blocs de donnees de longueur fixe ou variable - Google Patents

Systeme de memorisation temporaire d'information comprenant une memoire tampon enregistrant des donnees structurees en blocs de donnees de longueur fixe ou variable

Info

Publication number
CA2050405A1
CA2050405A1 CA2050405A CA2050405A CA2050405A1 CA 2050405 A1 CA2050405 A1 CA 2050405A1 CA 2050405 A CA2050405 A CA 2050405A CA 2050405 A CA2050405 A CA 2050405A CA 2050405 A1 CA2050405 A1 CA 2050405A1
Authority
CA
Canada
Prior art keywords
data blocks
outlet
data block
information storage
fixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2050405A
Other languages
English (en)
Other versions
CA2050405C (fr
Inventor
Michel Henrion
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent NV
Original Assignee
Michel Henrion
Alcatel N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=9399999&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=CA2050405(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Michel Henrion, Alcatel N.V. filed Critical Michel Henrion
Publication of CA2050405A1 publication Critical patent/CA2050405A1/fr
Application granted granted Critical
Publication of CA2050405C publication Critical patent/CA2050405C/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/104Asynchronous transfer mode [ATM] switching fabrics
    • H04L49/105ATM switching elements
    • H04L49/108ATM switching elements using shared central buffer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5678Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681Buffer or queue management

Abstract

Le système de mémorisation temporaire d'information comprend une mémoire tampon enregistrant des données structurées en blocs de données de longueur fixe ou variable. Ce système mémorise des blocs de données comportant chacun un ou plusieurs éléments de données. Il comprend une pluralité de files d'attente servant à lier entre eux les blocs de données en vue de les fournir de façon sélective sur des sorties individuelles pouvant appartenir à des destinations distinctes et une logique de gestion de ces files d'attente. Il est prévu une file d'attente propre à chaque destination sortante. Une logique de gestion de files d'attente comprend des moyens de sélection de bloc de données (OSQRCL) intervenant lorsqu'à une sortie individuelle doit être affecté un bloc de données en attente, lesquels comportent des moyen (OQSC, OQPS, OQIC) identifiant une file d'attente d'une destination sortante à laquelle cette sortie appartient, en obtenant la désignation d'un bloc de données et affectant le bloc de données désigné à la sortie considérée (YJS) en initialisant le transfert de ce bloc de données vers cette sortie individuelle (NCO).
CA002050405A 1990-08-31 1991-08-30 Systeme de memorisation temporaire d'information comprenant une memoire tampon enregistrant des donnees structurees en blocs de donnees de longueur fixe ou variable Expired - Lifetime CA2050405C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9010877A FR2666472B1 (fr) 1990-08-31 1990-08-31 Systeme de memorisation temporaire d'information comprenant une memoire tampon enregistrant des donnees en blocs de donnees de longueur fixe ou variable.
FR9010877 1990-08-31

Publications (2)

Publication Number Publication Date
CA2050405A1 true CA2050405A1 (fr) 1992-03-01
CA2050405C CA2050405C (fr) 1995-07-11

Family

ID=9399999

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002050405A Expired - Lifetime CA2050405C (fr) 1990-08-31 1991-08-30 Systeme de memorisation temporaire d'information comprenant une memoire tampon enregistrant des donnees structurees en blocs de donnees de longueur fixe ou variable

Country Status (11)

Country Link
US (1) US5301192A (fr)
EP (1) EP0475161B1 (fr)
JP (1) JP3248929B2 (fr)
KR (1) KR100221160B1 (fr)
AT (1) ATE127644T1 (fr)
AU (1) AU636055B2 (fr)
CA (1) CA2050405C (fr)
DE (1) DE69112746T2 (fr)
ES (1) ES2077745T3 (fr)
FR (1) FR2666472B1 (fr)
RU (1) RU2138845C1 (fr)

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US5832262A (en) * 1995-09-14 1998-11-03 Lockheed Martin Corporation Realtime hardware scheduler utilizing processor message passing and queue management cells
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US5914956A (en) * 1997-02-03 1999-06-22 Williams; Joel R. Cache for improving the connection capacity of a communications switch
US5949784A (en) * 1997-05-01 1999-09-07 3Com Corporation Forwarding mechanism for multi-destination packets to minimize per packet scheduling overhead in a network forwarding engine
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US6683854B1 (en) * 1998-03-20 2004-01-27 International Business Machines Corporation System for checking data integrity in a high speed packet switching network node
US7382736B2 (en) * 1999-01-12 2008-06-03 Mcdata Corporation Method for scoring queued frames for selective transmission through a switch
US7031330B1 (en) * 1999-04-15 2006-04-18 Marconi Intellectual Property (Ringfence), Inc. Very wide memory TDM switching system
US6574231B1 (en) * 1999-05-21 2003-06-03 Advanced Micro Devices, Inc. Method and apparatus for queuing data frames in a network switch port
US7356030B2 (en) * 2000-11-17 2008-04-08 Foundry Networks, Inc. Network switch cross point
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US7002980B1 (en) * 2000-12-19 2006-02-21 Chiaro Networks, Ltd. System and method for router queue and congestion management
US7203198B2 (en) * 2001-04-17 2007-04-10 Conexant, Inc. System and method for switching asynchronous transfer mode cells
US20040054877A1 (en) 2001-10-29 2004-03-18 Macy William W. Method and apparatus for shuffling data
US6985903B2 (en) 2002-01-25 2006-01-10 Qualcomm, Incorporated Method and system for storage and fast retrieval of digital terrain model elevations for use in positioning systems
US7266117B1 (en) 2002-05-06 2007-09-04 Foundry Networks, Inc. System architecture for very fast ethernet blade
US20120155466A1 (en) 2002-05-06 2012-06-21 Ian Edward Davis Method and apparatus for efficiently processing data packets in a computer network
US7187687B1 (en) * 2002-05-06 2007-03-06 Foundry Networks, Inc. Pipeline method and system for switching packets
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US7817659B2 (en) * 2004-03-26 2010-10-19 Foundry Networks, Llc Method and apparatus for aggregating input data streams
US8730961B1 (en) 2004-04-26 2014-05-20 Foundry Networks, Llc System and method for optimizing router lookup
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US20070288690A1 (en) * 2006-06-13 2007-12-13 Foundry Networks, Inc. High bandwidth, high capacity look-up table implementation in dynamic random access memory
US7903654B2 (en) * 2006-08-22 2011-03-08 Foundry Networks, Llc System and method for ECMP load sharing
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US7978614B2 (en) 2007-01-11 2011-07-12 Foundry Network, LLC Techniques for detecting non-receipt of fault detection protocol packets
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US8190881B2 (en) 2007-10-15 2012-05-29 Foundry Networks Llc Scalable distributed web-based authentication
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Also Published As

Publication number Publication date
EP0475161A1 (fr) 1992-03-18
ES2077745T3 (es) 1995-12-01
KR100221160B1 (ko) 1999-09-15
CA2050405C (fr) 1995-07-11
FR2666472B1 (fr) 1992-10-16
ATE127644T1 (de) 1995-09-15
AU636055B2 (en) 1993-04-08
DE69112746D1 (de) 1995-10-12
EP0475161B1 (fr) 1995-09-06
JPH04245358A (ja) 1992-09-01
KR920005537A (ko) 1992-03-28
JP3248929B2 (ja) 2002-01-21
DE69112746T2 (de) 1996-03-28
US5301192A (en) 1994-04-05
RU2138845C1 (ru) 1999-09-27
FR2666472A1 (fr) 1992-03-06
AU8279991A (en) 1992-03-05

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Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed
MKEC Expiry (correction)

Effective date: 20121202